From 68ae882596524a2dde9da73283241b01d56375d5 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Mon, 15 Dec 2014 18:12:47 +0800 Subject: USB: gadget: atmel_usba_udc: fix transfer hang issue When receive data, the RXRDY in status register set by hardware after a new packet has been stored in the endpoint FIFO. After, we copy from FIFO, we clear it, make the FIFO can be accessed again. In the receive_data() function, this bit RXRDY has been cleared. So, after the receive_data() function return, this bit should not be cleared again, or else it will cause the accessing FIFO corrupt, which will make the data loss. Signed-off-by: Bo Shen --- drivers/usb/gadget/atmel_usba_udc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index 12628ef..fbc74f3 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -1062,7 +1062,6 @@ static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep) if ((epstatus & epctrl) & USBA_RX_BK_RDY) { DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name); receive_data(ep); - usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); } } -- cgit v1.1 From fe1b28c9f0954047f20b20253596b5ca9aef4a32 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 10 Dec 2014 14:43:03 -0600 Subject: usb, g_dnl: generalize DFU detach functions In order to add detach functions for fastboot, make the DFU detach related functions common so they can be shared. Signed-off-by: Rob Herring Tested-by: Lukasz Majewski [TestHW: Exynos4412-Trats2] --- common/cmd_dfu.c | 6 +++--- drivers/dfu/dfu.c | 16 ---------------- drivers/usb/gadget/f_dfu.c | 2 +- drivers/usb/gadget/g_dnl.c | 17 +++++++++++++++++ include/dfu.h | 3 --- include/g_dnl.h | 4 ++++ 6 files changed, 25 insertions(+), 23 deletions(-) diff --git a/common/cmd_dfu.c b/common/cmd_dfu.c index 9e020b4..e975abe 100644 --- a/common/cmd_dfu.c +++ b/common/cmd_dfu.c @@ -38,10 +38,10 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int controller_index = simple_strtoul(usb_controller, NULL, 0); board_usb_init(controller_index, USB_INIT_DEVICE); - dfu_clear_detach(); + g_dnl_clear_detach(); g_dnl_register("usb_dnl_dfu"); while (1) { - if (dfu_detach()) { + if (g_dnl_detach()) { /* * Check if USB bus reset is performed after detach, * which indicates that -R switch has been passed to @@ -74,7 +74,7 @@ done: if (dfu_reset) run_command("reset", 0); - dfu_clear_detach(); + g_dnl_clear_detach(); return ret; } diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index 14cb366..648f261 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -17,7 +17,6 @@ #include #include -static bool dfu_detach_request; static LIST_HEAD(dfu_list); static int dfu_alt_num; static int alt_num_cnt; @@ -39,21 +38,6 @@ __weak bool dfu_usb_get_reset(void) return true; } -bool dfu_detach(void) -{ - return dfu_detach_request; -} - -void dfu_trigger_detach(void) -{ - dfu_detach_request = true; -} - -void dfu_clear_detach(void) -{ - dfu_detach_request = false; -} - static int dfu_find_alt_num(const char *s) { int i = 0; diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c index 16fc9dd..ead71eb 100644 --- a/drivers/usb/gadget/f_dfu.c +++ b/drivers/usb/gadget/f_dfu.c @@ -366,7 +366,7 @@ static int state_dfu_idle(struct f_dfu *f_dfu, to_runtime_mode(f_dfu); f_dfu->dfu_state = DFU_STATE_appIDLE; - dfu_trigger_detach(); + g_dnl_trigger_detach(); break; default: f_dfu->dfu_state = DFU_STATE_dfuERROR; diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c index 25611ac..ee52a29 100644 --- a/drivers/usb/gadget/g_dnl.c +++ b/drivers/usb/gadget/g_dnl.c @@ -163,6 +163,23 @@ __weak int g_dnl_board_usb_cable_connected(void) return -EOPNOTSUPP; } +static bool g_dnl_detach_request; + +bool g_dnl_detach(void) +{ + return g_dnl_detach_request; +} + +void g_dnl_trigger_detach(void) +{ + g_dnl_detach_request = true; +} + +void g_dnl_clear_detach(void) +{ + g_dnl_detach_request = false; +} + static int g_dnl_get_bcd_device_number(struct usb_composite_dev *cdev) { struct usb_gadget *gadget = cdev->gadget; diff --git a/include/dfu.h b/include/dfu.h index f1a71c7..c27856c 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -150,9 +150,6 @@ struct dfu_entity *dfu_get_entity(int alt); char *dfu_extract_token(char** e, int *n); void dfu_trigger_reset(void); int dfu_get_alt(char *name); -bool dfu_detach(void); -void dfu_trigger_detach(void); -void dfu_clear_detach(void); int dfu_init_env_entities(char *interface, char *devstr); unsigned char *dfu_get_buf(struct dfu_entity *dfu); unsigned char *dfu_free_buf(void); diff --git a/include/g_dnl.h b/include/g_dnl.h index 1b1b35e..4eeb5e4 100644 --- a/include/g_dnl.h +++ b/include/g_dnl.h @@ -39,4 +39,8 @@ int g_dnl_register(const char *s); void g_dnl_unregister(void); void g_dnl_set_serialnumber(char *); +bool g_dnl_detach(void); +void g_dnl_trigger_detach(void); +void g_dnl_clear_detach(void); + #endif /* __G_DOWNLOAD_H_ */ -- cgit v1.1 From 267abc626da609560aecab83e06b187954974ba6 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 10 Dec 2014 14:43:04 -0600 Subject: fastboot: add support for continue command The fastboot continue command is defined to exit fastboot and continue autoboot. This commit implements the continue command and the exiting of fastboot only. Subsequent u-boot commands can be processed after exiting fastboot. Autoboot should implement a boot script such as "fastboot; mmc read <...>; bootm" to fully implement the fastboot continue function. Signed-off-by: Rob Herring Tested-by: Lukasz Majewski [TestHW: Exynos4412-Trats2] --- common/cmd_fastboot.c | 4 ++++ drivers/usb/gadget/f_fastboot.c | 14 ++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c index 909616d..b72f4f3 100644 --- a/common/cmd_fastboot.c +++ b/common/cmd_fastboot.c @@ -15,17 +15,21 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { int ret; + g_dnl_clear_detach(); ret = g_dnl_register("usb_dnl_fastboot"); if (ret) return ret; while (1) { + if (g_dnl_detach()) + break; if (ctrlc()) break; usb_gadget_handle_interrupts(); } g_dnl_unregister(); + g_dnl_clear_detach(); return CMD_RET_SUCCESS; } diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 71b62e5..310175a 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -480,6 +480,17 @@ static void cb_boot(struct usb_ep *ep, struct usb_request *req) fastboot_tx_write_str("OKAY"); } +static void do_exit_on_complete(struct usb_ep *ep, struct usb_request *req) +{ + g_dnl_trigger_detach(); +} + +static void cb_continue(struct usb_ep *ep, struct usb_request *req) +{ + fastboot_func->in_req->complete = do_exit_on_complete; + fastboot_tx_write_str("OKAY"); +} + #ifdef CONFIG_FASTBOOT_FLASH static void cb_flash(struct usb_ep *ep, struct usb_request *req) { @@ -520,6 +531,9 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] = { }, { .cmd = "boot", .cb = cb_boot, + }, { + .cmd = "continue", + .cb = cb_continue, }, #ifdef CONFIG_FASTBOOT_FLASH { -- cgit v1.1 From 7da6fa27168c468e58814d54fe3f66109036ec2e Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Mon, 15 Dec 2014 10:34:09 +0100 Subject: dfu: mmc: check if mmc device exists in mmc_block_op() The function mmc_block_op() is the last function before the physicall data write, but the mmc device pointer is not checked. If mmc device not exists, then data abort will occur. To avoid this, first the mmc device pointer is checked. Signed-off-by: Przemyslaw Marczak Tested-by: Lukasz Majewski [TestHW: Exynos4412-Trats2] --- drivers/dfu/dfu_mmc.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c index 72fa03e..62d72fe 100644 --- a/drivers/dfu/dfu_mmc.c +++ b/drivers/dfu/dfu_mmc.c @@ -40,10 +40,16 @@ static int mmc_access_part(struct dfu_entity *dfu, struct mmc *mmc, int part) static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, u64 offset, void *buf, long *len) { - struct mmc *mmc = find_mmc_device(dfu->data.mmc.dev_num); + struct mmc *mmc; u32 blk_start, blk_count, n = 0; int ret, part_num_bkp = 0; + mmc = find_mmc_device(dfu->data.mmc.dev_num); + if (!mmc) { + error("Device MMC %d - not found!", dfu->data.mmc.dev_num); + return -ENODEV; + } + /* * We must ensure that we work in lba_blk_size chunks, so ALIGN * this value. -- cgit v1.1 From 62a96d805f6f212250f5590d6afadf3645837f36 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Mon, 15 Dec 2014 10:34:10 +0100 Subject: gadget: f_thor: check pointers before use in download_tail() Some pointers in function download_tail() were not checked before the use. This could possibly cause the data abort. To avoid this, check if the pointers are not null is added. Signed-off-by: Przemyslaw Marczak Tested-by: Lukasz Majewski [TestHW: Exynos4412-Trats2] --- drivers/usb/gadget/f_thor.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index 78519fa..2d0410d 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -205,12 +205,24 @@ static long long int download_head(unsigned long long total, static int download_tail(long long int left, int cnt) { - struct dfu_entity *dfu_entity = dfu_get_entity(alt_setting_num); - void *transfer_buffer = dfu_get_buf(dfu_entity); + struct dfu_entity *dfu_entity; + void *transfer_buffer; int ret; debug("%s: left: %llu cnt: %d\n", __func__, left, cnt); + dfu_entity = dfu_get_entity(alt_setting_num); + if (!dfu_entity) { + error("Alt setting: %d entity not found!\n", alt_setting_num); + return -ENOENT; + } + + transfer_buffer = dfu_get_buf(dfu_entity); + if (!transfer_buffer) { + error("Transfer buffer not allocated!"); + return -ENXIO; + } + if (left) { ret = dfu_write(dfu_entity, transfer_buffer, left, cnt++); if (ret) { -- cgit v1.1 From f597fc3d4c4f73d45670649d6f3e678934139c25 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Mon, 15 Dec 2014 10:34:11 +0100 Subject: dfu: dfu_get_buf: check the value of env dfu_bufsiz before use In function dfu_get_buf(), the size of allocated buffer could be defined by the env variable. The size from this variable was passed for memalign() without checking its value. And the the memalign will return non null pointer for size 0. This could possibly cause data abort, so now the value of var is checked before use. And if this variable is set to 0 then the default size will be used. This commit also changes the base passed to simple_strtoul() to 0. Now decimal and hex values can be used for the variable dfu_bufsiz. Signed-off-by: Przemyslaw Marczak Tested-by: Lukasz Majewski [TestHW: Exynos4412-Trats2] --- drivers/dfu/dfu.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index 648f261..ad0a7e7 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -95,8 +95,12 @@ unsigned char *dfu_get_buf(struct dfu_entity *dfu) return dfu_buf; s = getenv("dfu_bufsiz"); - dfu_buf_size = s ? (unsigned long)simple_strtol(s, NULL, 16) : - CONFIG_SYS_DFU_DATA_BUF_SIZE; + if (s) + dfu_buf_size = (unsigned long)simple_strtol(s, NULL, 0); + + if (!s || !dfu_buf_size) + dfu_buf_size = CONFIG_SYS_DFU_DATA_BUF_SIZE; + if (dfu->max_buf_size && dfu_buf_size > dfu->max_buf_size) dfu_buf_size = dfu->max_buf_size; -- cgit v1.1 From e1f6b0a02d3bf45737fcb2addf4125cebe0cbcf9 Mon Sep 17 00:00:00 2001 From: Steve Rae Date: Thu, 18 Dec 2014 12:13:42 +0100 Subject: disk: part_efi: move code to static functions Signed-off-by: Steve Rae Tested-by: Lukasz Majewski [Test HW: Exynos4412 - Trats2] --- disk/part_efi.c | 175 +++++++++++++++++++++++++++++++++----------------------- 1 file changed, 102 insertions(+), 73 deletions(-) diff --git a/disk/part_efi.c b/disk/part_efi.c index efed58f..2c77f29 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -69,6 +69,105 @@ static inline int is_bootable(gpt_entry *p) sizeof(efi_guid_t)); } +static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba, + lbaint_t lastlba) +{ + uint32_t crc32_backup = 0; + uint32_t calc_crc32; + + /* Check the GPT header signature */ + if (le64_to_cpu(gpt_h->signature) != GPT_HEADER_SIGNATURE) { + printf("%s signature is wrong: 0x%llX != 0x%llX\n", + "GUID Partition Table Header", + le64_to_cpu(gpt_h->signature), + GPT_HEADER_SIGNATURE); + return -1; + } + + /* Check the GUID Partition Table CRC */ + memcpy(&crc32_backup, &gpt_h->header_crc32, sizeof(crc32_backup)); + memset(&gpt_h->header_crc32, 0, sizeof(gpt_h->header_crc32)); + + calc_crc32 = efi_crc32((const unsigned char *)gpt_h, + le32_to_cpu(gpt_h->header_size)); + + memcpy(&gpt_h->header_crc32, &crc32_backup, sizeof(crc32_backup)); + + if (calc_crc32 != le32_to_cpu(crc32_backup)) { + printf("%s CRC is wrong: 0x%x != 0x%x\n", + "GUID Partition Table Header", + le32_to_cpu(crc32_backup), calc_crc32); + return -1; + } + + /* + * Check that the my_lba entry points to the LBA that contains the GPT + */ + if (le64_to_cpu(gpt_h->my_lba) != lba) { + printf("GPT: my_lba incorrect: %llX != " LBAF "\n", + le64_to_cpu(gpt_h->my_lba), + lba); + return -1; + } + + /* + * Check that the first_usable_lba and that the last_usable_lba are + * within the disk. + */ + if (le64_to_cpu(gpt_h->first_usable_lba) > lastlba) { + printf("GPT: first_usable_lba incorrect: %llX > " LBAF "\n", + le64_to_cpu(gpt_h->first_usable_lba), lastlba); + return -1; + } + if (le64_to_cpu(gpt_h->last_usable_lba) > lastlba) { + printf("GPT: last_usable_lba incorrect: %llX > " LBAF "\n", + le64_to_cpu(gpt_h->last_usable_lba), lastlba); + return -1; + } + + debug("GPT: first_usable_lba: %llX last_usable_lba: %llX last lba: " + LBAF "\n", le64_to_cpu(gpt_h->first_usable_lba), + le64_to_cpu(gpt_h->last_usable_lba), lastlba); + + return 0; +} + +static int validate_gpt_entries(gpt_header *gpt_h, gpt_entry *gpt_e) +{ + uint32_t calc_crc32; + + /* Check the GUID Partition Table Entry Array CRC */ + calc_crc32 = efi_crc32((const unsigned char *)gpt_e, + le32_to_cpu(gpt_h->num_partition_entries) * + le32_to_cpu(gpt_h->sizeof_partition_entry)); + + if (calc_crc32 != le32_to_cpu(gpt_h->partition_entry_array_crc32)) { + printf("%s: 0x%x != 0x%x\n", + "GUID Partition Table Entry Array CRC is wrong", + le32_to_cpu(gpt_h->partition_entry_array_crc32), + calc_crc32); + return -1; + } + + return 0; +} + +static void prepare_backup_gpt_header(gpt_header *gpt_h) +{ + uint32_t calc_crc32; + uint64_t val; + + /* recalculate the values for the Backup GPT Header */ + val = le64_to_cpu(gpt_h->my_lba); + gpt_h->my_lba = gpt_h->alternate_lba; + gpt_h->alternate_lba = cpu_to_le64(val); + gpt_h->header_crc32 = 0; + + calc_crc32 = efi_crc32((const unsigned char *)gpt_h, + le32_to_cpu(gpt_h->header_size)); + gpt_h->header_crc32 = cpu_to_le32(calc_crc32); +} + #ifdef CONFIG_EFI_PARTITION /* * Public Functions (include/part.h) @@ -259,7 +358,6 @@ int write_gpt_table(block_dev_desc_t *dev_desc, const int pte_blk_cnt = BLOCK_CNT((gpt_h->num_partition_entries * sizeof(gpt_entry)), dev_desc); u32 calc_crc32; - u64 val; debug("max lba: %x\n", (u32) dev_desc->lba); /* Setup the Protective MBR */ @@ -284,15 +382,7 @@ int write_gpt_table(block_dev_desc_t *dev_desc, != pte_blk_cnt) goto err; - /* recalculate the values for the Backup GPT Header */ - val = le64_to_cpu(gpt_h->my_lba); - gpt_h->my_lba = gpt_h->alternate_lba; - gpt_h->alternate_lba = cpu_to_le64(val); - gpt_h->header_crc32 = 0; - - calc_crc32 = efi_crc32((const unsigned char *)gpt_h, - le32_to_cpu(gpt_h->header_size)); - gpt_h->header_crc32 = cpu_to_le32(calc_crc32); + prepare_backup_gpt_header(gpt_h); if (dev_desc->block_write(dev_desc->dev, (lbaint_t)le64_to_cpu(gpt_h->last_usable_lba) @@ -511,10 +601,6 @@ static int is_pmbr_valid(legacy_mbr * mbr) static int is_gpt_valid(block_dev_desc_t *dev_desc, u64 lba, gpt_header *pgpt_head, gpt_entry **pgpt_pte) { - u32 crc32_backup = 0; - u32 calc_crc32; - u64 lastlba; - if (!dev_desc || !pgpt_head) { printf("%s: Invalid Argument(s)\n", __func__); return 0; @@ -527,55 +613,8 @@ static int is_gpt_valid(block_dev_desc_t *dev_desc, u64 lba, return 0; } - /* Check the GPT header signature */ - if (le64_to_cpu(pgpt_head->signature) != GPT_HEADER_SIGNATURE) { - printf("GUID Partition Table Header signature is wrong:" - "0x%llX != 0x%llX\n", - le64_to_cpu(pgpt_head->signature), - GPT_HEADER_SIGNATURE); - return 0; - } - - /* Check the GUID Partition Table CRC */ - memcpy(&crc32_backup, &pgpt_head->header_crc32, sizeof(crc32_backup)); - memset(&pgpt_head->header_crc32, 0, sizeof(pgpt_head->header_crc32)); - - calc_crc32 = efi_crc32((const unsigned char *)pgpt_head, - le32_to_cpu(pgpt_head->header_size)); - - memcpy(&pgpt_head->header_crc32, &crc32_backup, sizeof(crc32_backup)); - - if (calc_crc32 != le32_to_cpu(crc32_backup)) { - printf("GUID Partition Table Header CRC is wrong:" - "0x%x != 0x%x\n", - le32_to_cpu(crc32_backup), calc_crc32); - return 0; - } - - /* Check that the my_lba entry points to the LBA that contains the GPT */ - if (le64_to_cpu(pgpt_head->my_lba) != lba) { - printf("GPT: my_lba incorrect: %llX != %" PRIX64 "\n", - le64_to_cpu(pgpt_head->my_lba), - lba); + if (validate_gpt_header(pgpt_head, (lbaint_t)lba, dev_desc->lba)) return 0; - } - - /* Check the first_usable_lba and last_usable_lba are within the disk. */ - lastlba = (u64)dev_desc->lba; - if (le64_to_cpu(pgpt_head->first_usable_lba) > lastlba) { - printf("GPT: first_usable_lba incorrect: %llX > %" PRIX64 "\n", - le64_to_cpu(pgpt_head->first_usable_lba), lastlba); - return 0; - } - if (le64_to_cpu(pgpt_head->last_usable_lba) > lastlba) { - printf("GPT: last_usable_lba incorrect: %llX > %" PRIX64 "\n", - le64_to_cpu(pgpt_head->last_usable_lba), lastlba); - return 0; - } - - debug("GPT: first_usable_lba: %llX last_usable_lba %llX last lba %" - PRIX64 "\n", le64_to_cpu(pgpt_head->first_usable_lba), - le64_to_cpu(pgpt_head->last_usable_lba), lastlba); /* Read and allocate Partition Table Entries */ *pgpt_pte = alloc_read_gpt_entries(dev_desc, pgpt_head); @@ -584,17 +623,7 @@ static int is_gpt_valid(block_dev_desc_t *dev_desc, u64 lba, return 0; } - /* Check the GUID Partition Table Entry Array CRC */ - calc_crc32 = efi_crc32((const unsigned char *)*pgpt_pte, - le32_to_cpu(pgpt_head->num_partition_entries) * - le32_to_cpu(pgpt_head->sizeof_partition_entry)); - - if (calc_crc32 != le32_to_cpu(pgpt_head->partition_entry_array_crc32)) { - printf("GUID Partition Table Entry Array CRC is wrong:" - "0x%x != 0x%x\n", - le32_to_cpu(pgpt_head->partition_entry_array_crc32), - calc_crc32); - + if (validate_gpt_entries(pgpt_head, *pgpt_pte)) { free(*pgpt_pte); return 0; } -- cgit v1.1 From 0ff7e585df83470139739533bdbf41114f395470 Mon Sep 17 00:00:00 2001 From: Steve Rae Date: Fri, 12 Dec 2014 15:51:54 -0800 Subject: fastboot: handle flash write to GPT partitions Implement a feature to allow fastboot to write the downloaded image to the space reserved for the Protective MBR and the Primary GUID Partition Table. Additionally, prepare and write the Backup GUID Partition Table. Signed-off-by: Steve Rae Tested-by: Lukasz Majewski [Test HW: Exynos4412 - Trats2] --- README | 9 ++++++ common/fb_mmc.c | 26 ++++++++++++++-- disk/part_efi.c | 93 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ include/part.h | 20 +++++++++++++ 4 files changed, 145 insertions(+), 3 deletions(-) diff --git a/README b/README index 4ca04d0..42ece99 100644 --- a/README +++ b/README @@ -1773,6 +1773,15 @@ The following options need to be configured: regarding the non-volatile storage device. Define this to the eMMC device that fastboot should use to store the image. + CONFIG_FASTBOOT_GPT_NAME + The fastboot "flash" command supports writing the downloaded + image to the Protective MBR and the Primary GUID Partition + Table. (Additionally, this downloaded image is post-processed + to generate and write the Backup GUID Partition Table.) + This occurs when the specified "partition name" on the + "fastboot flash" command line matches this value. + Default is GPT_ENTRY_NAME (currently "gpt") if undefined. + - Journaling Flash filesystem support: CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE, CONFIG_JFFS2_NAND_DEV diff --git a/common/fb_mmc.c b/common/fb_mmc.c index fb06d8a..6ea3938 100644 --- a/common/fb_mmc.c +++ b/common/fb_mmc.c @@ -4,12 +4,17 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include #include #include +#ifndef CONFIG_FASTBOOT_GPT_NAME +#define CONFIG_FASTBOOT_GPT_NAME GPT_ENTRY_NAME +#endif + /* The 64 defined bytes plus the '\0' */ #define RESPONSE_LEN (64 + 1) @@ -62,7 +67,6 @@ static void write_raw_image(block_dev_desc_t *dev_desc, disk_partition_t *info, void fb_mmc_flash_write(const char *cmd, void *download_buffer, unsigned int download_bytes, char *response) { - int ret; block_dev_desc_t *dev_desc; disk_partition_t info; @@ -76,8 +80,24 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer, return; } - ret = get_partition_info_efi_by_name(dev_desc, cmd, &info); - if (ret) { + if (strcmp(cmd, CONFIG_FASTBOOT_GPT_NAME) == 0) { + printf("%s: updating MBR, Primary and Backup GPT(s)\n", + __func__); + if (is_valid_gpt_buf(dev_desc, download_buffer)) { + printf("%s: invalid GPT - refusing to write to flash\n", + __func__); + fastboot_fail("invalid GPT partition"); + return; + } + if (write_mbr_and_gpt_partitions(dev_desc, download_buffer)) { + printf("%s: writing GPT partitions failed\n", __func__); + fastboot_fail("writing GPT partitions failed"); + return; + } + printf("........ success\n"); + fastboot_okay(""); + return; + } else if (get_partition_info_efi_by_name(dev_desc, cmd, &info)) { error("cannot find partition: '%s'\n", cmd); fastboot_fail("cannot find partition"); return; diff --git a/disk/part_efi.c b/disk/part_efi.c index 2c77f29..338010e 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -161,6 +161,8 @@ static void prepare_backup_gpt_header(gpt_header *gpt_h) val = le64_to_cpu(gpt_h->my_lba); gpt_h->my_lba = gpt_h->alternate_lba; gpt_h->alternate_lba = cpu_to_le64(val); + gpt_h->partition_entry_lba = + cpu_to_le64(le64_to_cpu(gpt_h->last_usable_lba) + 1); gpt_h->header_crc32 = 0; calc_crc32 = efi_crc32((const unsigned char *)gpt_h, @@ -545,6 +547,97 @@ err: free(gpt_h); return ret; } + +int is_valid_gpt_buf(block_dev_desc_t *dev_desc, void *buf) +{ + gpt_header *gpt_h; + gpt_entry *gpt_e; + + /* determine start of GPT Header in the buffer */ + gpt_h = buf + (GPT_PRIMARY_PARTITION_TABLE_LBA * + dev_desc->blksz); + if (validate_gpt_header(gpt_h, GPT_PRIMARY_PARTITION_TABLE_LBA, + dev_desc->lba)) + return -1; + + /* determine start of GPT Entries in the buffer */ + gpt_e = buf + (le64_to_cpu(gpt_h->partition_entry_lba) * + dev_desc->blksz); + if (validate_gpt_entries(gpt_h, gpt_e)) + return -1; + + return 0; +} + +int write_mbr_and_gpt_partitions(block_dev_desc_t *dev_desc, void *buf) +{ + gpt_header *gpt_h; + gpt_entry *gpt_e; + int gpt_e_blk_cnt; + lbaint_t lba; + int cnt; + + if (is_valid_gpt_buf(dev_desc, buf)) + return -1; + + /* determine start of GPT Header in the buffer */ + gpt_h = buf + (GPT_PRIMARY_PARTITION_TABLE_LBA * + dev_desc->blksz); + + /* determine start of GPT Entries in the buffer */ + gpt_e = buf + (le64_to_cpu(gpt_h->partition_entry_lba) * + dev_desc->blksz); + gpt_e_blk_cnt = BLOCK_CNT((le32_to_cpu(gpt_h->num_partition_entries) * + le32_to_cpu(gpt_h->sizeof_partition_entry)), + dev_desc); + + /* write MBR */ + lba = 0; /* MBR is always at 0 */ + cnt = 1; /* MBR (1 block) */ + if (dev_desc->block_write(dev_desc->dev, lba, cnt, buf) != cnt) { + printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n", + __func__, "MBR", cnt, lba); + return 1; + } + + /* write Primary GPT */ + lba = GPT_PRIMARY_PARTITION_TABLE_LBA; + cnt = 1; /* GPT Header (1 block) */ + if (dev_desc->block_write(dev_desc->dev, lba, cnt, gpt_h) != cnt) { + printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n", + __func__, "Primary GPT Header", cnt, lba); + return 1; + } + + lba = le64_to_cpu(gpt_h->partition_entry_lba); + cnt = gpt_e_blk_cnt; + if (dev_desc->block_write(dev_desc->dev, lba, cnt, gpt_e) != cnt) { + printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n", + __func__, "Primary GPT Entries", cnt, lba); + return 1; + } + + prepare_backup_gpt_header(gpt_h); + + /* write Backup GPT */ + lba = le64_to_cpu(gpt_h->partition_entry_lba); + cnt = gpt_e_blk_cnt; + if (dev_desc->block_write(dev_desc->dev, lba, cnt, gpt_e) != cnt) { + printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n", + __func__, "Backup GPT Entries", cnt, lba); + return 1; + } + + lba = le64_to_cpu(gpt_h->my_lba); + cnt = 1; /* GPT Header (1 block) */ + if (dev_desc->block_write(dev_desc->dev, lba, cnt, gpt_h) != cnt) { + printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n", + __func__, "Backup GPT Header", cnt, lba); + return 1; + } + + return 0; +} #endif /* diff --git a/include/part.h b/include/part.h index a496a4a..8ea9b30 100644 --- a/include/part.h +++ b/include/part.h @@ -244,6 +244,26 @@ int gpt_fill_header(block_dev_desc_t *dev_desc, gpt_header *gpt_h, */ int gpt_restore(block_dev_desc_t *dev_desc, char *str_disk_guid, disk_partition_t *partitions, const int parts_count); + +/** + * is_valid_gpt_buf() - Ensure that the Primary GPT information is valid + * + * @param dev_desc - block device descriptor + * @param buf - buffer which contains the MBR and Primary GPT info + * + * @return - '0' on success, otherwise error + */ +int is_valid_gpt_buf(block_dev_desc_t *dev_desc, void *buf); + +/** + * write_mbr_and_gpt_partitions() - write MBR, Primary GPT and Backup GPT + * + * @param dev_desc - block device descriptor + * @param buf - buffer which contains the MBR and Primary GPT info + * + * @return - '0' on success, otherwise error + */ +int write_mbr_and_gpt_partitions(block_dev_desc_t *dev_desc, void *buf); #endif #endif /* _PART_H */ -- cgit v1.1 From 7e8ffa4ed8194e11c52830a7ea47e28f496c24d5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 14 Dec 2014 17:15:35 -0700 Subject: x86: ifdtool: Correct a debug() missing parameter This is missing a parameter. Fix it to avoid a warning when debug is enabled. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- tools/ifdtool.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 4a27b82..4cdfdcc 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -54,7 +54,8 @@ static struct fdbar_t *find_fd(char *image, int size) return NULL; } - debug("Found Flash Descriptor signature at 0x%08x\n", i); + debug("Found Flash Descriptor signature at 0x%08lx\n", + (char *)ptr - image); return (struct fdbar_t *)ptr; } -- cgit v1.1 From fa8d3b00f9a1d0cdedcac3c26993f0b0230f2771 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 14 Dec 2014 17:15:36 -0700 Subject: x86: ifdtool: Display filename when file errors are reported When a file is missing it helps to know which file. Update the error message to print this information. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- tools/ifdtool.c | 30 ++++++++++++++++++------------ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 4cdfdcc..8afb6b5 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -465,6 +465,16 @@ static int write_regions(char *image, int size) return ret; } +static int perror_fname(const char *fmt, const char *fname) +{ + char msg[strlen(fmt) + strlen(fname) + 1]; + + sprintf(msg, fmt, fname); + perror(msg); + + return -1; +} + /** * write_image() - Write the image to a file * @@ -481,10 +491,10 @@ static int write_image(char *filename, char *image, int size) new_fd = open(filename, O_WRONLY | O_CREAT | O_TRUNC, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH); - if (write(new_fd, image, size) != size) { - perror("Error while writing"); - return -1; - } + if (new_fd < 0) + return perror_fname("Could not open file '%s'", filename); + if (write(new_fd, image, size) != size) + return perror_fname("Could not write file '%s'", filename); close(new_fd); return 0; @@ -586,14 +596,10 @@ int open_for_read(const char *fname, int *sizep) int fd = open(fname, O_RDONLY); struct stat buf; - if (fd == -1) { - perror("Could not open file"); - return -1; - } - if (fstat(fd, &buf) == -1) { - perror("Could not stat file"); - return -1; - } + if (fd == -1) + return perror_fname("Could not open file '%s'", fname); + if (fstat(fd, &buf) == -1) + return perror_fname("Could not stat file '%s'", fname); *sizep = buf.st_size; debug("File %s is %d bytes\n", fname, *sizep); -- cgit v1.1 From 65851fcec305bae079b35e17103aa61c8ef54674 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 14 Dec 2014 17:15:37 -0700 Subject: x86: ifdtool: Use a structure for the file/address list Rather than two independent arrays, use a single array of a suitable structure. Also add a 'type' member since we will shortly add additional types. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- tools/ifdtool.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 8afb6b5..4077ba8 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -32,6 +32,16 @@ #define FLREG_BASE(reg) ((reg & 0x00000fff) << 12); #define FLREG_LIMIT(reg) (((reg & 0x0fff0000) >> 4) | 0xfff); +enum input_file_type_t { + IF_normal, +}; + +struct input_file { + char *fname; + unsigned int addr; + enum input_file_type_t type; +}; + /** * find_fd() - Find the flash description in the ROM image * @@ -790,8 +800,7 @@ int main(int argc, char *argv[]) char *desc_fname = NULL, *addr_str = NULL; int region_type = -1, inputfreq = 0; enum spi_frequency spifreq = SPI_FREQUENCY_20MHZ; - unsigned int addr[WRITE_MAX]; - char *wr_fname[WRITE_MAX]; + struct input_file input_file[WRITE_MAX], *ifile; unsigned char wr_idx, wr_num = 0; int rom_size = -1; bool write_it; @@ -895,14 +904,16 @@ int main(int argc, char *argv[]) exit(EXIT_SUCCESS); break; case 'w': + ifile = &input_file[wr_num]; mode_write = 1; if (wr_num < WRITE_MAX) { if (get_two_words(optarg, &addr_str, - &wr_fname[wr_num])) { + &ifile->fname)) { print_usage(argv[0]); exit(EXIT_FAILURE); } - addr[wr_num] = strtol(optarg, NULL, 0); + ifile->addr = strtol(optarg, NULL, 0); + ifile->type = IF_normal; wr_num++; } else { fprintf(stderr, @@ -1022,8 +1033,9 @@ int main(int argc, char *argv[]) if (mode_write) { for (wr_idx = 0; wr_idx < wr_num; wr_idx++) { - ret = write_data(image, size, - addr[wr_idx], wr_fname[wr_idx]); + ifile = &input_file[wr_idx]; + ret = write_data(image, size, ifile->addr, + ifile->fname); if (ret) break; } -- cgit v1.1 From 31eca697276ef9aced10b802a869e7783439482e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 15 Dec 2014 22:02:38 -0700 Subject: x86: ifdtool: Add support for early microcode access Some Intel CPUs use an 'FSP' binary blob which provides an inflexible means of starting up the CPU. One result is that microcode updates can only be done before RAM is available and therefore parsing of the device tree is impracticle. Worse, the addess of the microcode update must be stored in ROM since a pointer to its start address and size is passed to the 'FSP' blob. It is not possible to perform any calculations to obtain the address and size. To work around this, ifdtool is enhanced to work out the address and size of the first microcode update it finds in the supplied device tree. It then writes these into the correct place in the ROM. U-Boot can then start up the FSP correctly. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- tools/Makefile | 1 + tools/ifdtool.c | 110 +++++++++++++++++++++++++++++++++++++++++++++++++++----- 2 files changed, 103 insertions(+), 8 deletions(-) diff --git a/tools/Makefile b/tools/Makefile index a4216a1..e549f8e 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -126,6 +126,7 @@ hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl HOSTCFLAGS_mkexynosspl.o := -pedantic +ifdtool-objs := $(LIBFDT_OBJS) ifdtool.o hostprogs-$(CONFIG_X86) += ifdtool hostprogs-$(CONFIG_MX23) += mxsboot diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 4077ba8..fe8366b 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "ifdtool.h" #undef DEBUG @@ -34,6 +35,8 @@ enum input_file_type_t { IF_normal, + IF_fdt, + IF_uboot, }; struct input_file { @@ -703,7 +706,7 @@ int inject_region(char *image, int size, int region_type, char *region_fname) * 0xffffffff so use an address relative to that. For an * 8MB ROM the start address is 0xfff80000. * @write_fname: Filename to add to the image - * @return 0 if OK, -ve on error + * @return number of bytes written if OK, -ve on error */ static int write_data(char *image, int size, unsigned int addr, const char *write_fname) @@ -715,7 +718,7 @@ static int write_data(char *image, int size, unsigned int addr, if (write_fd < 0) return write_fd; - offset = addr + size; + offset = (uint32_t)(addr + size); debug("Writing %s to offset %#x\n", write_fname, offset); if (offset < 0 || offset + write_size > size) { @@ -731,6 +734,68 @@ static int write_data(char *image, int size, unsigned int addr, close(write_fd); + return write_size; +} + +/** + * write_uboot() - Write U-Boot, device tree and microcode pointer + * + * This writes U-Boot into a place in the flash, followed by its device tree. + * The microcode pointer is written so that U-Boot can find the microcode in + * the device tree very early in boot. + * + * @image: Pointer to image + * @size: Size of image in bytes + * @uboot: Input file information for u-boot.bin + * @fdt: Input file information for u-boot.dtb + * @ucode_ptr: Address in U-Boot where the microcode pointer should be placed + * @return 0 if OK, -ve on error + */ +static int write_uboot(char *image, int size, struct input_file *uboot, + struct input_file *fdt, unsigned int ucode_ptr) +{ + const void *blob; + const char *data; + int uboot_size; + uint32_t *ptr; + int data_size; + int offset; + int node; + int ret; + + uboot_size = write_data(image, size, uboot->addr, uboot->fname); + if (uboot_size < 0) + return uboot_size; + fdt->addr = uboot->addr + uboot_size; + debug("U-Boot size %#x, FDT at %#x\n", uboot_size, fdt->addr); + ret = write_data(image, size, fdt->addr, fdt->fname); + if (ret < 0) + return ret; + + if (ucode_ptr) { + blob = (void *)image + (uint32_t)(fdt->addr + size); + debug("DTB at %lx\n", (char *)blob - image); + node = fdt_node_offset_by_compatible(blob, 0, + "intel,microcode"); + if (node < 0) { + debug("No microcode found in FDT: %s\n", + fdt_strerror(node)); + return -ENOENT; + } + data = fdt_getprop(blob, node, "data", &data_size); + if (!data) { + debug("No microcode data found in FDT: %s\n", + fdt_strerror(data_size)); + return -ENOENT; + } + offset = ucode_ptr - uboot->addr; + ptr = (void *)image + offset; + ptr[0] = uboot->addr + (data - image); + ptr[1] = data_size; + debug("Wrote microcode pointer at %x: addr=%x, size=%x\n", + ucode_ptr, ptr[0], ptr[1]); + } + return 0; } @@ -800,7 +865,7 @@ int main(int argc, char *argv[]) char *desc_fname = NULL, *addr_str = NULL; int region_type = -1, inputfreq = 0; enum spi_frequency spifreq = SPI_FREQUENCY_20MHZ; - struct input_file input_file[WRITE_MAX], *ifile; + struct input_file input_file[WRITE_MAX], *ifile, *fdt = NULL; unsigned char wr_idx, wr_num = 0; int rom_size = -1; bool write_it; @@ -808,6 +873,8 @@ int main(int argc, char *argv[]) char *outfile = NULL; struct stat buf; int size = 0; + unsigned int ucode_ptr = 0; + bool have_uboot = false; int bios_fd; char *image; int ret; @@ -817,18 +884,21 @@ int main(int argc, char *argv[]) {"descriptor", 1, NULL, 'D'}, {"em100", 0, NULL, 'e'}, {"extract", 0, NULL, 'x'}, + {"fdt", 1, NULL, 'f'}, {"inject", 1, NULL, 'i'}, {"lock", 0, NULL, 'l'}, + {"microcode", 1, NULL, 'm'}, {"romsize", 1, NULL, 'r'}, {"spifreq", 1, NULL, 's'}, {"unlock", 0, NULL, 'u'}, + {"uboot", 1, NULL, 'U'}, {"write", 1, NULL, 'w'}, {"version", 0, NULL, 'v'}, {"help", 0, NULL, 'h'}, {0, 0, 0, 0} }; - while ((opt = getopt_long(argc, argv, "cdD:ehi:lr:s:uvw:x?", + while ((opt = getopt_long(argc, argv, "cdD:ef:hi:lm:r:s:uU:vw:x?", long_options, &option_index)) != EOF) { switch (opt) { case 'c': @@ -871,6 +941,9 @@ int main(int argc, char *argv[]) case 'l': mode_locked = 1; break; + case 'm': + ucode_ptr = strtoul(optarg, NULL, 0); + break; case 'r': rom_size = strtol(optarg, NULL, 0); debug("ROM size %d\n", rom_size); @@ -904,6 +977,8 @@ int main(int argc, char *argv[]) exit(EXIT_SUCCESS); break; case 'w': + case 'U': + case 'f': ifile = &input_file[wr_num]; mode_write = 1; if (wr_num < WRITE_MAX) { @@ -913,7 +988,12 @@ int main(int argc, char *argv[]) exit(EXIT_FAILURE); } ifile->addr = strtol(optarg, NULL, 0); - ifile->type = IF_normal; + ifile->type = opt == 'f' ? IF_fdt : + opt == 'U' ? IF_uboot : IF_normal; + if (ifile->type == IF_fdt) + fdt = ifile; + else if (ifile->type == IF_uboot) + have_uboot = true; wr_num++; } else { fprintf(stderr, @@ -970,6 +1050,13 @@ int main(int argc, char *argv[]) exit(EXIT_FAILURE); } + if (have_uboot && !fdt) { + fprintf(stderr, + "You must supply a device tree file for U-Boot\n\n"); + print_usage(argv[0]); + exit(EXIT_FAILURE); + } + filename = argv[optind]; if (optind + 2 != argc) outfile = argv[optind + 1]; @@ -1034,9 +1121,16 @@ int main(int argc, char *argv[]) if (mode_write) { for (wr_idx = 0; wr_idx < wr_num; wr_idx++) { ifile = &input_file[wr_idx]; - ret = write_data(image, size, ifile->addr, + if (ifile->type == IF_fdt) { + continue; + } else if (ifile->type == IF_uboot) { + ret = write_uboot(image, size, ifile, fdt, + ucode_ptr); + } else { + ret = write_data(image, size, ifile->addr, ifile->fname); - if (ret) + } + if (ret < 0) break; } } @@ -1071,5 +1165,5 @@ int main(int argc, char *argv[]) free(image); close(bios_fd); - return ret ? 1 : 0; + return ret < 0 ? 1 : 0; } -- cgit v1.1 From 81f79ef792b5206c04585a41053c6a414b8c2c24 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 15 Dec 2014 22:02:39 -0700 Subject: x86: Move microcode updates into a separate directory We might end up with a few of these, so put them in their own directory. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/dts/link.dts | 4 +- arch/x86/dts/m12206a7_00000028.dtsi | 622 --------------------- arch/x86/dts/m12306a9_00000017.dtsi | 750 -------------------------- arch/x86/dts/microcode/m12206a7_00000028.dtsi | 622 +++++++++++++++++++++ arch/x86/dts/microcode/m12306a9_00000017.dtsi | 750 ++++++++++++++++++++++++++ 5 files changed, 1374 insertions(+), 1374 deletions(-) delete mode 100644 arch/x86/dts/m12206a7_00000028.dtsi delete mode 100644 arch/x86/dts/m12306a9_00000017.dtsi create mode 100644 arch/x86/dts/microcode/m12206a7_00000028.dtsi create mode 100644 arch/x86/dts/microcode/m12306a9_00000017.dtsi diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 592af16..c435a67 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -214,10 +214,10 @@ microcode { update@0 { -#include "m12206a7_00000028.dtsi" +#include "microcode/m12206a7_00000028.dtsi" }; update@1 { -#include "m12306a9_00000017.dtsi" +#include "microcode/m12306a9_00000017.dtsi" }; }; diff --git a/arch/x86/dts/m12206a7_00000028.dtsi b/arch/x86/dts/m12206a7_00000028.dtsi deleted file mode 100644 index bcd5248..0000000 --- a/arch/x86/dts/m12206a7_00000028.dtsi +++ /dev/null @@ -1,622 +0,0 @@ -/* - * Copyright (c) <1995-2013>, Intel Corporation. - * All rights reserved. - * - * Redistribution. Redistribution and use in binary form, without modification, are - * permitted provided that the following conditions are met: - * .Redistributions must reproduce the above copyright notice and the following - * disclaimer in the documentation and/or other materials provided with the - * distribution. - * Neither the name of Intel Corporation nor the names of its suppliers may be used - * to endorse or promote products derived from this software without specific prior - * written permission. - * .No reverse engineering, decompilation, or disassembly of this software is - * permitted. - * ."Binary form" includes any format commonly used for electronic conveyance - * which is a reversible, bit-exact translation of binary representation to ASCII or - * ISO text, for example, "uuencode." - * - * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT - * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *--- - * This is a device tree fragment. Use #include to add these properties to a - * node. - */ - -compatible = "intel,microcode"; -intel,header-version = <1>; -intel,update-revision = <0x28>; -intel,date-code = <0x04242012>; -intel,processor-signature = <0x000206a7>; -intel,checksum = <0xf3e9935d>; -intel,loader-revision = <1>; -intel,processor-flags = <0x12>; - -/* The 48-byte public header is omitted. */ -data = < - 0x00000000 0x000000a1 0x00020001 0x00000028 - 0x00000000 0x00000000 0x20120423 0x000008f1 - 0x00000001 0x000206a7 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x000008f1 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x52b813ac 0xdb8994c7 0x70e9f6bb 0x9d6db2ff - 0xf4d70f5d 0x5b1eccf6 0xac59106f 0x0ae2e2c1 - 0x1a7bbeb1 0x355a1d62 0x2e7eb594 0x09f8dea9 - 0x432a49e4 0xbf520253 0xdafa4010 0x893a858a - 0x766e0efb 0xd91e196d 0x838bd2ef 0xe5146494 - 0xd515f413 0x29704828 0xe85598b6 0xdcbe6c51 - 0x88eabbfa 0xa1e8909f 0xd8931721 0x35386554 - 0x089a78a7 0xd9914775 0xd4644748 0x1556a4dc - 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Redistribution and use in binary form, without modification, are - * permitted provided that the following conditions are met: - * .Redistributions must reproduce the above copyright notice and the following - * disclaimer in the documentation and/or other materials provided with the - * distribution. - * Neither the name of Intel Corporation nor the names of its suppliers may be used - * to endorse or promote products derived from this software without specific prior - * written permission. - * .No reverse engineering, decompilation, or disassembly of this software is - * permitted. - * ."Binary form" includes any format commonly used for electronic conveyance - * which is a reversible, bit-exact translation of binary representation to ASCII or - * ISO text, for example, "uuencode." - * - * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT - * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *--- - * This is a device tree fragment. Use #include to add these properties to a - * node. - */ - -compatible = "intel,microcode"; -intel,header-version = <1>; -intel,update-revision = <0x17>; -intel,date-code = <0x01092013>; -intel,processor-signature = <0x000306a9>; -intel,checksum = <0x3546450b>; -intel,loader-revision = <1>; -intel,processor-flags = <0x12>; - -/* The 48-byte public header is omitted. */ -data = < - 0x00000000 0x000000a1 0x00020001 0x00000017 - 0x00000000 0x00000000 0x20130107 0x00000a61 - 0x00000001 0x000306a9 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x86c5b0d4 0xf6978804 0x7f4f5870 0x6319dc3c - 0xbb3b7d61 0x33cf9075 0xe8424658 0xf611a357 - 0x5a3401db 0x42caecce 0xb4d8e75e 0xe6dbaf24 - 0x7861b35f 0x6bd717bc 0x23b9b731 0x82ec1ac8 - 0x20337b64 0x5396dbf1 0x59973bff 0x724bc7e9 - 0x5237193b 0x0b8647c1 0x6a0d0e16 0xbf9ddb5b - 0xace2cc1c 0xad707638 0x056f102f 0xa37e60f8 - 0x76255642 0xfb86e030 0xb8069a40 0x367795f1 - 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Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *--- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x28>; +intel,date-code = <0x04242012>; +intel,processor-signature = <0x000206a7>; +intel,checksum = <0xf3e9935d>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The 48-byte public header is omitted. */ +data = < + 0x00000000 0x000000a1 0x00020001 0x00000028 + 0x00000000 0x00000000 0x20120423 0x000008f1 + 0x00000001 0x000206a7 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x000008f1 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x52b813ac 0xdb8994c7 0x70e9f6bb 0x9d6db2ff + 0xf4d70f5d 0x5b1eccf6 0xac59106f 0x0ae2e2c1 + 0x1a7bbeb1 0x355a1d62 0x2e7eb594 0x09f8dea9 + 0x432a49e4 0xbf520253 0xdafa4010 0x893a858a + 0x766e0efb 0xd91e196d 0x838bd2ef 0xe5146494 + 0xd515f413 0x29704828 0xe85598b6 0xdcbe6c51 + 0x88eabbfa 0xa1e8909f 0xd8931721 0x35386554 + 0x089a78a7 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<1995-2013>, Intel Corporation. + * All rights reserved. + * + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *--- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x17>; +intel,date-code = <0x01092013>; +intel,processor-signature = <0x000306a9>; +intel,checksum = <0x3546450b>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The 48-byte public header is omitted. */ +data = < + 0x00000000 0x000000a1 0x00020001 0x00000017 + 0x00000000 0x00000000 0x20130107 0x00000a61 + 0x00000001 0x000306a9 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x86c5b0d4 0xf6978804 0x7f4f5870 0x6319dc3c + 0xbb3b7d61 0x33cf9075 0xe8424658 0xf611a357 + 0x5a3401db 0x42caecce 0xb4d8e75e 0xe6dbaf24 + 0x7861b35f 0x6bd717bc 0x23b9b731 0x82ec1ac8 + 0x20337b64 0x5396dbf1 0x59973bff 0x724bc7e9 + 0x5237193b 0x0b8647c1 0x6a0d0e16 0xbf9ddb5b + 0xace2cc1c 0xad707638 0x056f102f 0xa37e60f8 + 0x76255642 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0x5fdfa5da 0x02ef9bb2 + 0x792d3194 0xbed63f21 0x0b6dc5f1 0xc9d7fe08 + 0x6df7883d 0x366566cf 0xef772769 0x37826465 + 0x1cdc3086 0xa69ff7b6 0x235012ea 0x292f7e75 + 0x30bdd0fd 0xffdc9df1 0x95c6d570 0xec206204 + 0xc6cd42cb 0xc0d6dfd9 0xb7a16b71 0x17fa527e + 0x295f2c79 0x990f9820 0x8b8f447d 0x193f9ad1 + 0xebddb2af 0x5dd532eb 0xf1bbd8e8 0x3444a3f4 + 0x18ccce93 0x05edeb4f 0xc4a6b935 0xba37aab0 + 0x96076ba4 0x250dc2f7 0xc4093548 0x030e777d + 0x7ea40933 0x8da7b1dd 0x59c0b79f 0x807d437c + 0xf5233ddf 0x54c1983f 0xfc18771b 0xe74b85f0 + 0xdbd725b5 0x70cdd153 0x4ffe300c 0xfda4bdae + 0xf4ac75d2 0x91c4e15a 0x34d92b97 0x16356a79 + >; -- cgit v1.1 From cf29e3e303dfe8c81ee21b190d91be55fc240647 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 15 Dec 2014 22:02:40 -0700 Subject: x86: ivybridge: Update the microcode There are new microcode revisions available. Update them. Also change the format so that the first 48 bytes are not omitted from the device tree data. Signed-off-by: Simon Glass --- arch/x86/cpu/ivybridge/microcode_intel.c | 2 + arch/x86/dts/link.dts | 4 +- arch/x86/dts/microcode/m12206a7_00000028.dtsi | 622 -------------------- arch/x86/dts/microcode/m12206a7_00000029.dtsi | 686 ++++++++++++++++++++++ arch/x86/dts/microcode/m12306a9_00000017.dtsi | 750 ------------------------ arch/x86/dts/microcode/m12306a9_0000001b.dtsi | 814 ++++++++++++++++++++++++++ 6 files changed, 1504 insertions(+), 1374 deletions(-) delete mode 100644 arch/x86/dts/microcode/m12206a7_00000028.dtsi create mode 100644 arch/x86/dts/microcode/m12206a7_00000029.dtsi delete mode 100644 arch/x86/dts/microcode/m12306a9_00000017.dtsi create mode 100644 arch/x86/dts/microcode/m12306a9_0000001b.dtsi diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/ivybridge/microcode_intel.c index 8c11a63..79c075f 100644 --- a/arch/x86/cpu/ivybridge/microcode_intel.c +++ b/arch/x86/cpu/ivybridge/microcode_intel.c @@ -40,6 +40,8 @@ static int microcode_decode_node(const void *blob, int node, update->data = fdt_getprop(blob, node, "data", &update->size); if (!update->data) return -EINVAL; + update->data += 48; + update->size -= 48; update->header_version = fdtdec_get_int(blob, node, "intel,header-version", 0); diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index c435a67..a739080 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -214,10 +214,10 @@ microcode { update@0 { -#include "microcode/m12206a7_00000028.dtsi" +#include "microcode/m12206a7_00000029.dtsi" }; update@1 { -#include "microcode/m12306a9_00000017.dtsi" +#include "microcode/m12306a9_0000001b.dtsi" }; }; diff --git a/arch/x86/dts/microcode/m12206a7_00000028.dtsi b/arch/x86/dts/microcode/m12206a7_00000028.dtsi deleted file mode 100644 index bcd5248..0000000 --- a/arch/x86/dts/microcode/m12206a7_00000028.dtsi +++ /dev/null @@ -1,622 +0,0 @@ -/* - * Copyright (c) <1995-2013>, Intel Corporation. - * All rights reserved. - * - * Redistribution. Redistribution and use in binary form, without modification, are - * permitted provided that the following conditions are met: - * .Redistributions must reproduce the above copyright notice and the following - * disclaimer in the documentation and/or other materials provided with the - * distribution. - * Neither the name of Intel Corporation nor the names of its suppliers may be used - * to endorse or promote products derived from this software without specific prior - * written permission. - * .No reverse engineering, decompilation, or disassembly of this software is - * permitted. - * ."Binary form" includes any format commonly used for electronic conveyance - * which is a reversible, bit-exact translation of binary representation to ASCII or - * ISO text, for example, "uuencode." - * - * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT - * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *--- - * This is a device tree fragment. Use #include to add these properties to a - * node. - */ - -compatible = "intel,microcode"; -intel,header-version = <1>; -intel,update-revision = <0x28>; -intel,date-code = <0x04242012>; -intel,processor-signature = <0x000206a7>; -intel,checksum = <0xf3e9935d>; -intel,loader-revision = <1>; -intel,processor-flags = <0x12>; - -/* The 48-byte public header is omitted. */ -data = < - 0x00000000 0x000000a1 0x00020001 0x00000028 - 0x00000000 0x00000000 0x20120423 0x000008f1 - 0x00000001 0x000206a7 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x000008f1 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x52b813ac 0xdb8994c7 0x70e9f6bb 0x9d6db2ff - 0xf4d70f5d 0x5b1eccf6 0xac59106f 0x0ae2e2c1 - 0x1a7bbeb1 0x355a1d62 0x2e7eb594 0x09f8dea9 - 0x432a49e4 0xbf520253 0xdafa4010 0x893a858a - 0x766e0efb 0xd91e196d 0x838bd2ef 0xe5146494 - 0xd515f413 0x29704828 0xe85598b6 0xdcbe6c51 - 0x88eabbfa 0xa1e8909f 0xd8931721 0x35386554 - 0x089a78a7 0xd9914775 0xd4644748 0x1556a4dc - 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Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x29>; +intel,date-code = <0x6122013>; +intel,processor-signature = <0x206a7>; +intel,checksum = <0xc9c91df0>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x29000000 0x13201206 0xa7060200 + 0xf01dc9c9 0x01000000 0x12000000 0xd0270000 + 0x00280000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x29000000 + 0x00000000 0x00000000 0x11061320 0xd1090000 + 0x01000000 0xa7060200 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xd1090000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0xfd2a2f68 0x82ac7ebb 0xa4916328 0x7480b81b + 0xd329a777 0x25750339 0x9a8f7a9b 0xf1da9cb8 + 0xb1be7b1a 0x621d5a35 0x94b57e2e 0xa9def809 + 0xe4492a43 0x530252bf 0x1040fada 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--- a/arch/x86/dts/microcode/m12306a9_00000017.dtsi +++ /dev/null @@ -1,750 +0,0 @@ -/* - * Copyright (c) <1995-2013>, Intel Corporation. - * All rights reserved. - * - * Redistribution. Redistribution and use in binary form, without modification, are - * permitted provided that the following conditions are met: - * .Redistributions must reproduce the above copyright notice and the following - * disclaimer in the documentation and/or other materials provided with the - * distribution. - * Neither the name of Intel Corporation nor the names of its suppliers may be used - * to endorse or promote products derived from this software without specific prior - * written permission. - * .No reverse engineering, decompilation, or disassembly of this software is - * permitted. - * ."Binary form" includes any format commonly used for electronic conveyance - * which is a reversible, bit-exact translation of binary representation to ASCII or - * ISO text, for example, "uuencode." - * - * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT - * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *--- - * This is a device tree fragment. Use #include to add these properties to a - * node. - */ - -compatible = "intel,microcode"; -intel,header-version = <1>; -intel,update-revision = <0x17>; -intel,date-code = <0x01092013>; -intel,processor-signature = <0x000306a9>; -intel,checksum = <0x3546450b>; -intel,loader-revision = <1>; -intel,processor-flags = <0x12>; - -/* The 48-byte public header is omitted. */ -data = < - 0x00000000 0x000000a1 0x00020001 0x00000017 - 0x00000000 0x00000000 0x20130107 0x00000a61 - 0x00000001 0x000306a9 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x86c5b0d4 0xf6978804 0x7f4f5870 0x6319dc3c - 0xbb3b7d61 0x33cf9075 0xe8424658 0xf611a357 - 0x5a3401db 0x42caecce 0xb4d8e75e 0xe6dbaf24 - 0x7861b35f 0x6bd717bc 0x23b9b731 0x82ec1ac8 - 0x20337b64 0x5396dbf1 0x59973bff 0x724bc7e9 - 0x5237193b 0x0b8647c1 0x6a0d0e16 0xbf9ddb5b - 0xace2cc1c 0xad707638 0x056f102f 0xa37e60f8 - 0x76255642 0xfb86e030 0xb8069a40 0x367795f1 - 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Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x1b>; +intel,date-code = <0x5292014>; +intel,processor-signature = <0x306a9>; +intel,checksum = <0x579ae07a>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x1b000000 0x14202905 0xa9060300 + 0x7ae09a57 0x01000000 0x12000000 0xd02f0000 + 0x00300000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x1b000000 + 0x00000000 0x00000000 0x16051420 0x610b0000 + 0x01000000 0xa9060300 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0xc2b13ad8 0x6ce74fea 0xd364ad12 0xf6404a69 + 0xc89041e4 0x217fa2f6 0x6ff6e43f 0x79cde4eb + 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6 + 0x5fb36178 0xbc17d76b 0x31b7b923 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0x66ed6178 0x26be9f81 0xeac41ee5 + 0xbe5e2e6b 0x177f9068 0xede56c48 0x438b3811 + 0xd5bd7ee4 0xc027d1a8 0xc1c0f725 0x48d4d4eb + 0x6ffa28d5 0xbd6ac9eb 0xd497781d 0x24d3a154 + 0x409bb5c0 0x8079bf76 0x90a522dc 0x19bf7033 + 0x1a529b6e 0xe5207e4d 0x3d49b7bc 0x3eca6d54 + 0xa37681a6 0xaa9a62e4 0xe54aa1e1 0xb91e7157 + 0x8cce8f65 0xbcbbd62c 0x7fa477b5 0x44f46b50 + 0x54263fcf 0x529cbb5d 0x8923e390 0x0778d6d7 + 0x0cc0503f 0x02c374ce 0xb89c3e5c 0x25b1b353 + 0xb227cb2d 0x44108698 0x5e5968c2 0x82c48632 + 0x0b8f4209 0x1a241879 0x9edca6f1 0xa1fa51ab + 0x206db0c6 0xbfbbbe98 0xa71c91f6 0xa1b28056 + 0xb8bfaaa9 0xa5914f75 0x77d26574 0xacfd459d + 0x77f7cab2 0x249ebf26 0xef902bdd 0x77f6e48d + 0x82497035 0x93333a9d 0x34ea9953 0x8f08d41c + >; -- cgit v1.1 From b591ee3913b7eeef851451641c85e1e014d2103f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 15 Dec 2014 22:02:41 -0700 Subject: x86: Correct problems in the microcode loading There are several problems in the code. The device tree decode is incorrect in ways that are masked due to a matching bug. Both are fixed. Also microcode_read_rev() should be inline and called before the microcode is written. Note: microcode writing does not work correctly on ivybridge for me. Further work is needed to resolve this. But this patch tidies up the existing code so that will be easier. Signed-off-by: Simon Glass --- arch/x86/cpu/ivybridge/microcode_intel.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/ivybridge/microcode_intel.c index 79c075f..0817751 100644 --- a/arch/x86/cpu/ivybridge/microcode_intel.c +++ b/arch/x86/cpu/ivybridge/microcode_intel.c @@ -50,17 +50,17 @@ static int microcode_decode_node(const void *blob, int node, update->date_code = fdtdec_get_int(blob, node, "intel,date-code", 0); update->processor_signature = fdtdec_get_int(blob, node, - "intel.processor-signature", 0); + "intel,processor-signature", 0); update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0); update->loader_revision = fdtdec_get_int(blob, node, - "loader-revision", 0); + "intel,loader-revision", 0); update->processor_flags = fdtdec_get_int(blob, node, - "processor-flags", 0); + "intel,processor-flags", 0); return 0; } -static uint32_t microcode_read_rev(void) +static inline uint32_t microcode_read_rev(void) { /* * Some Intel CPUs can be very finicky about the CPUID sequence used. @@ -116,6 +116,7 @@ int microcode_update_intel(void) { struct microcode_update cpu, update; const void *blob = gd->fdt_blob; + int skipped; int count; int node; int ret; @@ -123,12 +124,13 @@ int microcode_update_intel(void) microcode_read_cpu(&cpu); node = 0; count = 0; + skipped = 0; do { node = fdtdec_next_compatible(blob, node, COMPAT_INTEL_MICROCODE); if (node < 0) { debug("%s: Found %d updates\n", __func__, count); - return count ? 0 : -ENOENT; + return count ? 0 : skipped ? -EEXIST : -ENOENT; } ret = microcode_decode_node(blob, node, &update); @@ -137,12 +139,15 @@ int microcode_update_intel(void) ret); return ret; } - if (update.processor_signature == cpu.processor_signature && - (update.processor_flags & cpu.processor_flags)) { - debug("%s: Update already exists\n", __func__); - return -EEXIST; + if (!(update.processor_signature == cpu.processor_signature && + (update.processor_flags & cpu.processor_flags))) { + debug("%s: Skipping non-matching update, sig=%x, pf=%x\n", + __func__, update.processor_signature, + update.processor_flags); + skipped++; + continue; } - + ret = microcode_read_rev(); wrmsr(0x79, (ulong)update.data, 0); debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n", microcode_read_rev(), update.date_code & 0xffff, -- cgit v1.1 From efbeeafe9527f66852d05f206da73b10662cefb6 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:35 +0800 Subject: x86: Integrate Tunnel Creek processor microcode Integrate the processor microcode version 1.05 for Tunnel Creek, CPUID device 20661h. Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/dts/microcode/m0220661105_cv.dtsi | 368 +++++++++++++++++++++++++++++ 1 file changed, 368 insertions(+) create mode 100644 arch/x86/dts/microcode/m0220661105_cv.dtsi diff --git a/arch/x86/dts/microcode/m0220661105_cv.dtsi b/arch/x86/dts/microcode/m0220661105_cv.dtsi new file mode 100644 index 0000000..ada8bfc --- /dev/null +++ b/arch/x86/dts/microcode/m0220661105_cv.dtsi @@ -0,0 +1,368 @@ +/* + * Copyright (c) <1995-2014>, Intel Corporation. + * All rights reserved. + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + * + * Date: Sat Sep 13 22:51:38 CST 2014 + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x105>; +intel,date-code = <0x7182011>; +intel,processor-signature = <0x20661>; +intel,checksum = <0x52558795>; +intel,loader-revision = <1>; +intel,processor-flags = <0x2>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x05010000 0x11201807 0x61060200 + 0x95875552 0x01000000 0x02000000 0xd0130000 + 0x00140000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x05010000 + 0x19000000 0x00010500 0x15071120 0x01040000 + 0x01000000 0x61060200 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x9557a557 0x7d7a0fe3 0x8e2fbe53 0x0db9e346 + 0xd35c00d6 0x21bb34b7 0x662b6406 0xa0425035 + 0x3d028208 0xcb843695 0xee06be0a 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0x3ba56bb3 0x1c343938 0xabc0df54 + 0x8ba4f1e8 0xfbd4c592 0xb678c884 0xff3be2f1 + 0xca013570 0xfb0598df 0x3cb9cc1d 0xe3ba8ca3 + 0xc3d7ecee 0x0ae84a0b 0x0d70f0c3 0x963110ff + >; -- cgit v1.1 From b2e02d28653edac48d6def9791f2fa0ebc491498 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:36 +0800 Subject: x86: Add basic support to queensbay platform and crownbay board Implement minimum required functions for the basic support to queensbay platform and crownbay board. Currently the implementation is to call fsp_init() in the car_init(). We may move that call to cpu_init_f() in the future. Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/cpu/queensbay/Makefile | 9 +++ arch/x86/cpu/queensbay/tnc.c | 48 ++++++++++++++ arch/x86/cpu/queensbay/tnc_car.S | 127 ++++++++++++++++++++++++++++++++++++++ arch/x86/cpu/queensbay/tnc_dram.c | 78 +++++++++++++++++++++++ arch/x86/cpu/queensbay/tnc_pci.c | 61 ++++++++++++++++++ arch/x86/include/asm/ibmpc.h | 3 + board/intel/crownbay/MAINTAINERS | 6 ++ board/intel/crownbay/Makefile | 7 +++ board/intel/crownbay/crownbay.c | 21 +++++++ board/intel/crownbay/start.S | 9 +++ 10 files changed, 369 insertions(+) create mode 100644 arch/x86/cpu/queensbay/Makefile create mode 100644 arch/x86/cpu/queensbay/tnc.c create mode 100644 arch/x86/cpu/queensbay/tnc_car.S create mode 100644 arch/x86/cpu/queensbay/tnc_dram.c create mode 100644 arch/x86/cpu/queensbay/tnc_pci.c create mode 100644 board/intel/crownbay/MAINTAINERS create mode 100644 board/intel/crownbay/Makefile create mode 100644 board/intel/crownbay/crownbay.c create mode 100644 board/intel/crownbay/start.S diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile new file mode 100644 index 0000000..ace04ca --- /dev/null +++ b/arch/x86/cpu/queensbay/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2014, Bin Meng +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += tnc_car.o tnc_dram.o tnc.o +obj-y += fsp_configs.o fsp_support.o +obj-$(CONFIG_PCI) += tnc_pci.o diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c new file mode 100644 index 0000000..8b9815f --- /dev/null +++ b/arch/x86/cpu/queensbay/tnc.c @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +int arch_cpu_init(void) +{ + post_code(POST_CPU_INIT); +#ifdef CONFIG_SYS_X86_TSC_TIMER + timer_set_base(rdtsc()); +#endif + + return x86_cpu_init_f(); +} + +int print_cpuinfo(void) +{ + post_code(POST_CPU_INFO); + return default_print_cpuinfo(); +} + +void reset_cpu(ulong addr) +{ + /* cold reset */ + outb(0x06, PORT_RESET); +} + +void board_final_cleanup(void) +{ + u32 status; + + /* call into FspNotify */ + debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); + status = fsp_notify(NULL, INIT_PHASE_BOOT); + if (status != FSP_SUCCESS) + debug("fail, error code %x\n", status); + else + debug("OK\n"); + + return; +} diff --git a/arch/x86/cpu/queensbay/tnc_car.S b/arch/x86/cpu/queensbay/tnc_car.S new file mode 100644 index 0000000..6834a64 --- /dev/null +++ b/arch/x86/cpu/queensbay/tnc_car.S @@ -0,0 +1,127 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +.globl car_init +car_init: + /* + * Note: ebp holds the BIST value (built-in self test) so far, but ebp + * will be destroyed through the FSP call, thus we have to test the + * BIST value here before we call into FSP. + */ + test %ebp, %ebp + jz car_init_start + post_code(POST_BIST_FAILURE) + jmp die + +car_init_start: + post_code(POST_CAR_START) + lea find_fsp_header_romstack, %esp + jmp find_fsp_header + +find_fsp_header_ret: + /* EAX points to FSP_INFO_HEADER */ + mov %eax, %ebp + + /* sanity test */ + cmp $CONFIG_FSP_LOCATION, %eax + jb die + + /* calculate TempRamInitEntry address */ + mov 0x30(%ebp), %eax + add 0x1c(%ebp), %eax + + /* call FSP TempRamInitEntry to setup temporary stack */ + lea temp_ram_init_romstack, %esp + jmp *%eax + +temp_ram_init_ret: + addl $4, %esp + cmp $0, %eax + jnz car_init_fail + + post_code(POST_CAR_CPU_CACHE) + + /* + * The FSP TempRamInit initializes the ecx and edx registers to + * point to a temporary but writable memory range (Cache-As-RAM). + * ecx: the start of this temporary memory range, + * edx: the end of this range. + */ + + /* stack grows down from top of CAR */ + movl %edx, %esp + + /* + * TODO: + * + * According to FSP architecture spec, the fsp_init() will not return + * to its caller, instead it requires the bootloader to provide a + * so-called continuation function to pass into the FSP as a parameter + * of fsp_init, and fsp_init() will call that continuation function + * directly. + * + * The call to fsp_init() may need to be moved out of the car_init() + * to cpu_init_f() with the help of some inline assembly codes. + * Note there is another issue that fsp_init() will setup another stack + * using the fsp_init parameter stack_top after DRAM is initialized, + * which means any data on the previous stack (on the CAR) gets lost + * (ie: U-Boot global_data). FSP is supposed to support such scenario, + * however it does not work. This should be revisited in the future. + */ + movl $CONFIG_FSP_TEMP_RAM_ADDR, %eax + xorl %edx, %edx + xorl %ecx, %ecx + call fsp_init + +.global fsp_init_done +fsp_init_done: + /* + * We come here from FspInit with eax pointing to the HOB list. + * Save eax to esi temporarily. + */ + movl %eax, %esi + /* + * Re-initialize the ebp (BIST) to zero, as we already reach here + * which means we passed BIST testing before. + */ + xorl %ebp, %ebp + jmp car_init_ret + +car_init_fail: + post_code(POST_CAR_FAILURE) + +die: + hlt + jmp die + hlt + + /* + * The function call before CAR initialization is tricky. It cannot + * be called using the 'call' instruction but only the 'jmp' with + * the help of a handcrafted stack in the ROM. The stack needs to + * contain the function return address as well as the parameters. + */ + .balign 4 +find_fsp_header_romstack: + .long find_fsp_header_ret + + .balign 4 +temp_ram_init_romstack: + .long temp_ram_init_ret + .long temp_ram_init_params +temp_ram_init_params: + .long ucode_start /* microcode base */ + .long ucode_size /* microcode size */ + .long CONFIG_SYS_MONITOR_BASE /* code region base */ + .long CONFIG_SYS_MONITOR_LEN /* code region size */ + + .balign 4 +ucode_start: + .include "arch/x86/cpu/queensbay/M0220661105.inc" +ucode_size = ( . - ucode_start) diff --git a/arch/x86/cpu/queensbay/tnc_dram.c b/arch/x86/cpu/queensbay/tnc_dram.c new file mode 100644 index 0000000..dbc1710 --- /dev/null +++ b/arch/x86/cpu/queensbay/tnc_dram.c @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + phys_size_t ram_size = 0; + union hob_pointers_t hob; + + hob.raw = gd->arch.hob_list; + while (!END_OF_HOB(hob)) { + if (hob.hdr->type == HOB_TYPE_RES_DESC) { + if (hob.res_desc->type == RES_SYS_MEM || + hob.res_desc->type == RES_MEM_RESERVED) { + ram_size += hob.res_desc->len; + } + } + hob.raw = GET_NEXT_HOB(hob); + } + + gd->ram_size = ram_size; + post_code(POST_DRAM); + + return 0; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = 0; + gd->bd->bi_dram[0].size = gd->ram_size; +} + +/* + * This function looks for the highest region of memory lower than 4GB which + * has enough space for U-Boot where U-Boot is aligned on a page boundary. + * It overrides the default implementation found elsewhere which simply + * picks the end of ram, wherever that may be. The location of the stack, + * the relocation address, and how far U-Boot is moved by relocation are + * set in the global data structure. + */ +ulong board_get_usable_ram_top(ulong total_size) +{ + return get_usable_lowmem_top(gd->arch.hob_list); +} + +unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) +{ + unsigned num_entries = 0; + + union hob_pointers_t hob; + + hob.raw = gd->arch.hob_list; + + while (!END_OF_HOB(hob)) { + if (hob.hdr->type == HOB_TYPE_RES_DESC) { + entries[num_entries].addr = hob.res_desc->phys_start; + entries[num_entries].size = hob.res_desc->len; + + if (hob.res_desc->type == RES_SYS_MEM) + entries[num_entries].type = E820_RAM; + else if (hob.res_desc->type == RES_MEM_RESERVED) + entries[num_entries].type = E820_RESERVED; + } + hob.raw = GET_NEXT_HOB(hob); + num_entries++; + } + + return num_entries; +} diff --git a/arch/x86/cpu/queensbay/tnc_pci.c b/arch/x86/cpu/queensbay/tnc_pci.c new file mode 100644 index 0000000..39bff49 --- /dev/null +++ b/arch/x86/cpu/queensbay/tnc_pci.c @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void board_pci_setup_hose(struct pci_controller *hose) +{ + hose->first_busno = 0; + hose->last_busno = 0; + + /* PCI memory space */ + pci_set_region(hose->regions + 0, + CONFIG_PCI_MEM_BUS, + CONFIG_PCI_MEM_PHYS, + CONFIG_PCI_MEM_SIZE, + PCI_REGION_MEM); + + /* PCI IO space */ + pci_set_region(hose->regions + 1, + CONFIG_PCI_IO_BUS, + CONFIG_PCI_IO_PHYS, + CONFIG_PCI_IO_SIZE, + PCI_REGION_IO); + + pci_set_region(hose->regions + 2, + CONFIG_PCI_PREF_BUS, + CONFIG_PCI_PREF_PHYS, + CONFIG_PCI_PREF_SIZE, + PCI_REGION_PREFETCH); + + pci_set_region(hose->regions + 3, + 0, + 0, + gd->ram_size, + PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); + + hose->region_count = 4; +} + +int board_pci_post_scan(struct pci_controller *hose) +{ + u32 status; + + /* call into FspNotify */ + debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); + status = fsp_notify(NULL, INIT_PHASE_PCI); + if (status != FSP_SUCCESS) + debug("fail, error code %x\n", status); + else + debug("OK\n"); + + return 0; +} diff --git a/arch/x86/include/asm/ibmpc.h b/arch/x86/include/asm/ibmpc.h index e6d183b..c3b5187 100644 --- a/arch/x86/include/asm/ibmpc.h +++ b/arch/x86/include/asm/ibmpc.h @@ -18,4 +18,7 @@ #define SYSCTLA 0x92 #define SLAVE_PIC 0xa0 +#define UART0_BASE 0x3f8 +#define UART1_BASE 0x2f8 + #endif diff --git a/board/intel/crownbay/MAINTAINERS b/board/intel/crownbay/MAINTAINERS new file mode 100644 index 0000000..1eb6869 --- /dev/null +++ b/board/intel/crownbay/MAINTAINERS @@ -0,0 +1,6 @@ +INTEL CROWNBAY BOARD +M: Bin Meng +S: Maintained +F: board/intel/crownbay/ +F: include/configs/crownbay.h +F: configs/crownbay_defconfig diff --git a/board/intel/crownbay/Makefile b/board/intel/crownbay/Makefile new file mode 100644 index 0000000..aeb219b --- /dev/null +++ b/board/intel/crownbay/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2014, Bin Meng +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += crownbay.o start.o diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c new file mode 100644 index 0000000..8c6df98 --- /dev/null +++ b/board/intel/crownbay/crownbay.c @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x2e, 4) + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + lpc47m_enable_serial(SERIAL_DEV, UART0_BASE); + + return 0; +} diff --git a/board/intel/crownbay/start.S b/board/intel/crownbay/start.S new file mode 100644 index 0000000..cf92b4c --- /dev/null +++ b/board/intel/crownbay/start.S @@ -0,0 +1,9 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +.globl early_board_init +early_board_init: + jmp early_board_init_ret -- cgit v1.1 From 0f61de8d9dba4ebfc4ea4b2da7f91adc937b3875 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 17 Dec 2014 15:50:37 +0800 Subject: x86: Convert microcode format to device-tree-only To avoid having two microcode formats, adjust the build system to support obtaining the microcode from the device tree, even in the case where it must be made available before the device tree can be accessed. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng --- Makefile | 4 +++- arch/x86/cpu/queensbay/tnc_car.S | 11 ++++------- arch/x86/dts/crownbay.dts | 7 +++++++ 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/Makefile b/Makefile index 1560bff..bda8222 100644 --- a/Makefile +++ b/Makefile @@ -947,7 +947,9 @@ ifneq ($(CONFIG_X86_RESET_VECTOR),) rom: u-boot.rom FORCE IFDTOOL=$(objtree)/tools/ifdtool -IFDTOOL_FLAGS = -w $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot-dtb.bin +IFDTOOL_FLAGS = -f 0:$(objtree)/u-boot.dtb +IFDTOOL_FLAGS += -m 0x$(shell $(NM) u-boot |grep _dt_ucode_base_size |cut -d' ' -f1) +IFDTOOL_FLAGS += -U $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot.bin IFDTOOL_FLAGS += -w $(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin ifneq ($(CONFIG_HAVE_INTEL_ME),) diff --git a/arch/x86/cpu/queensbay/tnc_car.S b/arch/x86/cpu/queensbay/tnc_car.S index 6834a64..2e9139e 100644 --- a/arch/x86/cpu/queensbay/tnc_car.S +++ b/arch/x86/cpu/queensbay/tnc_car.S @@ -116,12 +116,9 @@ temp_ram_init_romstack: .long temp_ram_init_ret .long temp_ram_init_params temp_ram_init_params: - .long ucode_start /* microcode base */ - .long ucode_size /* microcode size */ +_dt_ucode_base_size: + /* These next two fields are filled in by ifdtool */ + .long 0 /* microcode base */ + .long 0 /* microcode size */ .long CONFIG_SYS_MONITOR_BASE /* code region base */ .long CONFIG_SYS_MONITOR_LEN /* code region size */ - - .balign 4 -ucode_start: - .include "arch/x86/cpu/queensbay/M0220661105.inc" -ucode_size = ( . - ucode_start) diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 399dafb..3f43f3c 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -50,4 +50,11 @@ memory-map = <0xffe00000 0x00200000>; }; }; + + microcode { + update@0 { +#include "microcode/m0220661105_cv.dtsi" + }; + }; + }; -- cgit v1.1 From b71eec3129c2626bfb1e98141b317d958e3cf384 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:38 +0800 Subject: x86: ich6-gpio: Add Intel Tunnel Creek GPIO support Intel Tunnel Creek GPIO register block is compatible with current ich6-gpio driver, except the offset and content of GPIO block base address register in the LPC PCI configuration space are different. Use u16 instead of u32 to store the 16-bit I/O address of the GPIO registers so that it could support both Ivybridge and Tunnel Creek. Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/include/asm/arch-queensbay/gpio.h | 13 +++++++++++++ arch/x86/include/asm/gpio.h | 4 ++-- board/coreboot/coreboot/coreboot.c | 2 +- board/google/chromebook_link/link.c | 2 +- board/intel/crownbay/crownbay.c | 5 +++++ drivers/gpio/intel_ich6_gpio.c | 20 ++++++++++++-------- 6 files changed, 34 insertions(+), 12 deletions(-) create mode 100644 arch/x86/include/asm/arch-queensbay/gpio.h diff --git a/arch/x86/include/asm/arch-queensbay/gpio.h b/arch/x86/include/asm/arch-queensbay/gpio.h new file mode 100644 index 0000000..ab4e059 --- /dev/null +++ b/arch/x86/include/asm/arch-queensbay/gpio.h @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _X86_ARCH_GPIO_H_ +#define _X86_ARCH_GPIO_H_ + +/* Where in config space is the register that points to the GPIO registers? */ +#define PCI_CFG_GPIOBASE 0x44 + +#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h index 1787e52..1099427 100644 --- a/arch/x86/include/asm/gpio.h +++ b/arch/x86/include/asm/gpio.h @@ -11,7 +11,7 @@ #include struct ich6_bank_platdata { - uint32_t base_addr; + uint16_t base_addr; const char *bank_name; }; @@ -147,7 +147,7 @@ struct pch_gpio_map { } set3; }; -void setup_pch_gpios(u32 gpiobase, const struct pch_gpio_map *gpio); +void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio); void ich_gpio_set_gpio_map(const struct pch_gpio_map *map); #endif /* _X86_GPIO_H_ */ diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c index b260f9a..154faf6 100644 --- a/board/coreboot/coreboot/coreboot.c +++ b/board/coreboot/coreboot/coreboot.c @@ -16,7 +16,7 @@ int arch_early_init_r(void) return 0; } -void setup_pch_gpios(u32 gpiobase, const struct pch_gpio_map *gpio) +void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) { return; } diff --git a/board/google/chromebook_link/link.c b/board/google/chromebook_link/link.c index 4d95c1c..9978e92 100644 --- a/board/google/chromebook_link/link.c +++ b/board/google/chromebook_link/link.c @@ -125,7 +125,7 @@ int board_early_init_f(void) return 0; } -void setup_pch_gpios(u32 gpiobase, const struct pch_gpio_map *gpio) +void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) { /* GPIO Set 1 */ if (gpio->set1.level) diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c index 8c6df98..54670d3 100644 --- a/board/intel/crownbay/crownbay.c +++ b/board/intel/crownbay/crownbay.c @@ -19,3 +19,8 @@ int board_early_init_f(void) return 0; } + +void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) +{ + return; +} diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c index 3433216..7720cc3 100644 --- a/drivers/gpio/intel_ich6_gpio.c +++ b/drivers/gpio/intel_ich6_gpio.c @@ -39,9 +39,9 @@ struct ich6_bank_priv { /* These are I/O addresses */ - uint32_t use_sel; - uint32_t io_sel; - uint32_t lvl; + uint16_t use_sel; + uint16_t io_sel; + uint16_t lvl; }; /* TODO: Move this to device tree, or platform data */ @@ -57,7 +57,7 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice *dev) u8 tmpbyte; u16 tmpword; u32 tmplong; - u32 gpiobase; + u16 gpiobase; int offset; /* Where should it be? */ @@ -116,11 +116,15 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice *dev) /* * GPIOBASE moved to its current offset with ICH6, but prior to * that it was unused (or undocumented). Check that it looks - * okay: not all ones or zeros, and mapped to I/O space (bit 0). + * okay: not all ones or zeros. + * + * Note we don't need check bit0 here, because the Tunnel Creek + * GPIO base address register bit0 is reserved (read returns 0), + * while on the Ivybridge the bit0 is used to indicate it is an + * I/O space. */ tmplong = pci_read_config32(pci_dev, PCI_CFG_GPIOBASE); - if (tmplong == 0x00000000 || tmplong == 0xffffffff || - !(tmplong & 0x00000001)) { + if (tmplong == 0x00000000 || tmplong == 0xffffffff) { debug("%s: unexpected GPIOBASE value\n", __func__); return -ENODEV; } @@ -131,7 +135,7 @@ static int gpio_ich6_ofdata_to_platdata(struct udevice *dev) * at the offset that we just read. Bit 0 indicates that it's * an I/O address, not a memory address, so mask that off. */ - gpiobase = tmplong & 0xfffffffe; + gpiobase = tmplong & 0xfffe; offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", -1); if (offset == -1) { debug("%s: Invalid register offset %d\n", __func__, offset); -- cgit v1.1 From 240a79d95cc13bdeb02af5cc3451735df24715aa Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:39 +0800 Subject: x86: Enable the queensbay cpu directory build Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/cpu/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 7f09db5..5033d2b 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -15,6 +15,7 @@ obj-y += interrupts.o cpu.o call64.o obj-$(CONFIG_SYS_COREBOOT) += coreboot/ obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/ obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/ +obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/ obj-y += lapic.o obj-$(CONFIG_PCI) += pci.o obj-y += turbo.o -- cgit v1.1 From 58f542de30e3bae9845726af36e0e25b5b458e8c Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:40 +0800 Subject: x86: Add queensbay and crownbay Kconfig files Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/Kconfig | 13 +++++++ arch/x86/cpu/queensbay/Kconfig | 79 ++++++++++++++++++++++++++++++++++++++++++ board/intel/crownbay/Kconfig | 20 +++++++++++ 3 files changed, 112 insertions(+) create mode 100644 arch/x86/cpu/queensbay/Kconfig create mode 100644 board/intel/crownbay/Kconfig diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index fdfb618..ebf72b3 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -32,6 +32,15 @@ config TARGET_CHROMEBOOK_LINK and it provides a 2560x1700 high resolution touch-enabled LCD display. +config TARGET_CROWNBAY + bool "Support Intel Crown Bay CRB" + help + This is the Intel Crown Bay Customer Reference Board. It contains + the Intel Atom Processor E6xx populated on the COM Express module + with 1GB DDR2 soldered down memory and a carrier board with the + Intel Platform Controller Hub EG20T, other system components and + peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS. + endchoice config RAMBASE @@ -310,8 +319,12 @@ endmenu source "arch/x86/cpu/ivybridge/Kconfig" +source "arch/x86/cpu/queensbay/Kconfig" + source "board/coreboot/coreboot/Kconfig" source "board/google/chromebook_link/Kconfig" +source "board/intel/crownbay/Kconfig" + endmenu diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig new file mode 100644 index 0000000..56fe85c --- /dev/null +++ b/arch/x86/cpu/queensbay/Kconfig @@ -0,0 +1,79 @@ +# +# Copyright (C) 2014, Bin Meng +# +# SPDX-License-Identifier: GPL-2.0+ +# + +config INTEL_QUEENSBAY + bool + select HAVE_FSP + select HAVE_CMC + +if INTEL_QUEENSBAY + +config HAVE_FSP + bool "Add an Firmware Support Package binary" + help + Select this option to add an Firmware Support Package binary to + the resulting U-Boot image. It is a binary blob which U-Boot uses + to set up SDRAM and other chipset specific initialization. + + Note: Without this binary U-Boot will not be able to set up its + SDRAM so will not boot. + +config FSP_FILE + string "Firmware Support Package binary filename" + depends on HAVE_FSP + default "fsp.bin" + help + The filename of the file to use as Firmware Support Package binary + in the board directory. + +config FSP_LOCATION + hex "Firmware Support Package binary location" + depends on HAVE_FSP + default 0xfffc0000 + help + FSP is not Position Independent Code (PIC) and the whole FSP has to + be rebased if it is placed at a location which is different from the + perferred base address specified during the FSP build. Use Intel's + Binary Configuration Tool (BCT) to do the rebase. + + The default base address of 0xfffc0000 indicates that the binary must + be located at offset 0xc0000 from the beginning of a 1MB flash device. + +config FSP_TEMP_RAM_ADDR + hex + default 0x2000000 + help + Stack top address which is used in FspInit after DRAM is ready and + CAR is disabled. + +config HAVE_CMC + bool "Add a Chipset Micro Code state machine binary" + help + Select this option to add a Chipset Micro Code state machine binary + to the resulting U-Boot image. It is a 64K data block of machine + specific code which must be put in the flash for the processor to + access when powered up before system BIOS is executed. + +config CMC_FILE + string "Chipset Micro Code state machine filename" + depends on HAVE_CMC + default "cmc.bin" + help + The filename of the file to use as Chipset Micro Code state machine + binary in the board directory. + +config CMC_LOCATION + hex "Chipset Micro Code state machine binary location" + depends on HAVE_CMC + default 0xfffb0000 + help + The location of the CMC binary is determined by a strap. It must be + put in flash at a location matching the strap-determined base address. + + The default base address of 0xfffb0000 indicates that the binary must + be located at offset 0xb0000 from the beginning of a 1MB flash device. + +endif diff --git a/board/intel/crownbay/Kconfig b/board/intel/crownbay/Kconfig new file mode 100644 index 0000000..4709f9b --- /dev/null +++ b/board/intel/crownbay/Kconfig @@ -0,0 +1,20 @@ +if TARGET_CROWNBAY + +config SYS_BOARD + default "crownbay" + +config SYS_VENDOR + default "intel" + +config SYS_SOC + default "queensbay" + +config SYS_CONFIG_NAME + default "crownbay" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select INTEL_QUEENSBAY + select BOARD_ROMSIZE_KB_1024 + +endif -- cgit v1.1 From 405d8205d76b57184e24eae573c7dd61474b56e0 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:41 +0800 Subject: x86: Add crownbay defconfig and config.h Signed-off-by: Bin Meng Acked-by: Simon Glass --- configs/crownbay_defconfig | 6 ++++++ include/configs/crownbay.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 configs/crownbay_defconfig create mode 100644 include/configs/crownbay.h diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig new file mode 100644 index 0000000..ce90553 --- /dev/null +++ b/configs/crownbay_defconfig @@ -0,0 +1,6 @@ +CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff00000" +CONFIG_X86=y +CONFIG_TARGET_CROWNBAY=y +CONFIG_OF_CONTROL=y +CONFIG_OF_SEPARATE=y +CONFIG_DEFAULT_DEVICE_TREE="crownbay" diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h new file mode 100644 index 0000000..2314e62 --- /dev/null +++ b/include/configs/crownbay.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) +#define CONFIG_SYS_X86_START16 0xfffff800 +#define CONFIG_BOARD_EARLY_INIT_F + +#define CONFIG_X86_RESET_VECTOR +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_COREBOOT_SERIAL +#define CONFIG_SMSC_LPC47M + +#define CONFIG_PCI_MEM_BUS 0x40000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x80000000 + +#define CONFIG_PCI_PREF_BUS 0xc0000000 +#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS +#define CONFIG_PCI_PREF_SIZE 0x20000000 + +#define CONFIG_PCI_IO_BUS 0x2000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0xe000 + +#define CONFIG_SYS_EARLY_PCI_INIT +#define CONFIG_PCI_PNP + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +#define CONFIG_SCSI_DEV_LIST \ + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA} + +/* Video is not supported */ +#undef CONFIG_VIDEO +#undef CONFIG_CFB_CONSOLE + +#endif /* __CONFIG_H */ -- cgit v1.1 From 8c5224c9f5c8a24ff5153f018e10a3ac4da5783a Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:42 +0800 Subject: x86: Use consistent name XXX_ADDR for binary blob flash address Signed-off-by: Bin Meng Acked-by: Simon Glass --- Makefile | 2 +- arch/x86/cpu/ivybridge/sdram.c | 2 +- arch/x86/cpu/queensbay/Kconfig | 4 ++-- arch/x86/cpu/queensbay/fsp_support.c | 2 +- arch/x86/cpu/queensbay/tnc_car.S | 2 +- include/configs/chromebook_link.h | 2 +- 6 files changed, 7 insertions(+), 7 deletions(-) diff --git a/Makefile b/Makefile index bda8222..d962576 100644 --- a/Makefile +++ b/Makefile @@ -958,7 +958,7 @@ IFDTOOL_ME_FLAGS += -i ME:$(srctree)/board/$(BOARDDIR)/me.bin endif ifneq ($(CONFIG_HAVE_MRC),) -IFDTOOL_FLAGS += -w $(CONFIG_X86_MRC_START):$(srctree)/board/$(BOARDDIR)/mrc.bin +IFDTOOL_FLAGS += -w $(CONFIG_X86_MRC_ADDR):$(srctree)/board/$(BOARDDIR)/mrc.bin endif ifneq ($(CONFIG_X86_OPTION_ROM_ADDR),) diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index df2b990..b95e781 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -177,7 +177,7 @@ int sdram_initialise(struct pei_data *pei_data) debug("PEI data at %p, size %x:\n", pei_data, sizeof(*pei_data)); - data = (char *)CONFIG_X86_MRC_START; + data = (char *)CONFIG_X86_MRC_ADDR; if (data) { int rv; int (*func)(struct pei_data *); diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig index 56fe85c..f6b5201 100644 --- a/arch/x86/cpu/queensbay/Kconfig +++ b/arch/x86/cpu/queensbay/Kconfig @@ -29,7 +29,7 @@ config FSP_FILE The filename of the file to use as Firmware Support Package binary in the board directory. -config FSP_LOCATION +config FSP_ADDR hex "Firmware Support Package binary location" depends on HAVE_FSP default 0xfffc0000 @@ -65,7 +65,7 @@ config CMC_FILE The filename of the file to use as Chipset Micro Code state machine binary in the board directory. -config CMC_LOCATION +config CMC_ADDR hex "Chipset Micro Code state machine binary location" depends on HAVE_CMC default 0xfffb0000 diff --git a/arch/x86/cpu/queensbay/fsp_support.c b/arch/x86/cpu/queensbay/fsp_support.c index df3bbd0..f830eeb 100644 --- a/arch/x86/cpu/queensbay/fsp_support.c +++ b/arch/x86/cpu/queensbay/fsp_support.c @@ -64,7 +64,7 @@ u32 __attribute__((optimize("O0"))) find_fsp_header(void) volatile register u8 *fsp asm("eax"); /* Initalize the FSP base */ - fsp = (u8 *)CONFIG_FSP_LOCATION; + fsp = (u8 *)CONFIG_FSP_ADDR; /* Check the FV signature, _FVH */ if (((struct fv_header_t *)fsp)->sign == 0x4856465F) { diff --git a/arch/x86/cpu/queensbay/tnc_car.S b/arch/x86/cpu/queensbay/tnc_car.S index 2e9139e..5e09568 100644 --- a/arch/x86/cpu/queensbay/tnc_car.S +++ b/arch/x86/cpu/queensbay/tnc_car.S @@ -29,7 +29,7 @@ find_fsp_header_ret: mov %eax, %ebp /* sanity test */ - cmp $CONFIG_FSP_LOCATION, %eax + cmp $CONFIG_FSP_ADDR, %eax jb die /* calculate TempRamInitEntry address */ diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 645b31c..c9d84e4 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -25,7 +25,7 @@ #define CONFIG_X86_RESET_VECTOR #define CONFIG_NR_DRAM_BANKS 8 -#define CONFIG_X86_MRC_START 0xfffa0000 +#define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_CACHE_MRC_SIZE_KB 512 #define CONFIG_COREBOOT_SERIAL -- cgit v1.1 From 63faf2507d263bbd6285b3fe637fd80df05a58a0 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:43 +0800 Subject: x86: Include FSP and CMC binary in the u-boot.rom build rules Signed-off-by: Bin Meng Acked-by: Simon Glass --- Makefile | 10 +++++++++- include/configs/chromebook_link.h | 2 +- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index d962576..397edc1 100644 --- a/Makefile +++ b/Makefile @@ -961,8 +961,16 @@ ifneq ($(CONFIG_HAVE_MRC),) IFDTOOL_FLAGS += -w $(CONFIG_X86_MRC_ADDR):$(srctree)/board/$(BOARDDIR)/mrc.bin endif +ifneq ($(CONFIG_HAVE_FSP),) +IFDTOOL_FLAGS += -w $(CONFIG_FSP_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_FSP_FILE) +endif + +ifneq ($(CONFIG_HAVE_CMC),) +IFDTOOL_FLAGS += -w $(CONFIG_CMC_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_CMC_FILE) +endif + ifneq ($(CONFIG_X86_OPTION_ROM_ADDR),) -IFDTOOL_FLAGS += -w $(CONFIG_X86_OPTION_ROM_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_X86_OPTION_ROM_FILENAME) +IFDTOOL_FLAGS += -w $(CONFIG_X86_OPTION_ROM_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_X86_OPTION_ROM_FILE) endif quiet_cmd_ifdtool = IFDTOOL $@ diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index c9d84e4..b311f4c 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -39,7 +39,7 @@ {PCI_VENDOR_ID_INTEL, \ PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} -#define CONFIG_X86_OPTION_ROM_FILENAME pci8086,0166.bin +#define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin #define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000 #define CONFIG_VIDEO_X86 -- cgit v1.1 From adfe3b247a7a281931f0fd865e9d00600e9dd384 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:44 +0800 Subject: x86: crownbay: Add SPI flash support The Crown Bay board has an SST25VF016B flash connected to the Tunnel Creek processor SPI controller used as the BIOS media where U-Boot is stored. Enable this flash support. Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/cpu/queensbay/tnc.c | 26 +++++++++++++++++++++++++- arch/x86/include/asm/arch-queensbay/tnc.h | 15 +++++++++++++++ include/configs/crownbay.h | 2 ++ 3 files changed, 42 insertions(+), 1 deletion(-) create mode 100644 arch/x86/include/asm/arch-queensbay/tnc.h diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index 8b9815f..8637cdc 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -6,18 +6,42 @@ #include #include +#include #include +#include #include #include +static void unprotect_spi_flash(void) +{ + u32 bc; + + bc = pci_read_config32(PCH_LPC_DEV, 0xd8); + bc |= 0x1; /* unprotect the flash */ + pci_write_config32(PCH_LPC_DEV, 0xd8, bc); +} + int arch_cpu_init(void) { + struct pci_controller *hose; + int ret; + post_code(POST_CPU_INIT); #ifdef CONFIG_SYS_X86_TSC_TIMER timer_set_base(rdtsc()); #endif - return x86_cpu_init_f(); + ret = x86_cpu_init_f(); + if (ret) + return ret; + + ret = pci_early_init_hose(&hose); + if (ret) + return ret; + + unprotect_spi_flash(); + + return 0; } int print_cpuinfo(void) diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h new file mode 100644 index 0000000..67c5e05 --- /dev/null +++ b/arch/x86/include/asm/arch-queensbay/tnc.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _X86_ARCH_TNC_H_ +#define _X86_ARCH_TNC_H_ + +#include + +/* PCI Configuration Space (D31:F0): LPC */ +#define PCH_LPC_DEV PCI_BDF(0, 0x1f, 0) + +#endif /* _X86_ARCH_TNC_H_ */ diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 2314e62..a051b11 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -45,6 +45,8 @@ #define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA} +#define CONFIG_SPI_FLASH_SST + /* Video is not supported */ #undef CONFIG_VIDEO #undef CONFIG_CFB_CONSOLE -- cgit v1.1 From 0ff65eb99c3ed4d452b9c74dae8c4f736d92303f Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:45 +0800 Subject: x86: crownbay: Enable Intel E1000 NIC support We don't have driver for the Intel Topcliff PCH Gigabit Ethernet controller for now, so enable the Intle E1000 NIC support, which can be plugged into any PCIe slot on the Crown Bay board. Signed-off-by: Bin Meng Acked-by: Simon Glass --- board/intel/crownbay/crownbay.c | 6 ++++++ include/configs/crownbay.h | 1 + 2 files changed, 7 insertions(+) diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c index 54670d3..2a254ef 100644 --- a/board/intel/crownbay/crownbay.c +++ b/board/intel/crownbay/crownbay.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #define SERIAL_DEV PNP_DEV(0x2e, 4) @@ -24,3 +25,8 @@ void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) { return; } + +int board_eth_init(bd_t *bis) +{ + return pci_eth_init(bis); +} diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index a051b11..09a52ab 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -37,6 +37,7 @@ #define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_PCI_PNP +#define CONFIG_E1000 #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ -- cgit v1.1 From aada6276c68daf0229442aa8bf6e60aae4c4fd0d Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:46 +0800 Subject: x86: crownbay: Add SDHCI support There are two standard SD card slots on the Crown Bay board, which are connected to the Topcliff PCH SDIO controllers. Enable the SDHC support so that we can use them. Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/cpu/queensbay/Makefile | 2 +- arch/x86/cpu/queensbay/topcliff.c | 47 +++++++++++++++++++++++++++++++++++++++ include/configs/crownbay.h | 6 +++++ 3 files changed, 54 insertions(+), 1 deletion(-) create mode 100644 arch/x86/cpu/queensbay/topcliff.c diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile index ace04ca..2c2ec01 100644 --- a/arch/x86/cpu/queensbay/Makefile +++ b/arch/x86/cpu/queensbay/Makefile @@ -4,6 +4,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += tnc_car.o tnc_dram.o tnc.o +obj-y += tnc_car.o tnc_dram.o tnc.o topcliff.o obj-y += fsp_configs.o fsp_support.o obj-$(CONFIG_PCI) += tnc_pci.o diff --git a/arch/x86/cpu/queensbay/topcliff.c b/arch/x86/cpu/queensbay/topcliff.c new file mode 100644 index 0000000..b01422a --- /dev/null +++ b/arch/x86/cpu/queensbay/topcliff.c @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2014, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +static struct pci_device_id mmc_supported[] = { + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 }, + { } +}; + +int cpu_mmc_init(bd_t *bis) +{ + struct sdhci_host *mmc_host; + pci_dev_t devbusfn; + u32 iobase; + int ret; + int i; + + for (i = 0; i < ARRAY_SIZE(mmc_supported); i++) { + devbusfn = pci_find_devices(mmc_supported, i); + if (devbusfn == -1) + return -ENODEV; + + mmc_host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host)); + if (!mmc_host) + return -ENOMEM; + + mmc_host->name = "Topcliff SDHCI"; + pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase); + mmc_host->ioaddr = (void *)iobase; + mmc_host->quirks = 0; + ret = add_sdhci(mmc_host, 0, 0); + if (ret) + return ret; + } + + return 0; +} diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 09a52ab..b9db6b7 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -48,6 +48,12 @@ #define CONFIG_SPI_FLASH_SST +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC_SDMA +#define CONFIG_CMD_MMC + /* Video is not supported */ #undef CONFIG_VIDEO #undef CONFIG_CFB_CONSOLE -- cgit v1.1 From 41702bac01c585cc11fa5dd1f38dea1e5a7c642d Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:47 +0800 Subject: x86: Rename coreboot-serial to x86-serial Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/dts/coreboot.dtsi | 2 +- drivers/serial/Makefile | 2 +- drivers/serial/serial_coreboot.c | 38 -------------------------------------- drivers/serial/serial_x86.c | 38 ++++++++++++++++++++++++++++++++++++++ include/configs/chromebook_link.h | 2 +- include/configs/coreboot.h | 2 +- include/configs/crownbay.h | 2 +- 7 files changed, 43 insertions(+), 43 deletions(-) delete mode 100644 drivers/serial/serial_coreboot.c create mode 100644 drivers/serial/serial_x86.c diff --git a/arch/x86/dts/coreboot.dtsi b/arch/x86/dts/coreboot.dtsi index c8dc4ce..65a93ac 100644 --- a/arch/x86/dts/coreboot.dtsi +++ b/arch/x86/dts/coreboot.dtsi @@ -6,7 +6,7 @@ }; serial { - compatible = "coreboot-uart"; + compatible = "x86-uart"; reg = <0x3f8 0x10>; reg-shift = <0>; io-mapped = <1>; diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 8c84942..4cc00cd 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -43,7 +43,7 @@ obj-$(CONFIG_ARC_SERIAL) += serial_arc.o obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o obj-$(CONFIG_OMAP_SERIAL) += serial_omap.o -obj-$(CONFIG_COREBOOT_SERIAL) += serial_coreboot.o +obj-$(CONFIG_X86_SERIAL) += serial_x86.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_USB_TTY) += usbtty.o diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_coreboot.c deleted file mode 100644 index 5c6a76c..0000000 --- a/drivers/serial/serial_coreboot.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2014 Google, Inc - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -static const struct udevice_id coreboot_serial_ids[] = { - { .compatible = "coreboot-uart" }, - { } -}; - -static int coreboot_serial_ofdata_to_platdata(struct udevice *dev) -{ - struct ns16550_platdata *plat = dev_get_platdata(dev); - int ret; - - ret = ns16550_serial_ofdata_to_platdata(dev); - if (ret) - return ret; - plat->clock = 1843200; - - return 0; -} -U_BOOT_DRIVER(serial_ns16550) = { - .name = "serial_coreboot", - .id = UCLASS_SERIAL, - .of_match = coreboot_serial_ids, - .ofdata_to_platdata = coreboot_serial_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), - .priv_auto_alloc_size = sizeof(struct NS16550), - .probe = ns16550_serial_probe, - .ops = &ns16550_serial_ops, -}; diff --git a/drivers/serial/serial_x86.c b/drivers/serial/serial_x86.c new file mode 100644 index 0000000..e81e035 --- /dev/null +++ b/drivers/serial/serial_x86.c @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +static const struct udevice_id x86_serial_ids[] = { + { .compatible = "x86-uart" }, + { } +}; + +static int x86_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct ns16550_platdata *plat = dev_get_platdata(dev); + int ret; + + ret = ns16550_serial_ofdata_to_platdata(dev); + if (ret) + return ret; + plat->clock = 1843200; + + return 0; +} +U_BOOT_DRIVER(serial_ns16550) = { + .name = "serial_x86", + .id = UCLASS_SERIAL, + .of_match = x86_serial_ids, + .ofdata_to_platdata = x86_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), + .priv_auto_alloc_size = sizeof(struct NS16550), + .probe = ns16550_serial_probe, + .ops = &ns16550_serial_ops, +}; diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index b311f4c..8930210 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -28,7 +28,7 @@ #define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_CACHE_MRC_SIZE_KB 512 -#define CONFIG_COREBOOT_SERIAL +#define CONFIG_X86_SERIAL #define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \ PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 2581380..990a2d1 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -49,7 +49,7 @@ {PCI_VENDOR_ID_INTEL, \ PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} -#define CONFIG_COREBOOT_SERIAL +#define CONFIG_X86_SERIAL #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \ "stdout=vga,serial,cbmem\0" \ diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index b9db6b7..eadb339 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -20,7 +20,7 @@ #define CONFIG_X86_RESET_VECTOR #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_COREBOOT_SERIAL +#define CONFIG_X86_SERIAL #define CONFIG_SMSC_LPC47M #define CONFIG_PCI_MEM_BUS 0x40000000 -- cgit v1.1 From 5dad97ed61507d96b2f791980f51ee3497a75867 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:48 +0800 Subject: x86: Add a README.x86 for U-Boot on x86 support Signed-off-by: Bin Meng Acked-by: Simon Glass Signed-off-by: Simon Glass (Use 'Link' as the name for the Chromebook Pixel consistently) Change-Id: I158c88653978ff212334f6d4ffeaf49fa81baefe --- doc/README.x86 | 126 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+) create mode 100644 doc/README.x86 diff --git a/doc/README.x86 b/doc/README.x86 new file mode 100644 index 0000000..5fab044 --- /dev/null +++ b/doc/README.x86 @@ -0,0 +1,126 @@ +# +# Copyright (C) 2014, Simon Glass +# Copyright (C) 2014, Bin Meng +# +# SPDX-License-Identifier: GPL-2.0+ +# + +U-Boot on x86 +============= + +This document describes the information about U-Boot running on x86 targets, +including supported boards, build instructions, todo list, etc. + +Status +------ +U-Boot supports running as a coreboot [1] payload on x86. So far only Link +(Chromebook Pixel) has been tested, but it should work with minimal adjustments +on other x86 boards since coreboot deals with most of the low-level details. + +U-Boot also supports booting directly from x86 reset vector without coreboot, +aka raw support or bare support. Currently Link and Intel Crown Bay board +support running U-Boot 'bare metal'. + +As for loading OS, U-Boot supports directly booting a 32-bit or 64-bit Linux +kernel as part of a FIT image. It also supports a compressed zImage. + +Build Instructions +------------------ +Building U-Boot as a coreboot payload is just like building U-Boot for targets +on other architectures, like below: + +$ make coreboot-x86_defconfig +$ make all + +Building ROM version of U-Boot (hereafter referred to as u-boot.rom) is a +little bit tricky, as generally it requires several binary blobs which are not +shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is +not turned on by default in the U-Boot source tree. Firstly, you need turn it +on by uncommenting the following line in the main U-Boot Makefile: + +# ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom + +Link-specific instructions: + +First, you need the following binary blobs: + +* descriptor.bin - Intel flash descriptor +* me.bin - Intel Management Engine +* mrc.bin - Memory Reference Code, which sets up SDRAM +* video ROM - sets up the display + +You can get these binary blobs by: + +$ git clone http://review.coreboot.org/p/blobs.git +$ cd blobs + +Find the following files: + +* ./mainboard/google/link/descriptor.bin +* ./mainboard/google/link/me.bin +* ./northbridge/intel/sandybridge/systemagent-ivybridge.bin + +The 3rd one should be renamed to mrc.bin. +As for the video ROM, you can get it here [2]. +Make sure all these binary blobs are put in the board directory. + +Now you can build U-Boot and obtain u-boot.rom: + +$ make chromebook_link_defconfig +$ make all + +Intel Crown Bay specific instructions: + +U-Boot support of Intel Crown Bay board [3] relies on a binary blob called +Firmware Support Package [4] to perform all the necessary initialization steps +as documented in the BIOS Writer Guide, including initialization of the CPU, +memory controller, chipset and certain bus interfaces. + +Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T, +install it on your host and locate the FSP binary blob. Note this platform +also requires a Chipset Micro Code (CMC) state machine binary to be present in +the SPI flash where u-boot.rom resides, and this CMC binary blob can be found +in this FSP package too. + +* ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd +* ./Microcode/C0_22211.BIN + +Rename the first one to fsp.bin and second one to cmc.bin and put them in the +board directory. + +Now you can build U-Boot and obtaim u-boot.rom + +$ make crownbay_defconfig +$ make all + +CPU Microcode +------------- +Modern CPU usually requires a special bit stream called microcode [5] to be +loaded on the processor after power up in order to function properly. U-Boot +has already integrated these as hex dumps in the source tree. + +Driver Model +------------ +x86 has been converted to use driver model for serial and GPIO. + +Device Tree +----------- +x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to +be turned on. Not every device on the board is configured via devie tree, but +more and more devices will be added as time goes by. Check out the directory +arch/x86/dts/ for these device tree source files. + +TODO List +--------- +- MTRR support (for performance) +- Audio +- Chrome OS verified boot +- SMI and ACPI support, to provide platform info and facilities to Linux + +References +---------- +[1] http://www.coreboot.org +[2] http://www.coreboot.org/~stepan/pci8086,0166.rom +[3] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html +[4] http://www.intel.com/fsp +[5] http://en.wikipedia.org/wiki/Microcode -- cgit v1.1 From 255fd5caa5dda7f1028843753562eff58f3855bc Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 17 Dec 2014 15:50:49 +0800 Subject: x86: Clean up the FSP support codes This is the follow-on patch to clean up the FSP support codes: - Remove the _t suffix on the structures defines - Use __packed for structure defines - Use U-Boot's assert() - Use standard bool true/false - Remove read_unaligned64() - Use memcmp() in the compare_guid() - Remove the cast in the memset() call - Replace some magic numbers with macros - Use panic() when no valid FSP image header is found - Change some FSP utility routines to use an fsp_ prefix - Add comment blocks for asm_continuation and fsp_init_done - Remove some casts in find_fsp_header() - Change HOB access macros to static inline routines - Add comments to mention find_fsp_header() may be called in a stackless environment - Add comments to mention init(¶ms) in fsp_init() cannot be removed Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/cpu/queensbay/fsp_configs.c | 2 +- arch/x86/cpu/queensbay/fsp_support.c | 253 ++++++++++----------- arch/x86/cpu/queensbay/tnc_dram.c | 18 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h | 18 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h | 28 +-- arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h | 14 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h | 112 +++++---- .../asm/arch-queensbay/fsp/fsp_infoheader.h | 6 +- .../include/asm/arch-queensbay/fsp/fsp_platform.h | 8 +- .../include/asm/arch-queensbay/fsp/fsp_support.h | 63 ++--- .../x86/include/asm/arch-queensbay/fsp/fsp_types.h | 17 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h | 8 +- arch/x86/lib/cmd_hob.c | 22 +- 13 files changed, 279 insertions(+), 290 deletions(-) diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c index aef18fc..af28e45 100644 --- a/arch/x86/cpu/queensbay/fsp_configs.c +++ b/arch/x86/cpu/queensbay/fsp_configs.c @@ -8,7 +8,7 @@ #include #include -void update_fsp_upd(struct upd_region_t *fsp_upd) +void update_fsp_upd(struct upd_region *fsp_upd) { /* Override any UPD setting if required */ diff --git a/arch/x86/cpu/queensbay/fsp_support.c b/arch/x86/cpu/queensbay/fsp_support.c index f830eeb..ef1916b 100644 --- a/arch/x86/cpu/queensbay/fsp_support.c +++ b/arch/x86/cpu/queensbay/fsp_support.c @@ -10,67 +10,48 @@ #include /** - * Reads a 64-bit value from memory that may be unaligned. - * - * This function returns the 64-bit value pointed to by buf. The function - * guarantees that the read operation does not produce an alignment fault. - * - * If the buf is NULL, then ASSERT(). - * - * @buf: Pointer to a 64-bit value that may be unaligned. - * - * @return: The 64-bit value read from buf. - */ -static u64 read_unaligned64(const u64 *buf) -{ - ASSERT(buf != NULL); - - return *buf; -} - -/** * Compares two GUIDs * - * If the GUIDs are identical then TRUE is returned. - * If there are any bit differences in the two GUIDs, then FALSE is returned. - * - * If guid1 is NULL, then ASSERT(). - * If guid2 is NULL, then ASSERT(). + * If the GUIDs are identical then true is returned. + * If there are any bit differences in the two GUIDs, then false is returned. * * @guid1: A pointer to a 128 bit GUID. * @guid2: A pointer to a 128 bit GUID. * - * @retval TRUE: guid1 and guid2 are identical. - * @retval FALSE: guid1 and guid2 are not identical. + * @retval true: guid1 and guid2 are identical. + * @retval false: guid1 and guid2 are not identical. */ -static unsigned char compare_guid(const struct efi_guid_t *guid1, - const struct efi_guid_t *guid2) +static bool compare_guid(const struct efi_guid *guid1, + const struct efi_guid *guid2) { - u64 guid1_low; - u64 guid2_low; - u64 guid1_high; - u64 guid2_high; - - guid1_low = read_unaligned64((const u64 *)guid1); - guid2_low = read_unaligned64((const u64 *)guid2); - guid1_high = read_unaligned64((const u64 *)guid1 + 1); - guid2_high = read_unaligned64((const u64 *)guid2 + 1); - - return (unsigned char)(guid1_low == guid2_low && guid1_high == guid2_high); + if (memcmp(guid1, guid2, sizeof(struct efi_guid)) == 0) + return true; + else + return false; } u32 __attribute__((optimize("O0"))) find_fsp_header(void) { + /* + * This function may be called before the a stack is established, + * so special care must be taken. First, it cannot declare any local + * variable using stack. Only register variable can be used here. + * Secondly, some compiler version will add prolog or epilog code + * for the C function. If so the function call may not work before + * stack is ready. + * + * GCC 4.8.1 has been verified to be working for the following codes. + */ volatile register u8 *fsp asm("eax"); /* Initalize the FSP base */ fsp = (u8 *)CONFIG_FSP_ADDR; /* Check the FV signature, _FVH */ - if (((struct fv_header_t *)fsp)->sign == 0x4856465F) { + if (((struct fv_header *)fsp)->sign == EFI_FVH_SIGNATURE) { /* Go to the end of the FV header and align the address */ - fsp += ((struct fv_header_t *)fsp)->ext_hdr_off; - fsp += ((struct fv_ext_header_t *)fsp)->ext_hdr_size; + fsp += ((struct fv_header *)fsp)->ext_hdr_off; + fsp += ((struct fv_ext_header *)fsp)->ext_hdr_size; fsp = (u8 *)(((u32)fsp + 7) & 0xFFFFFFF8); } else { fsp = 0; @@ -78,20 +59,27 @@ u32 __attribute__((optimize("O0"))) find_fsp_header(void) /* Check the FFS GUID */ if (fsp && - (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[0] == 0x912740BE) && - (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[1] == 0x47342284) && - (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[2] == 0xB08471B9) && - (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[3] == 0x0C3F3527)) { + ((struct ffs_file_header *)fsp)->name.data1 == FSP_GUID_DATA1 && + ((struct ffs_file_header *)fsp)->name.data2 == FSP_GUID_DATA2 && + ((struct ffs_file_header *)fsp)->name.data3 == FSP_GUID_DATA3 && + ((struct ffs_file_header *)fsp)->name.data4[0] == FSP_GUID_DATA4_0 && + ((struct ffs_file_header *)fsp)->name.data4[1] == FSP_GUID_DATA4_1 && + ((struct ffs_file_header *)fsp)->name.data4[2] == FSP_GUID_DATA4_2 && + ((struct ffs_file_header *)fsp)->name.data4[3] == FSP_GUID_DATA4_3 && + ((struct ffs_file_header *)fsp)->name.data4[4] == FSP_GUID_DATA4_4 && + ((struct ffs_file_header *)fsp)->name.data4[5] == FSP_GUID_DATA4_5 && + ((struct ffs_file_header *)fsp)->name.data4[6] == FSP_GUID_DATA4_6 && + ((struct ffs_file_header *)fsp)->name.data4[7] == FSP_GUID_DATA4_7) { /* Add the FFS header size to find the raw section header */ - fsp += sizeof(struct ffs_file_header_t); + fsp += sizeof(struct ffs_file_header); } else { fsp = 0; } if (fsp && - ((struct raw_section_t *)fsp)->type == EFI_SECTION_RAW) { + ((struct raw_section *)fsp)->type == EFI_SECTION_RAW) { /* Add the raw section header size to find the FSP header */ - fsp += sizeof(struct raw_section_t); + fsp += sizeof(struct raw_section); } else { fsp = 0; } @@ -99,7 +87,7 @@ u32 __attribute__((optimize("O0"))) find_fsp_header(void) return (u32)fsp; } -void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list) +void fsp_continue(struct shared_data *shared_data, u32 status, void *hob_list) { u32 stack_len; u32 stack_base; @@ -107,18 +95,18 @@ void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list) post_code(POST_MRC); - ASSERT(status == 0); + assert(status == 0); /* Get the migrated stack in normal memory */ - stack_base = (u32)get_bootloader_tmp_mem(hob_list, &stack_len); - ASSERT(stack_base != 0); + stack_base = (u32)fsp_get_bootloader_tmp_mem(hob_list, &stack_len); + assert(stack_base != 0); stack_top = stack_base + stack_len - sizeof(u32); /* * Old stack base is stored at the very end of the stack top, * use it to calculate the migrated shared data base */ - shared_data = (struct shared_data_t *)(stack_base + + shared_data = (struct shared_data *)(stack_base + ((u32)shared_data - *(u32 *)stack_top)); /* The boot loader main function entry */ @@ -127,50 +115,50 @@ void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list) void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) { - struct shared_data_t shared_data; + struct shared_data shared_data; fsp_init_f init; - struct fsp_init_params_t params; - struct fspinit_rtbuf_t rt_buf; - struct vpd_region_t *fsp_vpd; - struct fsp_header_t *fsp_hdr; - struct fsp_init_params_t *params_ptr; - struct upd_region_t *fsp_upd; - - fsp_hdr = (struct fsp_header_t *)find_fsp_header(); + struct fsp_init_params params; + struct fspinit_rtbuf rt_buf; + struct vpd_region *fsp_vpd; + struct fsp_header *fsp_hdr; + struct fsp_init_params *params_ptr; + struct upd_region *fsp_upd; + + fsp_hdr = (struct fsp_header *)find_fsp_header(); if (fsp_hdr == NULL) { /* No valid FSP info header was found */ - ASSERT(FALSE); + panic("Invalid FSP header"); } - fsp_upd = (struct upd_region_t *)&shared_data.fsp_upd; - memset((void *)&rt_buf, 0, sizeof(struct fspinit_rtbuf_t)); + fsp_upd = (struct upd_region *)&shared_data.fsp_upd; + memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf)); /* Reserve a gap in stack top */ rt_buf.common.stack_top = (u32 *)stack_top - 32; rt_buf.common.boot_mode = boot_mode; - rt_buf.common.upd_data = (struct upd_region_t *)fsp_upd; + rt_buf.common.upd_data = (struct upd_region *)fsp_upd; /* Get VPD region start */ - fsp_vpd = (struct vpd_region_t *)(fsp_hdr->img_base + + fsp_vpd = (struct vpd_region *)(fsp_hdr->img_base + fsp_hdr->cfg_region_off); /* Verifify the VPD data region is valid */ - ASSERT((fsp_vpd->img_rev == VPD_IMAGE_REV) && + assert((fsp_vpd->img_rev == VPD_IMAGE_REV) && (fsp_vpd->sign == VPD_IMAGE_ID)); /* Copy default data from Flash */ memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset), - sizeof(struct upd_region_t)); + sizeof(struct upd_region)); /* Verifify the UPD data region is valid */ - ASSERT(fsp_upd->terminator == 0x55AA); + assert(fsp_upd->terminator == UPD_TERMINATOR); /* Override any UPD setting if required */ update_fsp_upd(fsp_upd); - memset((void *)¶ms, 0, sizeof(struct fsp_init_params_t)); + memset(¶ms, 0, sizeof(struct fsp_init_params)); params.nvs_buf = nvs_buf; - params.rt_buf = (struct fspinit_rtbuf_t *)&rt_buf; + params.rt_buf = (struct fspinit_rtbuf *)&rt_buf; params.continuation = (fsp_continuation_f)asm_continuation; init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init); @@ -199,32 +187,28 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) /* * Should never get here. - * Control will continue from romstage_main_continue_asm. + * Control will continue from fsp_continue. * This line below is to prevent the compiler from optimizing * structure intialization. + * + * DO NOT REMOVE! */ init(¶ms); - - /* - * Should never return. - * Control will continue from ContinuationFunc - */ - ASSERT(FALSE); } -u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase) +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase) { fsp_notify_f notify; - struct fsp_notify_params_t params; - struct fsp_notify_params_t *params_ptr; + struct fsp_notify_params params; + struct fsp_notify_params *params_ptr; u32 status; if (!fsp_hdr) - fsp_hdr = (struct fsp_header_t *)find_fsp_header(); + fsp_hdr = (struct fsp_header *)find_fsp_header(); if (fsp_hdr == NULL) { /* No valid FSP info header */ - ASSERT(FALSE); + panic("Invalid FSP header"); } notify = (fsp_notify_f)(fsp_hdr->img_base + fsp_hdr->fsp_notify); @@ -245,9 +229,9 @@ u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase) return status; } -u32 get_usable_lowmem_top(const void *hob_list) +u32 fsp_get_usable_lowmem_top(const void *hob_list) { - union hob_pointers_t hob; + union hob_pointers hob; phys_addr_t phys_start; u32 top; @@ -255,26 +239,26 @@ u32 get_usable_lowmem_top(const void *hob_list) hob.raw = (void *)hob_list; /* * Collect memory ranges */ - top = 0x100000; - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == HOB_TYPE_RES_DESC) { + top = FSP_LOWMEM_BASE; + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { if (hob.res_desc->type == RES_SYS_MEM) { phys_start = hob.res_desc->phys_start; /* Need memory above 1MB to be collected here */ - if (phys_start >= 0x100000 && - phys_start < (phys_addr_t)0x100000000) + if (phys_start >= FSP_LOWMEM_BASE && + phys_start < (phys_addr_t)FSP_HIGHMEM_BASE) top += (u32)(hob.res_desc->len); } } - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return top; } -u64 get_usable_highmem_top(const void *hob_list) +u64 fsp_get_usable_highmem_top(const void *hob_list) { - union hob_pointers_t hob; + union hob_pointers hob; phys_addr_t phys_start; u64 top; @@ -282,33 +266,33 @@ u64 get_usable_highmem_top(const void *hob_list) hob.raw = (void *)hob_list; /* Collect memory ranges */ - top = 0x100000000; - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == HOB_TYPE_RES_DESC) { + top = FSP_HIGHMEM_BASE; + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { if (hob.res_desc->type == RES_SYS_MEM) { phys_start = hob.res_desc->phys_start; /* Need memory above 1MB to be collected here */ - if (phys_start >= (phys_addr_t)0x100000000) + if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE) top += (u32)(hob.res_desc->len); } } - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return top; } -u64 get_fsp_reserved_mem_from_guid(const void *hob_list, u64 *len, - struct efi_guid_t *guid) +u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, + struct efi_guid *guid) { - union hob_pointers_t hob; + union hob_pointers hob; /* Get the HOB list for processing */ hob.raw = (void *)hob_list; /* Collect memory ranges */ - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == HOB_TYPE_RES_DESC) { + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { if (hob.res_desc->type == RES_MEM_RESERVED) { if (compare_guid(&hob.res_desc->owner, guid)) { if (len) @@ -318,99 +302,100 @@ u64 get_fsp_reserved_mem_from_guid(const void *hob_list, u64 *len, } } } - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return 0; } -u32 get_fsp_reserved_mem(const void *hob_list, u32 *len) +u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len) { - const struct efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; + const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID; u64 length; u32 base; - base = (u32)get_fsp_reserved_mem_from_guid(hob_list, - &length, (struct efi_guid_t *)&guid); + base = (u32)fsp_get_reserved_mem_from_guid(hob_list, + &length, (struct efi_guid *)&guid); if ((len != 0) && (base != 0)) *len = (u32)length; return base; } -u32 get_tseg_reserved_mem(const void *hob_list, u32 *len) +u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len) { - const struct efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; + const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID; u64 length; u32 base; - base = (u32)get_fsp_reserved_mem_from_guid(hob_list, - &length, (struct efi_guid_t *)&guid); + base = (u32)fsp_get_reserved_mem_from_guid(hob_list, + &length, (struct efi_guid *)&guid); if ((len != 0) && (base != 0)) *len = (u32)length; return base; } -void *get_next_hob(u16 type, const void *hob_list) +void *fsp_get_next_hob(u16 type, const void *hob_list) { - union hob_pointers_t hob; + union hob_pointers hob; - ASSERT(hob_list != NULL); + assert(hob_list != NULL); hob.raw = (u8 *)hob_list; /* Parse the HOB list until end of list or matching type is found */ - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == type) + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == type) return hob.raw; - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return NULL; } -void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list) +void *fsp_get_next_guid_hob(const struct efi_guid *guid, const void *hob_list) { - union hob_pointers_t hob; + union hob_pointers hob; hob.raw = (u8 *)hob_list; - while ((hob.raw = get_next_hob(HOB_TYPE_GUID_EXT, + while ((hob.raw = fsp_get_next_hob(HOB_TYPE_GUID_EXT, hob.raw)) != NULL) { if (compare_guid(guid, &hob.guid->name)) break; - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } return hob.raw; } -void *get_guid_hob_data(const void *hob_list, u32 *len, struct efi_guid_t *guid) +void *fsp_get_guid_hob_data(const void *hob_list, u32 *len, + struct efi_guid *guid) { u8 *guid_hob; - guid_hob = get_next_guid_hob(guid, hob_list); + guid_hob = fsp_get_next_guid_hob(guid, hob_list); if (guid_hob == NULL) { return NULL; } else { if (len) - *len = GET_GUID_HOB_DATA_SIZE(guid_hob); + *len = get_guid_hob_data_size(guid_hob); - return GET_GUID_HOB_DATA(guid_hob); + return get_guid_hob_data(guid_hob); } } -void *get_fsp_nvs_data(const void *hob_list, u32 *len) +void *fsp_get_nvs_data(const void *hob_list, u32 *len) { - const struct efi_guid_t guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; + const struct efi_guid guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID; - return get_guid_hob_data(hob_list, len, (struct efi_guid_t *)&guid); + return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid); } -void *get_bootloader_tmp_mem(const void *hob_list, u32 *len) +void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len) { - const struct efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; + const struct efi_guid guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; - return get_guid_hob_data(hob_list, len, (struct efi_guid_t *)&guid); + return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid); } diff --git a/arch/x86/cpu/queensbay/tnc_dram.c b/arch/x86/cpu/queensbay/tnc_dram.c index dbc1710..8e97c9b 100644 --- a/arch/x86/cpu/queensbay/tnc_dram.c +++ b/arch/x86/cpu/queensbay/tnc_dram.c @@ -14,17 +14,17 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { phys_size_t ram_size = 0; - union hob_pointers_t hob; + union hob_pointers hob; hob.raw = gd->arch.hob_list; - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == HOB_TYPE_RES_DESC) { + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { if (hob.res_desc->type == RES_SYS_MEM || hob.res_desc->type == RES_MEM_RESERVED) { ram_size += hob.res_desc->len; } } - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); } gd->ram_size = ram_size; @@ -49,19 +49,19 @@ void dram_init_banksize(void) */ ulong board_get_usable_ram_top(ulong total_size) { - return get_usable_lowmem_top(gd->arch.hob_list); + return fsp_get_usable_lowmem_top(gd->arch.hob_list); } unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) { unsigned num_entries = 0; - union hob_pointers_t hob; + union hob_pointers hob; hob.raw = gd->arch.hob_list; - while (!END_OF_HOB(hob)) { - if (hob.hdr->type == HOB_TYPE_RES_DESC) { + while (!end_of_hob(hob)) { + if (get_hob_type(hob) == HOB_TYPE_RES_DESC) { entries[num_entries].addr = hob.res_desc->phys_start; entries[num_entries].size = hob.res_desc->len; @@ -70,7 +70,7 @@ unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) else if (hob.res_desc->type == RES_MEM_RESERVED) entries[num_entries].type = E820_RESERVED; } - hob.raw = GET_NEXT_HOB(hob); + hob.raw = get_next_hob(hob); num_entries++; } diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h index 25b938f..a9d7156 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h @@ -14,9 +14,7 @@ */ typedef void (*fsp_continuation_f)(u32 status, void *hob_list); -#pragma pack(1) - -struct fsp_init_params_t { +struct fsp_init_params { /* Non-volatile storage buffer pointer */ void *nvs_buf; /* Runtime buffer pointer */ @@ -25,7 +23,7 @@ struct fsp_init_params_t { fsp_continuation_f continuation; }; -struct common_buf_t { +struct common_buf { /* * Stack top pointer used by the bootloader. The new stack frame will be * set up at this location after FspInit API call. @@ -36,24 +34,22 @@ struct common_buf_t { u32 reserved[7]; /* Reserved */ }; -enum fsp_phase_t { +enum fsp_phase { /* Notification code for post PCI enuermation */ INIT_PHASE_PCI = 0x20, /* Notification code before transfering control to the payload */ INIT_PHASE_BOOT = 0x40 }; -struct fsp_notify_params_t { +struct fsp_notify_params { /* Notification phase used for NotifyPhase API */ - enum fsp_phase_t phase; + enum fsp_phase phase; }; -#pragma pack() - /* FspInit API function prototype */ -typedef u32 (*fsp_init_f)(struct fsp_init_params_t *param); +typedef u32 (*fsp_init_f)(struct fsp_init_params *params); /* FspNotify API function prototype */ -typedef u32 (*fsp_notify_f)(struct fsp_notify_params_t *param); +typedef u32 (*fsp_notify_f)(struct fsp_notify_params *params); #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h index 1f73680..eaec2b4 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h @@ -8,10 +8,8 @@ #ifndef __FSP_FFS_H__ #define __FSP_FFS_H__ -#pragma pack(1) - /* Used to verify the integrity of the file */ -union ffs_integrity_t { +union __packed ffs_integrity { struct { /* * The IntegrityCheck.checksum.header field is an 8-bit @@ -43,14 +41,14 @@ union ffs_integrity_t { * Each file begins with the header that describe the * contents and state of the files. */ -struct ffs_file_header_t { +struct __packed ffs_file_header { /* * This GUID is the file name. * It is used to uniquely identify the file. */ - struct efi_guid_t name; + struct efi_guid name; /* Used to verify the integrity of the file */ - union ffs_integrity_t integrity; + union ffs_integrity integrity; /* Identifies the type of file */ u8 type; /* Declares various file attribute bits */ @@ -64,16 +62,16 @@ struct ffs_file_header_t { u8 state; }; -struct ffs_file_header2_t { +struct __packed ffs_file_header2 { /* * This GUID is the file name. It is used to uniquely identify the file. * There may be only one instance of a file with the file name GUID of * Name in any given firmware volume, except if the file type is * EFI_FV_FILE_TYPE_FFS_PAD. */ - struct efi_guid_t name; + struct efi_guid name; /* Used to verify the integrity of the file */ - union ffs_integrity_t integrity; + union ffs_integrity integrity; /* Identifies the type of file */ u8 type; /* Declares various file attribute bits */ @@ -81,9 +79,9 @@ struct ffs_file_header2_t { /* * The length of the file in bytes, including the FFS header. * The length of the file data is either - * (size - sizeof(struct ffs_file_header_t)). This calculation means a + * (size - sizeof(struct ffs_file_header)). This calculation means a * zero-length file has a size of 24 bytes, which is - * sizeof(struct ffs_file_header_t). Size is not required to be a + * sizeof(struct ffs_file_header). Size is not required to be a * multiple of 8 bytes. Given a file F, the next file header is located * at the next 8-byte aligned firmware volume offset following the last * byte of the file F. @@ -98,7 +96,7 @@ struct ffs_file_header2_t { * If FFS_ATTRIB_LARGE_FILE is set in attr, then ext_size exists * and size must be set to zero. * If FFS_ATTRIB_LARGE_FILE is not set then - * struct ffs_file_header_t is used. + * struct ffs_file_header is used. */ u32 ext_size; }; @@ -129,7 +127,7 @@ struct ffs_file_header2_t { #define EFI_SECTION_SMM_DEPEX 0x1C /* Common section header */ -struct raw_section_t { +struct __packed raw_section { /* * A 24-bit unsigned integer that contains the total size of * the section in bytes, including the EFI_COMMON_SECTION_HEADER. @@ -138,7 +136,7 @@ struct raw_section_t { u8 type; }; -struct raw_section2_t { +struct __packed raw_section2 { /* * A 24-bit unsigned integer that contains the total size of * the section in bytes, including the EFI_COMMON_SECTION_HEADER. @@ -153,6 +151,4 @@ struct raw_section2_t { u32 ext_size; }; -#pragma pack() - #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h index 01300db..a024451 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h @@ -63,7 +63,7 @@ #define EFI_FVB2_ALIGNMENT_1G 0x001E0000 #define EFI_FVB2_ALIGNMENT_2G 0x001F0000 -struct fv_blkmap_entry_t { +struct fv_blkmap_entry { /* The number of sequential blocks which are of the same size */ u32 num_blocks; /* The size of the blocks */ @@ -71,7 +71,7 @@ struct fv_blkmap_entry_t { }; /* Describes the features and layout of the firmware volume */ -struct fv_header_t { +struct fv_header { /* * The first 16 bytes are reserved to allow for the reset vector of * processors whose reset vector is at address 0. @@ -81,7 +81,7 @@ struct fv_header_t { * Declares the file system with which the firmware volume * is formatted. */ - struct efi_guid_t fs_guid; + struct efi_guid fs_guid; /* * Length in bytes of the complete firmware volume, including * the header. @@ -118,18 +118,18 @@ struct fv_header_t { * An array of run-length encoded FvBlockMapEntry structures. * The array is terminated with an entry of {0,0}. */ - struct fv_blkmap_entry_t block_map[1]; + struct fv_blkmap_entry block_map[1]; }; -#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H') +#define EFI_FVH_SIGNATURE SIGNATURE_32('_', 'F', 'V', 'H') /* Firmware Volume Header Revision definition */ #define EFI_FVH_REVISION 0x02 /* Extension header pointed by ExtHeaderOffset of volume header */ -struct fv_ext_header_t { +struct fv_ext_header { /* firmware volume name */ - struct efi_guid_t fv_name; + struct efi_guid fv_name; /* Size of the rest of the extension header including this structure */ u32 ext_hdr_size; }; diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h index 44c0f90..380b64e 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h @@ -19,14 +19,14 @@ * Describes the format and size of the data inside the HOB. * All HOBs must contain this generic HOB header. */ -struct hob_header_t { +struct hob_header { u16 type; /* HOB type */ u16 len; /* HOB length */ u32 reserved; /* always zero */ }; /* Enumeration of memory types introduced in UEFI */ -enum efi_mem_type_t { +enum efi_mem_type { EFI_RESERVED_MEMORY_TYPE, /* * The code portions of a loaded application. @@ -87,16 +87,16 @@ enum efi_mem_type_t { * exist outside the HOB list. This HOB type describes how memory is used, * not the physical attributes of memory. */ -struct hob_mem_alloc_t { - struct hob_header_t hdr; +struct hob_mem_alloc { + struct hob_header hdr; /* * A GUID that defines the memory allocation region's type and purpose, * as well as other fields within the memory allocation HOB. This GUID * is used to define the additional data within the HOB that may be - * present for the memory allocation HOB. Type efi_guid_t is defined in + * present for the memory allocation HOB. Type efi_guid is defined in * InstallProtocolInterface() in the UEFI 2.0 specification. */ - struct efi_guid_t name; + struct efi_guid name; /* * The base address of memory allocated by this HOB. * Type phys_addr_t is defined in AllocatePages() in the UEFI 2.0 @@ -111,7 +111,7 @@ struct hob_mem_alloc_t { * Type EFI_MEMORY_TYPE is defined in AllocatePages() in the UEFI 2.0 * specification. */ - enum efi_mem_type_t mem_type; + enum efi_mem_type mem_type; /* padding */ u8 reserved[4]; }; @@ -155,14 +155,14 @@ struct hob_mem_alloc_t { * Describes the resource properties of all fixed, nonrelocatable resource * ranges found on the processor host bus during the HOB producer phase. */ -struct hob_res_desc_t { - struct hob_header_t hdr; +struct hob_res_desc { + struct hob_header hdr; /* * A GUID representing the owner of the resource. This GUID is * used by HOB consumer phase components to correlate device * ownership of a resource. */ - struct efi_guid_t owner; + struct efi_guid owner; u32 type; u32 attr; /* The physical start address of the resource region */ @@ -175,24 +175,24 @@ struct hob_res_desc_t { * Allows writers of executable content in the HOB producer phase to * maintain and manage HOBs with specific GUID. */ -struct hob_guid_t { - struct hob_header_t hdr; +struct hob_guid { + struct hob_header hdr; /* A GUID that defines the contents of this HOB */ - struct efi_guid_t name; + struct efi_guid name; /* GUID specific data goes here */ }; /* Union of all the possible HOB Types */ -union hob_pointers_t { - struct hob_header_t *hdr; - struct hob_mem_alloc_t *mem_alloc; - struct hob_res_desc_t *res_desc; - struct hob_guid_t *guid; +union hob_pointers { + struct hob_header *hdr; + struct hob_mem_alloc *mem_alloc; + struct hob_res_desc *res_desc; + struct hob_guid *guid; u8 *raw; }; /** - * Returns the type of a HOB. + * get_hob_type() - return the type of a HOB * * This macro returns the type field from the HOB header for the * HOB specified by hob. @@ -201,11 +201,13 @@ union hob_pointers_t { * * @return: HOB type. */ -#define GET_HOB_TYPE(hob) \ - ((*(struct hob_header_t **)&(hob))->type) +static inline u16 get_hob_type(union hob_pointers hob) +{ + return hob.hdr->type; +} /** - * Returns the length, in bytes, of a HOB. + * get_hob_length() - return the length, in bytes, of a HOB * * This macro returns the len field from the HOB header for the * HOB specified by hob. @@ -214,11 +216,13 @@ union hob_pointers_t { * * @return: HOB length. */ -#define GET_HOB_LENGTH(hob) \ - ((*(struct hob_header_t **)&(hob))->len) +static inline u16 get_hob_length(union hob_pointers hob) +{ + return hob.hdr->len; +} /** - * Returns a pointer to the next HOB in the HOB list. + * get_next_hob() - return a pointer to the next HOB in the HOB list * * This macro returns a pointer to HOB that follows the HOB specified by hob * in the HOB List. @@ -227,25 +231,31 @@ union hob_pointers_t { * * @return: A pointer to the next HOB in the HOB list. */ -#define GET_NEXT_HOB(hob) \ - (void *)(*(u8 **)&(hob) + GET_HOB_LENGTH(hob)) +static inline void *get_next_hob(union hob_pointers hob) +{ + return (void *)(*(u8 **)&(hob) + get_hob_length(hob)); +} /** - * Determines if a HOB is the last HOB in the HOB list. + * end_of_hob() - determine if a HOB is the last HOB in the HOB list * * This macro determine if the HOB specified by hob is the last HOB in the - * HOB list. If hob is last HOB in the HOB list, then TRUE is returned. - * Otherwise, FALSE is returned. + * HOB list. If hob is last HOB in the HOB list, then true is returned. + * Otherwise, false is returned. * * @hob: A pointer to a HOB. * - * @retval TRUE: The HOB specified by hob is the last HOB in the HOB list. - * @retval FALSE: The HOB specified by hob is not the last HOB in the HOB list. + * @retval true: The HOB specified by hob is the last HOB in the HOB list. + * @retval false: The HOB specified by hob is not the last HOB in the HOB list. */ -#define END_OF_HOB(hob) (GET_HOB_TYPE(hob) == (u16)HOB_TYPE_EOH) +static inline bool end_of_hob(union hob_pointers hob) +{ + return get_hob_type(hob) == HOB_TYPE_EOH; +} /** - * Returns a pointer to data buffer from a HOB of type HOB_TYPE_GUID_EXT. + * get_guid_hob_data() - return a pointer to data buffer from a HOB of + * type HOB_TYPE_GUID_EXT * * This macro returns a pointer to the data buffer in a HOB specified by hob. * hob is assumed to be a HOB of type HOB_TYPE_GUID_EXT. @@ -254,11 +264,14 @@ union hob_pointers_t { * * @return: A pointer to the data buffer in a HOB. */ -#define GET_GUID_HOB_DATA(hob) \ - (void *)(*(u8 **)&(hob) + sizeof(struct hob_guid_t)) +static inline void *get_guid_hob_data(u8 *hob) +{ + return (void *)(hob + sizeof(struct hob_guid)); +} /** - * Returns the size of the data buffer from a HOB of type HOB_TYPE_GUID_EXT. + * get_guid_hob_data_size() - return the size of the data buffer from a HOB + * of type HOB_TYPE_GUID_EXT * * This macro returns the size, in bytes, of the data buffer in a HOB * specified by hob. hob is assumed to be a HOB of type HOB_TYPE_GUID_EXT. @@ -267,14 +280,31 @@ union hob_pointers_t { * * @return: The size of the data buffer. */ -#define GET_GUID_HOB_DATA_SIZE(hob) \ - (u16)(GET_HOB_LENGTH(hob) - sizeof(struct hob_guid_t)) +static inline u16 get_guid_hob_data_size(u8 *hob) +{ + union hob_pointers hob_p = *(union hob_pointers *)hob; + return get_hob_length(hob_p) - sizeof(struct hob_guid); +} /* FSP specific GUID HOB definitions */ +#define FSP_GUID_DATA1 0x912740be +#define FSP_GUID_DATA2 0x2284 +#define FSP_GUID_DATA3 0x4734 +#define FSP_GUID_DATA4_0 0xb9 +#define FSP_GUID_DATA4_1 0x71 +#define FSP_GUID_DATA4_2 0x84 +#define FSP_GUID_DATA4_3 0xb0 +#define FSP_GUID_DATA4_4 0x27 +#define FSP_GUID_DATA4_5 0x35 +#define FSP_GUID_DATA4_6 0x3f +#define FSP_GUID_DATA4_7 0x0c + #define FSP_HEADER_GUID \ { \ - 0x912740be, 0x2284, 0x4734, \ - {0xb9, 0x71, 0x84, 0xb0, 0x27, 0x35, 0x3f, 0x0c} \ + FSP_GUID_DATA1, FSP_GUID_DATA2, FSP_GUID_DATA3, \ + { FSP_GUID_DATA4_0, FSP_GUID_DATA4_1, FSP_GUID_DATA4_2, \ + FSP_GUID_DATA4_3, FSP_GUID_DATA4_4, FSP_GUID_DATA4_5, \ + FSP_GUID_DATA4_6, FSP_GUID_DATA4_7 } \ } #define FSP_NON_VOLATILE_STORAGE_HOB_GUID \ diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h index ad78bcd..4a4d627 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h @@ -10,9 +10,7 @@ #define FSP_HEADER_OFF 0x94 /* Fixed FSP header offset in the FSP image */ -#pragma pack(1) - -struct fsp_header_t { +struct __packed fsp_header { u32 sign; /* 'FSPH' */ u32 hdr_len; /* header length */ u8 reserved1[3]; @@ -31,6 +29,4 @@ struct fsp_header_t { u32 reserved2; }; -#pragma pack() - #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h index a7b6e6b..61286ce 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h @@ -8,12 +8,8 @@ #ifndef __FSP_PLATFORM_H__ #define __FSP_PLATFORM_H__ -#pragma pack(1) - -struct fspinit_rtbuf_t { - struct common_buf_t common; /* FSP common runtime data structure */ +struct fspinit_rtbuf { + struct common_buf common; /* FSP common runtime data structure */ }; -#pragma pack() - #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h index 3296a2b..3ae1b66 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h @@ -18,14 +18,30 @@ #include "fsp_bootmode.h" #include "fsp_vpd.h" -struct shared_data_t { - struct fsp_header_t *fsp_hdr; +struct shared_data { + struct fsp_header *fsp_hdr; u32 *stack_top; - struct upd_region_t fsp_upd; + struct upd_region fsp_upd; }; +#define FSP_LOWMEM_BASE 0x100000UL +#define FSP_HIGHMEM_BASE 0x100000000ULL + +/** + * FSP Continuation assembly helper routine + * + * This routine jumps to the C version of FSP continuation function + */ void asm_continuation(void); +/** + * FSP initialization complete + * + * This is the function that indicates FSP initialization is complete and jumps + * back to the bootloader with HOB list pointer as the parameter. + * + * @hob_list: HOB list pointer + */ void fsp_init_done(void *hob_list); /** @@ -37,19 +53,12 @@ void fsp_init_done(void *hob_list); * * @retval: Never returns */ -void fsp_continue(struct shared_data_t *shared_data, u32 status, +void fsp_continue(struct shared_data *shared_data, u32 status, void *hob_list); /** * Find FSP header offset in FSP image * - * If this function is called before the a stack is established, special care - * must be taken. First, it cannot declare any local variable using stack. - * Only register variable can be used here. Secondly, some compiler version - * will add prolog or epilog code for the C function. If so the function call - * may not work before stack is ready. GCC 4.8.1 has been verified to be - * working for the following code. - * * @retval: the offset of FSP header. If signature is invalid, returns 0. */ u32 find_fsp_header(void); @@ -67,11 +76,11 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); * FSP notification wrapper function * * @fsp_hdr: Pointer to FSP information header - * @phase: FSP initialization phase defined in enum fsp_phase_t + * @phase: FSP initialization phase defined in enum fsp_phase * * @retval: compatible status code with EFI_STATUS defined in PI spec */ -u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase); +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); /** * This function retrieves the top of usable low memory. @@ -80,7 +89,7 @@ u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase); * * @retval: Usable low memory top. */ -u32 get_usable_lowmem_top(const void *hob_list); +u32 fsp_get_usable_lowmem_top(const void *hob_list); /** * This function retrieves the top of usable high memory. @@ -89,7 +98,7 @@ u32 get_usable_lowmem_top(const void *hob_list); * * @retval: Usable high memory top. */ -u64 get_usable_highmem_top(const void *hob_list); +u64 fsp_get_usable_highmem_top(const void *hob_list); /** * This function retrieves a special reserved memory region. @@ -102,8 +111,8 @@ u64 get_usable_highmem_top(const void *hob_list); * @retval: Reserved region start address. * 0 if this region does not exist. */ -u64 get_fsp_reserved_mem_from_guid(const void *hob_list, - u64 *len, struct efi_guid_t *guid); +u64 fsp_get_reserved_mem_from_guid(const void *hob_list, + u64 *len, struct efi_guid *guid); /** * This function retrieves the FSP reserved normal memory. @@ -114,7 +123,7 @@ u64 get_fsp_reserved_mem_from_guid(const void *hob_list, * @retval: FSP reserved memory base * 0 if this region does not exist. */ -u32 get_fsp_reserved_mem(const void *hob_list, u32 *len); +u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); /** * This function retrieves the TSEG reserved normal memory. @@ -126,7 +135,7 @@ u32 get_fsp_reserved_mem(const void *hob_list, u32 *len); * @retval NULL: Failed to find the TSEG reserved memory. * @retval others: TSEG reserved memory base. */ -u32 get_tseg_reserved_mem(const void *hob_list, u32 *len); +u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); /** * Returns the next instance of a HOB type from the starting HOB. @@ -136,7 +145,7 @@ u32 get_tseg_reserved_mem(const void *hob_list, u32 *len); * * @retval: A HOB object with matching type; Otherwise NULL. */ -void *get_next_hob(u16 type, const void *hob_list); +void *fsp_get_next_hob(u16 type, const void *hob_list); /** * Returns the next instance of the matched GUID HOB from the starting HOB. @@ -146,7 +155,7 @@ void *get_next_hob(u16 type, const void *hob_list); * * @retval: A HOB object with matching GUID; Otherwise NULL. */ -void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list); +void *fsp_get_next_guid_hob(const struct efi_guid *guid, const void *hob_list); /** * This function retrieves a GUID HOB data buffer and size. @@ -159,8 +168,8 @@ void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list); * @retval NULL: Failed to find the GUID HOB. * @retval others: GUID HOB data buffer pointer. */ -void *get_guid_hob_data(const void *hob_list, u32 *len, - struct efi_guid_t *guid); +void *fsp_get_guid_hob_data(const void *hob_list, u32 *len, + struct efi_guid *guid); /** * This function retrieves FSP Non-volatile Storage HOB buffer and size. @@ -172,7 +181,7 @@ void *get_guid_hob_data(const void *hob_list, u32 *len, * @retval NULL: Failed to find the NVS HOB. * @retval others: FSP NVS data buffer pointer. */ -void *get_fsp_nvs_data(const void *hob_list, u32 *len); +void *fsp_get_nvs_data(const void *hob_list, u32 *len); /** * This function retrieves Bootloader temporary stack buffer and size. @@ -184,15 +193,15 @@ void *get_fsp_nvs_data(const void *hob_list, u32 *len); * @retval NULL: Failed to find the bootloader temporary stack HOB. * @retval others: Bootloader temporary stackbuffer pointer. */ -void *get_bootloader_tmp_mem(const void *hob_list, u32 *len); +void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); /** * This function overrides the default configurations in the UPD data region. * - * @fsp_upd: A pointer to the upd_region_t data strcture + * @fsp_upd: A pointer to the upd_region data strcture * * @return: None */ -void update_fsp_upd(struct upd_region_t *fsp_upd); +void update_fsp_upd(struct upd_region *fsp_upd); #endif diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h index 12ebbfd..f32d827 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h @@ -8,20 +8,8 @@ #ifndef __FSP_TYPES_H__ #define __FSP_TYPES_H__ -/* - * Boolean true value. UEFI Specification defines this value to be 1, - * but this form is more portable. - */ -#define TRUE ((unsigned char)(1 == 1)) - -/* - * Boolean false value. UEFI Specification defines this value to be 0, - * but this form is more portable. - */ -#define FALSE ((unsigned char)(0 == 1)) - /* 128 bit buffer containing a unique identifier value */ -struct efi_guid_t { +struct efi_guid { u32 data1; u16 data2; u16 data3; @@ -80,9 +68,6 @@ struct efi_guid_t { #define SIGNATURE_64(A, B, C, D, E, F, G, H) \ (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32)) -/* Assertion for debug */ -#define ASSERT(exp) do { if (!(exp)) for (;;); } while (FALSE) - /* * Define FSP API return status code. * Compatiable with EFI_STATUS defined in PI Spec. diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h index 11cc32f..bce58b1 100644 --- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h +++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h @@ -10,9 +10,9 @@ #ifndef __VPDHEADER_H__ #define __VPDHEADER_H__ -#pragma pack(1) +#define UPD_TERMINATOR 0x55AA -struct upd_region_t { +struct __packed upd_region { u64 sign; /* Offset 0x0000 */ u64 reserved; /* Offset 0x0008 */ u8 dummy[240]; /* Offset 0x0010 */ @@ -39,7 +39,7 @@ struct upd_region_t { #define VPD_IMAGE_ID 0x445056574F4E4E4D /* 'MNNOWVPD' */ #define VPD_IMAGE_REV 0x00000301 -struct vpd_region_t { +struct __packed vpd_region { u64 sign; /* Offset 0x0000 */ u32 img_rev; /* Offset 0x0008 */ u32 upd_offset; /* Offset 0x000C */ @@ -53,6 +53,4 @@ struct vpd_region_t { u8 pcie_port_ioh; /* Offset 0x0029 */ }; -#pragma pack() - #endif diff --git a/arch/x86/lib/cmd_hob.c b/arch/x86/lib/cmd_hob.c index 2fdff2b..b552fe6 100644 --- a/arch/x86/lib/cmd_hob.c +++ b/arch/x86/lib/cmd_hob.c @@ -17,18 +17,18 @@ static char *hob_type[] = { "Memory Allocation", "Resource Descriptor", "GUID Extension", - "Firmware Volumn", + "Firmware Volume", "CPU", "Memory Pool", "reserved", - "Firmware Volumn 2", + "Firmware Volume 2", "Load PEIM Unused", "UEFI Capsule", }; int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - union hob_pointers_t hob; + union hob_pointers hob; u16 type; char *desc; int i = 0; @@ -39,29 +39,27 @@ int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("No. | Address | Type | Length in Bytes\n"); printf("----|----------|---------------------|----------------\n"); - while (!END_OF_HOB(hob)) { + while (!end_of_hob(hob)) { printf("%-3d | %08x | ", i, (unsigned int)hob.raw); - type = hob.hdr->type; + type = get_hob_type(hob); if (type == HOB_TYPE_UNUSED) desc = "*Unused*"; else if (type == HOB_TYPE_EOH) - desc = "**END OF HOB**"; + desc = "*END OF HOB*"; else if (type >= 0 && type <= ARRAY_SIZE(hob_type)) desc = hob_type[type]; else - desc = "!!!Invalid Type!!!"; - printf("%-19s | %-15d\n", desc, hob.hdr->len); - hob.raw = GET_NEXT_HOB(hob); + desc = "*Invalid Type*"; + printf("%-19s | %-15d\n", desc, get_hob_length(hob)); + hob.raw = get_next_hob(hob); i++; } return 0; } -/* -------------------------------------------------------------------- */ - U_BOOT_CMD( hob, 1, 1, do_hob, - "print FSP Hand-Off Block information", + "print Firmware Support Package (FSP) Hand-Off Block information", "" ); -- cgit v1.1 From d2c6181d2d2afe00399cf0c8d9deafcb66b77330 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 16 Dec 2014 20:21:02 -0700 Subject: x86: Add a script to process Intel microcode files Intel delivers microcode updates in a microcode.dat file which must be split up into individual files for each CPU. Add a tool which performs this task. It can list available microcode updates for each model and produce a new microcode update in U-Boot's .dtsi format. Signed-off-by: Simon Glass Tested-by: Bin Meng --- tools/microcode-tool | 1 + tools/microcode-tool.py | 253 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 254 insertions(+) create mode 120000 tools/microcode-tool create mode 100755 tools/microcode-tool.py diff --git a/tools/microcode-tool b/tools/microcode-tool new file mode 120000 index 0000000..8be8507 --- /dev/null +++ b/tools/microcode-tool @@ -0,0 +1 @@ +microcode-tool.py \ No newline at end of file diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py new file mode 100755 index 0000000..003716d --- /dev/null +++ b/tools/microcode-tool.py @@ -0,0 +1,253 @@ +#!/usr/bin/env python +# +# Copyright (c) 2014 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# +# Intel microcode update tool + +from optparse import OptionParser +import os +import re +import struct +import sys + +MICROCODE_DIR = 'arch/x86/dts/microcode' + +class Microcode: + """Holds information about the microcode for a particular model of CPU. + + Attributes: + name: Name of the CPU this microcode is for, including any version + information (e.g. 'm12206a7_00000029') + model: Model code string (this is cpuid(1).eax, e.g. '206a7') + words: List of hex words containing the microcode. The first 16 words + are the public header. + """ + def __init__(self, name, data): + self.name = name + # Convert data into a list of hex words + self.words = [] + for value in ''.join(data).split(','): + hexval = value.strip() + if hexval: + self.words.append(int(hexval, 0)) + + # The model is in the 4rd hex word + self.model = '%x' % self.words[3] + +def ParseFile(fname): + """Parse a micrcode.dat file and return the component parts + + Args: + fname: Filename to parse + Returns: + 3-Tuple: + date: String containing date from the file's header + license_text: List of text lines for the license file + microcodes: List of Microcode objects from the file + """ + re_date = re.compile('/\* *(.* [0-9]{4}) *\*/$') + re_license = re.compile('/[^-*+] *(.*)$') + re_name = re.compile('/\* *(.*)\.inc *\*/', re.IGNORECASE) + microcodes = {} + license_text = [] + date = '' + data = [] + name = None + with open(fname) as fd: + for line in fd: + line = line.rstrip() + m_date = re_date.match(line) + m_license = re_license.match(line) + m_name = re_name.match(line) + if m_name: + if name: + microcodes[name] = Microcode(name, data) + name = m_name.group(1).lower() + data = [] + elif m_license: + license_text.append(m_license.group(1)) + elif m_date: + date = m_date.group(1) + else: + data.append(line) + if name: + microcodes[name] = Microcode(name, data) + return date, license_text, microcodes + +def List(date, microcodes, model): + """List the available microcode chunks + + Args: + date: Date of the microcode file + microcodes: Dict of Microcode objects indexed by name + model: Model string to search for, or None + """ + print 'Date: %s' % date + if model: + mcode_list, tried = FindMicrocode(microcodes, model.lower()) + print 'Matching models %s:' % (', '.join(tried)) + else: + print 'All models:' + mcode_list = [microcodes[m] for m in microcodes.keys()] + for mcode in mcode_list: + print '%-20s: model %s' % (mcode.name, mcode.model) + +def FindMicrocode(microcodes, model): + """Find all the microcode chunks which match the given model. + + This model is something like 306a9 (the value returned in eax from + cpuid(1) when running on Intel CPUs). But we allow a partial match, + omitting the last 1 or two characters to allow many families to have the + same microcode. + + If the model name is ambiguous we return a list of matches. + + Args: + microcodes: Dict of Microcode objects indexed by name + model: String containing model name to find + Returns: + Tuple: + List of matching Microcode objects + List of abbreviations we tried + """ + # Allow a full name to be used + mcode = microcodes.get(model) + if mcode: + return [mcode], [] + + tried = [] + found = [] + for i in range(3): + abbrev = model[:-i] if i else model + tried.append(abbrev) + for mcode in microcodes.values(): + if mcode.model.startswith(abbrev): + found.append(mcode) + if found: + break + return found, tried + +def CreateFile(date, license_text, mcode, outfile): + """Create a microcode file in U-Boot's .dtsi format + + Args: + date: String containing date of original microcode file + license: List of text lines for the license file + mcode: Microcode object to write + outfile: Filename to write to ('-' for stdout) + """ + out = '''/*%s + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + * + * Date: %s + */ + +compatible = "intel,microcode"; +intel,header-version = <%d>; +intel,update-revision = <%#x>; +intel,date-code = <%#x>; +intel,processor-signature = <%#x>; +intel,checksum = <%#x>; +intel,loader-revision = <%d>; +intel,processor-flags = <%#x>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = <%s +\t>;''' + words = '' + for i in range(len(mcode.words)): + if not (i & 3): + words += '\n' + val = mcode.words[i] + # Change each word so it will be little-endian in the FDT + # This data is needed before RAM is available on some platforms so we + # cannot do an endianness swap on boot. + val = struct.unpack("I", val))[0] + words += '\t%#010x' % val + + # Take care to avoid adding a space before a tab + text = '' + for line in license_text: + if line[0] == '\t': + text += '\n *' + line + else: + text += '\n * ' + line + args = [text, date] + args += [mcode.words[i] for i in range(7)] + args.append(words) + if outfile == '-': + print out % tuple(args) + else: + if not outfile: + if not os.path.exists(MICROCODE_DIR): + print >> sys.stderr, "Creating directory '%s'" % MICROCODE_DIR + os.makedirs(MICROCODE_DIR) + outfile = os.path.join(MICROCODE_DIR, mcode.name + '.dtsi') + print >> sys.stderr, "Writing microcode for '%s' to '%s'" % ( + mcode.name, outfile) + with open(outfile, 'w') as fd: + print >> fd, out % tuple(args) + +def MicrocodeTool(): + """Run the microcode tool""" + commands = 'create,license,list'.split(',') + parser = OptionParser() + parser.add_option('-d', '--mcfile', type='string', action='store', + help='Name of microcode.dat file') + parser.add_option('-m', '--model', type='string', action='store', + help='Model name to extract') + parser.add_option('-o', '--outfile', type='string', action='store', + help='Filename to use for output (- for stdout), default is' + ' %s/.dtsi' % MICROCODE_DIR) + parser.usage += """ command + + Process an Intel microcode file (use -h for help). Commands: + + create Create microcode .dtsi file for a model + list List available models in microcode file + license Print the license + + Typical usage: + + ./tools/microcode-tool -d microcode.dat -m 306a create + + This will find the appropriate file and write it to %s.""" % MICROCODE_DIR + + (options, args) = parser.parse_args() + if not args: + parser.error('Please specify a command') + cmd = args[0] + if cmd not in commands: + parser.error("Unknown command '%s'" % cmd) + + if not options.mcfile: + parser.error('You must specify a microcode file') + date, license_text, microcodes = ParseFile(options.mcfile) + + if cmd == 'list': + List(date, microcodes, options.model) + elif cmd == 'license': + print '\n'.join(license_text) + elif cmd == 'create': + if not options.model: + parser.error('You must specify a model to create') + model = options.model.lower() + mcode_list, tried = FindMicrocode(microcodes, model) + if not mcode_list: + parser.error("Unknown model '%s' (%s) - try 'list' to list" % + (model, ', '.join(tried))) + if len(mcode_list) > 1: + parser.error("Ambiguous model '%s' (%s) matched %s - try 'list' " + "to list or specify a particular file" % + (model, ', '.join(tried), + ', '.join([m.name for m in mcode_list]))) + CreateFile(date, license_text, mcode_list[0], options.outfile) + else: + parser.error("Unknown command '%s'" % cmd) + +if __name__ == "__main__": + MicrocodeTool() -- cgit v1.1 From 2a1d2a0351ac14390ccaad6433d27a1c58dab46f Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 10 Nov 2014 09:23:46 +0900 Subject: arm: rmobile: kconfig: Remove '+S:' prefix from defconfig files '+S' is unnecessary because boards of rmobile do not use SPL. This removes from armadillo-800eva and kzm9g. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- configs/armadillo-800eva_defconfig | 2 +- configs/kzm9g_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index 9b17895..22dc1f8 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y -+S:CONFIG_RMOBILE=y +CONFIG_RMOBILE=y CONFIG_TARGET_ARMADILLO_800EVA=y diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig index d4d340f..20656dd 100644 --- a/configs/kzm9g_defconfig +++ b/configs/kzm9g_defconfig @@ -1,3 +1,3 @@ CONFIG_ARM=y -+S:CONFIG_RMOBILE=y +CONFIG_RMOBILE=y CONFIG_TARGET_KZM9G=y -- cgit v1.1 From 50b56394307f76afe5ed1fac885e6d792d432c58 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 15 Dec 2014 11:05:43 +0100 Subject: arm: semihosting: staticize internal functions The semihosting code exposes internal file handle handling functions to read(), open(), close() and get the length of a certain file handle. However the code using it is only interested in either reading and entire named file into memory or getting the file length of a file referred by name. No file handles are used. Thus make the file handle code internal to this file by removing these functions from the semihosting header file and staticize them. This gives us some freedom to rearrange the semihosting code without affecting the external interface. Cc: Darwin Rambo Cc: AKASHI Takahiro Cc: Mark Hambleton Cc: Tom Rini Acked-by: Steve Rae Signed-off-by: Linus Walleij --- arch/arm/include/asm/semihosting.h | 4 ---- arch/arm/lib/semihosting.c | 13 +++++++++---- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/semihosting.h b/arch/arm/include/asm/semihosting.h index 74111dc..e59b44e 100644 --- a/arch/arm/include/asm/semihosting.h +++ b/arch/arm/include/asm/semihosting.h @@ -12,10 +12,6 @@ * code for more information. */ int smh_load(const char *fname, void *memp, int avail, int verbose); -int smh_read(int fd, void *memp, int len); -int smh_open(const char *fname, char *modestr); -int smh_close(int fd); -int smh_len_fd(int fd); int smh_len(const char *fname); #endif /* __SEMIHOSTING_H__ */ diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index cb5dc26..92bbabe 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -23,6 +23,11 @@ #define MODE_READ 0x0 #define MODE_READBIN 0x1 +static int smh_read(int fd, void *memp, int len); +static int smh_open(const char *fname, char *modestr); +static int smh_close(int fd); +static int smh_len_fd(int fd); + /* * Call the handler */ @@ -96,7 +101,7 @@ int smh_load(const char *fname, void *memp, int avail, int verbose) /* * Read 'len' bytes of file into 'memp'. Returns 0 on success, else failure */ -int smh_read(int fd, void *memp, int len) +static int smh_read(int fd, void *memp, int len) { int ret; struct smh_read_s { @@ -131,7 +136,7 @@ int smh_read(int fd, void *memp, int len) * Open a file on the host. Mode is "r" or "rb" currently. Returns a file * descriptor or -1 on error. */ -int smh_open(const char *fname, char *modestr) +static int smh_open(const char *fname, char *modestr) { int ret, fd, mode; struct smh_open_s { @@ -171,7 +176,7 @@ int smh_open(const char *fname, char *modestr) /* * Close the file using the file descriptor */ -int smh_close(int fd) +static int smh_close(int fd) { int ret; long fdlong; @@ -189,7 +194,7 @@ int smh_close(int fd) /* * Get the file length from the file descriptor */ -int smh_len_fd(int fd) +static int smh_len_fd(int fd) { int ret; long fdlong; -- cgit v1.1 From 4e1ef15091b6f42ac13c22e3acc45a9bd9cce852 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 15 Dec 2014 11:05:56 +0100 Subject: arm: semihosting: fix up compile bugs There is currently a regression when using newer ARM64 compilers for semihosting: the way long types are inferred from context is no longer the same. The semihosting runtime uses long and size_t, so use this explicitly in the semihosting code and interface, and voila: the code now works again. Tested with aarch64-linux-gnu-gcc: Linaro GCC 4.9-2014.09. Cc: Darwin Rambo Cc: AKASHI Takahiro Cc: Mark Hambleton Cc: Tom Rini Acked-by: Steve Rae Suggested-by: Mark Hambleton Signed-off-by: Linus Walleij --- arch/arm/include/asm/semihosting.h | 2 +- arch/arm/lib/semihosting.c | 101 +++++++++++++++++++------------------ 2 files changed, 53 insertions(+), 50 deletions(-) diff --git a/arch/arm/include/asm/semihosting.h b/arch/arm/include/asm/semihosting.h index e59b44e..835ca7e 100644 --- a/arch/arm/include/asm/semihosting.h +++ b/arch/arm/include/asm/semihosting.h @@ -12,6 +12,6 @@ * code for more information. */ int smh_load(const char *fname, void *memp, int avail, int verbose); -int smh_len(const char *fname); +long smh_len(const char *fname); #endif /* __SEMIHOSTING_H__ */ diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index 92bbabe..e9d524e 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -23,17 +23,17 @@ #define MODE_READ 0x0 #define MODE_READBIN 0x1 -static int smh_read(int fd, void *memp, int len); -static int smh_open(const char *fname, char *modestr); -static int smh_close(int fd); -static int smh_len_fd(int fd); +static long smh_read(long fd, void *memp, size_t len); +static long smh_open(const char *fname, char *modestr); +static long smh_close(long fd); +static long smh_len_fd(long fd); /* * Call the handler */ -static int smh_trap(unsigned int sysnum, void *addr) +static long smh_trap(unsigned int sysnum, void *addr) { - register int result asm("r0"); + register long result asm("r0"); #if defined(CONFIG_ARM64) asm volatile ("hlt #0xf000" : "=r" (result) : "0"(sysnum), "r"(addr)); #else @@ -51,7 +51,9 @@ static int smh_trap(unsigned int sysnum, void *addr) */ int smh_load(const char *fname, void *memp, int avail, int verbose) { - int ret, fd, len; + long ret; + long fd; + size_t len; ret = -1; @@ -61,21 +63,21 @@ int smh_load(const char *fname, void *memp, int avail, int verbose) /* Open the file */ fd = smh_open(fname, "rb"); if (fd == -1) - return ret; + return -1; /* Get the file length */ ret = smh_len_fd(fd); if (ret == -1) { smh_close(fd); - return ret; + return -1; } /* Check that the file will fit in the supplied buffer */ if (ret > avail) { - printf("%s: ERROR ret %d, avail %u\n", __func__, ret, + printf("%s: ERROR ret %ld, avail %u\n", __func__, ret, avail); smh_close(fd); - return ret; + return -1; } len = ret; @@ -87,7 +89,7 @@ int smh_load(const char *fname, void *memp, int avail, int verbose) if (verbose) { printf("\n%s\n", fname); printf(" 0x%8p dest\n", memp); - printf(" 0x%08x size\n", len); + printf(" 0x%08lx size\n", len); printf(" 0x%08x avail\n", avail); } } @@ -101,54 +103,53 @@ int smh_load(const char *fname, void *memp, int avail, int verbose) /* * Read 'len' bytes of file into 'memp'. Returns 0 on success, else failure */ -static int smh_read(int fd, void *memp, int len) +static long smh_read(long fd, void *memp, size_t len) { - int ret; + long ret; struct smh_read_s { - int fd; + long fd; void *memp; - int len; + size_t len; } read; - debug("%s: fd %d, memp %p, len %d\n", __func__, fd, memp, len); + debug("%s: fd %ld, memp %p, len %lu\n", __func__, fd, memp, len); read.fd = fd; read.memp = memp; read.len = len; ret = smh_trap(SYSREAD, &read); - if (ret == 0) { - return 0; - } else { + if (ret < 0) { /* * The ARM handler allows for returning partial lengths, * but in practice this never happens so rather than create * hard to maintain partial read loops and such, just fail * with an error message. */ - printf("%s: ERROR ret %d, fd %d, len %u memp %p\n", + printf("%s: ERROR ret %ld, fd %ld, len %lu memp %p\n", __func__, ret, fd, len, memp); + return -1; } - return ret; + + return 0; } /* * Open a file on the host. Mode is "r" or "rb" currently. Returns a file * descriptor or -1 on error. */ -static int smh_open(const char *fname, char *modestr) +static long smh_open(const char *fname, char *modestr) { - int ret, fd, mode; + long fd; + unsigned long mode; struct smh_open_s { const char *fname; - unsigned int mode; - unsigned int len; + unsigned long mode; + size_t len; } open; debug("%s: file \'%s\', mode \'%s\'\n", __func__, fname, modestr); - ret = -1; - /* Check the file mode */ if (!(strcmp(modestr, "r"))) { mode = MODE_READ; @@ -157,7 +158,7 @@ static int smh_open(const char *fname, char *modestr) } else { printf("%s: ERROR mode \'%s\' not supported\n", __func__, modestr); - return ret; + return -1; } open.fname = fname; @@ -167,7 +168,7 @@ static int smh_open(const char *fname, char *modestr) /* Open the file on the host */ fd = smh_trap(SYSOPEN, &open); if (fd == -1) - printf("%s: ERROR fd %d for file \'%s\'\n", __func__, fd, + printf("%s: ERROR fd %ld for file \'%s\'\n", __func__, fd, fname); return fd; @@ -176,17 +177,15 @@ static int smh_open(const char *fname, char *modestr) /* * Close the file using the file descriptor */ -static int smh_close(int fd) +static long smh_close(long fd) { - int ret; - long fdlong; + long ret; - debug("%s: fd %d\n", __func__, fd); + debug("%s: fd %ld\n", __func__, fd); - fdlong = (long)fd; - ret = smh_trap(SYSCLOSE, &fdlong); + ret = smh_trap(SYSCLOSE, &fd); if (ret == -1) - printf("%s: ERROR fd %d\n", __func__, fd); + printf("%s: ERROR fd %ld\n", __func__, fd); return ret; } @@ -194,17 +193,15 @@ static int smh_close(int fd) /* * Get the file length from the file descriptor */ -static int smh_len_fd(int fd) +static long smh_len_fd(long fd) { - int ret; - long fdlong; + long ret; - debug("%s: fd %d\n", __func__, fd); + debug("%s: fd %ld\n", __func__, fd); - fdlong = (long)fd; - ret = smh_trap(SYSFLEN, &fdlong); + ret = smh_trap(SYSFLEN, &fd); if (ret == -1) - printf("%s: ERROR ret %d\n", __func__, ret); + printf("%s: ERROR ret %ld, fd %ld\n", __func__, ret, fd); return ret; } @@ -212,26 +209,32 @@ static int smh_len_fd(int fd) /* * Get the file length from the filename */ -int smh_len(const char *fname) +long smh_len(const char *fname) { - int ret, fd, len; + long ret; + long fd; + long len; debug("%s: file \'%s\'\n", __func__, fname); /* Open the file */ fd = smh_open(fname, "rb"); - if (fd == -1) + if (fd < 0) return fd; /* Get the file length */ len = smh_len_fd(fd); + if (len < 0) { + smh_close(fd); + return len; + } /* Close the file */ ret = smh_close(fd); - if (ret == -1) + if (ret < 0) return ret; - debug("%s: returning len %d\n", __func__, len); + debug("%s: returning len %ld\n", __func__, len); /* Return the file length (or -1 error indication) */ return len; -- cgit v1.1 From 9be5c661beecdb8a9d90ab4869ddb501b4990dd9 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 15 Dec 2014 11:06:05 +0100 Subject: arm: semihosting: get rid of forward declarations By rearranging the functions in the semihosting code we can avoid forward-declaration of the internal static functions. This puts the stuff in a logical order: read/open/close/len and then higher-order functions follow at the end. Cc: Darwin Rambo Cc: AKASHI Takahiro Cc: Mark Hambleton Cc: Tom Rini Acked-by: Steve Rae Signed-off-by: Linus Walleij --- arch/arm/lib/semihosting.c | 173 ++++++++++++++++++++++----------------------- 1 file changed, 84 insertions(+), 89 deletions(-) diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index e9d524e..fd6d857 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -23,11 +23,6 @@ #define MODE_READ 0x0 #define MODE_READBIN 0x1 -static long smh_read(long fd, void *memp, size_t len); -static long smh_open(const char *fname, char *modestr); -static long smh_close(long fd); -static long smh_len_fd(long fd); - /* * Call the handler */ @@ -44,60 +39,43 @@ static long smh_trap(unsigned int sysnum, void *addr) } /* - * Open, load a file into memory, and close it. Check that the available space - * is sufficient to store the entire file. Return the bytes actually read from - * the file as seen by the read function. The verbose flag enables some extra - * printing of successful read status. + * Open a file on the host. Mode is "r" or "rb" currently. Returns a file + * descriptor or -1 on error. */ -int smh_load(const char *fname, void *memp, int avail, int verbose) +static long smh_open(const char *fname, char *modestr) { - long ret; long fd; - size_t len; - - ret = -1; - - debug("%s: fname \'%s\', avail %u, memp %p\n", __func__, fname, - avail, memp); - - /* Open the file */ - fd = smh_open(fname, "rb"); - if (fd == -1) - return -1; + unsigned long mode; + struct smh_open_s { + const char *fname; + unsigned long mode; + size_t len; + } open; - /* Get the file length */ - ret = smh_len_fd(fd); - if (ret == -1) { - smh_close(fd); - return -1; - } + debug("%s: file \'%s\', mode \'%s\'\n", __func__, fname, modestr); - /* Check that the file will fit in the supplied buffer */ - if (ret > avail) { - printf("%s: ERROR ret %ld, avail %u\n", __func__, ret, - avail); - smh_close(fd); + /* Check the file mode */ + if (!(strcmp(modestr, "r"))) { + mode = MODE_READ; + } else if (!(strcmp(modestr, "rb"))) { + mode = MODE_READBIN; + } else { + printf("%s: ERROR mode \'%s\' not supported\n", __func__, + modestr); return -1; } - len = ret; - - /* Read the file into the buffer */ - ret = smh_read(fd, memp, len); - if (ret == 0) { - /* Print successful load information if requested */ - if (verbose) { - printf("\n%s\n", fname); - printf(" 0x%8p dest\n", memp); - printf(" 0x%08lx size\n", len); - printf(" 0x%08x avail\n", avail); - } - } + open.fname = fname; + open.len = strlen(fname); + open.mode = mode; - /* Close the file */ - smh_close(fd); + /* Open the file on the host */ + fd = smh_trap(SYSOPEN, &open); + if (fd == -1) + printf("%s: ERROR fd %ld for file \'%s\'\n", __func__, fd, + fname); - return ret; + return fd; } /* @@ -135,46 +113,6 @@ static long smh_read(long fd, void *memp, size_t len) } /* - * Open a file on the host. Mode is "r" or "rb" currently. Returns a file - * descriptor or -1 on error. - */ -static long smh_open(const char *fname, char *modestr) -{ - long fd; - unsigned long mode; - struct smh_open_s { - const char *fname; - unsigned long mode; - size_t len; - } open; - - debug("%s: file \'%s\', mode \'%s\'\n", __func__, fname, modestr); - - /* Check the file mode */ - if (!(strcmp(modestr, "r"))) { - mode = MODE_READ; - } else if (!(strcmp(modestr, "rb"))) { - mode = MODE_READBIN; - } else { - printf("%s: ERROR mode \'%s\' not supported\n", __func__, - modestr); - return -1; - } - - open.fname = fname; - open.len = strlen(fname); - open.mode = mode; - - /* Open the file on the host */ - fd = smh_trap(SYSOPEN, &open); - if (fd == -1) - printf("%s: ERROR fd %ld for file \'%s\'\n", __func__, fd, - fname); - - return fd; -} - -/* * Close the file using the file descriptor */ static long smh_close(long fd) @@ -207,6 +145,63 @@ static long smh_len_fd(long fd) } /* + * Open, load a file into memory, and close it. Check that the available space + * is sufficient to store the entire file. Return the bytes actually read from + * the file as seen by the read function. The verbose flag enables some extra + * printing of successful read status. + */ +int smh_load(const char *fname, void *memp, int avail, int verbose) +{ + long ret; + long fd; + size_t len; + + ret = -1; + + debug("%s: fname \'%s\', avail %u, memp %p\n", __func__, fname, + avail, memp); + + /* Open the file */ + fd = smh_open(fname, "rb"); + if (fd == -1) + return -1; + + /* Get the file length */ + ret = smh_len_fd(fd); + if (ret == -1) { + smh_close(fd); + return -1; + } + + /* Check that the file will fit in the supplied buffer */ + if (ret > avail) { + printf("%s: ERROR ret %ld, avail %u\n", __func__, ret, + avail); + smh_close(fd); + return -1; + } + + len = ret; + + /* Read the file into the buffer */ + ret = smh_read(fd, memp, len); + if (ret == 0) { + /* Print successful load information if requested */ + if (verbose) { + printf("\n%s\n", fname); + printf(" 0x%8p dest\n", memp); + printf(" 0x%08lx size\n", len); + printf(" 0x%08x avail\n", avail); + } + } + + /* Close the file */ + smh_close(fd); + + return ret; +} + +/* * Get the file length from the filename */ long smh_len(const char *fname) -- cgit v1.1 From 058235c06bd09b32c7e300c92d5eafa237f246c8 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 24 Dec 2014 02:02:19 +0100 Subject: vexpress64: take over maintenance of the semi vexpress64 As agreed with Steve Rae I'm taking over maintenance of the semihosted, emulated FVP/foundation model Versatile Express 64 bit board variant. Signed-off-by: Linus Walleij Acked-by: Steve Rae --- board/armltd/vexpress64/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/armltd/vexpress64/MAINTAINERS b/board/armltd/vexpress64/MAINTAINERS index 97c4b0e..66c8dff 100644 --- a/board/armltd/vexpress64/MAINTAINERS +++ b/board/armltd/vexpress64/MAINTAINERS @@ -6,6 +6,6 @@ F: include/configs/vexpress_aemv8a.h F: configs/vexpress_aemv8a_defconfig VEXPRESS_AEMV8A_SEMI BOARD -M: Steve Rae +M: Linus Walleij S: Maintained F: configs/vexpress_aemv8a_semi_defconfig -- cgit v1.1 From 03ca6a394a00652305a10c95202f28b476c9f8d8 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 24 Dec 2014 02:02:46 +0100 Subject: vexpress64: switch to generic board The few Versatile Express ARMv8 platforms we have may just as well be switched to generic board from the beginning. Tested on the ARM foundation model and the in progress support for the ARMv8 Juno board. Signed-off-by: Linus Walleij Acked-by: Steve Rae --- include/configs/vexpress_aemv8a.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index f3af971..027d78b 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -8,6 +8,9 @@ #ifndef __VEXPRESS_AEMV8A_H #define __VEXPRESS_AEMV8A_H +/* We use generic board for v8 Versatile Express */ +#define CONFIG_SYS_GENERIC_BOARD + #ifdef CONFIG_BASE_FVP #ifndef CONFIG_SEMIHOSTING #error CONFIG_BASE_FVP requires CONFIG_SEMIHOSTING @@ -25,8 +28,6 @@ /*#define CONFIG_ARMV8_SWITCH_TO_EL1*/ -/*#define CONFIG_SYS_GENERIC_BOARD*/ - #define CONFIG_SYS_NO_FLASH #define CONFIG_SUPPORT_RAW_INITRD -- cgit v1.1 From 3207d8fc9cc8fcc91d0dcc02890c7aaff48a6a27 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 5 Dec 2014 20:56:46 -0700 Subject: ARM: rpi: only set usbethaddr on relevant systems Model A and CM RPis don't have an on-board USB Ethernet device. Hence, there's no point setting $usbethaddr based on the device fuses. Use the model detection code to gate this. Note that the fuses are actually programmed even on those devices though. Signed-off-by: Stephen Warren --- board/raspberrypi/rpi/rpi.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 7dbd40e..ca8e86d 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -82,58 +82,72 @@ struct msg_get_clock_rate { static const struct { const char *name; const char *fdtfile; + bool has_onboard_eth; } models[] = { [BCM2835_BOARD_REV_B_I2C0_2] = { "Model B (no P5)", "bcm2835-rpi-b-i2c0.dtb", + true, }, [BCM2835_BOARD_REV_B_I2C0_3] = { "Model B (no P5)", "bcm2835-rpi-b-i2c0.dtb", + true, }, [BCM2835_BOARD_REV_B_I2C1_4] = { "Model B", "bcm2835-rpi-b.dtb", + true, }, [BCM2835_BOARD_REV_B_I2C1_5] = { "Model B", "bcm2835-rpi-b.dtb", + true, }, [BCM2835_BOARD_REV_B_I2C1_6] = { "Model B", "bcm2835-rpi-b.dtb", + true, }, [BCM2835_BOARD_REV_A_7] = { "Model A", "bcm2835-rpi-a.dtb", + false, }, [BCM2835_BOARD_REV_A_8] = { "Model A", "bcm2835-rpi-a.dtb", + false, }, [BCM2835_BOARD_REV_A_9] = { "Model A", "bcm2835-rpi-a.dtb", + false, }, [BCM2835_BOARD_REV_B_REV2_d] = { "Model B rev2", "bcm2835-rpi-b-rev2.dtb", + true, }, [BCM2835_BOARD_REV_B_REV2_e] = { "Model B rev2", "bcm2835-rpi-b-rev2.dtb", + true, }, [BCM2835_BOARD_REV_B_REV2_f] = { "Model B rev2", "bcm2835-rpi-b-rev2.dtb", + true, }, [BCM2835_BOARD_REV_B_PLUS] = { "Model B+", "bcm2835-rpi-b-plus.dtb", + true, }, [BCM2835_BOARD_REV_CM] = { "Compute Module", "bcm2835-rpi-cm.dtb", + false, }, }; @@ -177,6 +191,9 @@ static void set_usbethaddr(void) ALLOC_ALIGN_BUFFER(struct msg_get_mac_address, msg, 1, 16); int ret; + if (!models[rpi_board_rev].has_onboard_eth) + return; + if (getenv("usbethaddr")) return; -- cgit v1.1 From 47705eff7a822105dfddaa03aadfe95f05849892 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 23 Dec 2014 20:01:43 -0700 Subject: ARM: rpi: support model A+ Add a board rev entry for the new model A+, and augment the board rev error handling code to be a bit more verbose. Signed-off-by: Stephen Warren --- arch/arm/include/asm/arch-bcm2835/mbox.h | 1 + board/raspberrypi/rpi/rpi.c | 14 ++++++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h index 0289ba6..88d2ec1 100644 --- a/arch/arm/include/asm/arch-bcm2835/mbox.h +++ b/arch/arm/include/asm/arch-bcm2835/mbox.h @@ -140,6 +140,7 @@ struct bcm2835_mbox_tag_hdr { #define BCM2835_BOARD_REV_B_REV2_f 0xf #define BCM2835_BOARD_REV_B_PLUS 0x10 #define BCM2835_BOARD_REV_CM 0x11 +#define BCM2835_BOARD_REV_A_PLUS 0x12 struct bcm2835_mbox_tag_get_board_rev { struct bcm2835_mbox_tag_hdr tag_hdr; diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index ca8e86d..6227e9b 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -149,6 +149,11 @@ static const struct { "bcm2835-rpi-cm.dtb", false, }, + [BCM2835_BOARD_REV_A_PLUS] = { + "Model A+", + "bcm2835-rpi-a-plus.dtb", + false, + }, }; u32 rpi_board_rev = 0; @@ -260,12 +265,17 @@ static void get_board_rev(void) } rpi_board_rev = msg->get_board_rev.body.resp.rev; - if (rpi_board_rev >= ARRAY_SIZE(models)) + if (rpi_board_rev >= ARRAY_SIZE(models)) { + printf("RPI: Board rev %u outside known range\n", + rpi_board_rev); rpi_board_rev = 0; + } name = models[rpi_board_rev].name; - if (!name) + if (!name) { + printf("RPI: Board rev %u unknown\n", rpi_board_rev); name = "Unknown model"; + } printf("RPI model: %s\n", name); } -- cgit v1.1 From 914627fe1c575112cd2aa14ab83cfa249e6810d6 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 23 Dec 2014 20:01:44 -0700 Subject: ARM: rpi: consolidate board rev error checking Create a fake model table entry with default values, so we can error check the board rev value once when querying it from the firmware, rather than error-checking for invalid board rev values every time the model table is used. Signed-off-by: Stephen Warren --- board/raspberrypi/rpi/rpi.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 6227e9b..c18271f 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -84,6 +84,11 @@ static const struct { const char *fdtfile; bool has_onboard_eth; } models[] = { + [0] = { + "Unknown model", + "bcm2835-rpi-other.dtb", + false, + }, [BCM2835_BOARD_REV_B_I2C0_2] = { "Model B (no P5)", "bcm2835-rpi-b-i2c0.dtb", @@ -185,9 +190,6 @@ static void set_fdtfile(void) return; fdtfile = models[rpi_board_rev].fdtfile; - if (!fdtfile) - fdtfile = "bcm2835-rpi-other.dtb"; - setenv("fdtfile", fdtfile); } @@ -270,12 +272,12 @@ static void get_board_rev(void) rpi_board_rev); rpi_board_rev = 0; } - - name = models[rpi_board_rev].name; - if (!name) { + if (!models[rpi_board_rev].name) { printf("RPI: Board rev %u unknown\n", rpi_board_rev); - name = "Unknown model"; + rpi_board_rev = 0; } + + name = models[rpi_board_rev].name; printf("RPI model: %s\n", name); } -- cgit v1.1 From 73c25753060c58e4c339fba306ed0ded0c335748 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 25 Dec 2014 11:09:44 +0900 Subject: scripts: fix binutils-version.sh The current binutils-version.sh expects the version string at the end of the first line. It turned out to not work with Linaro toolchain: It has "Linaro 2014.09" at the back. To fix this issue, let's parse the word right after the close parenthesis. Signed-off-by: Masahiro Yamada Reported-by: York Sun Acked-by: Dirk Behme --- scripts/binutils-version.sh | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/scripts/binutils-version.sh b/scripts/binutils-version.sh index d4d9eb4..0bc26cf 100755 --- a/scripts/binutils-version.sh +++ b/scripts/binutils-version.sh @@ -14,7 +14,9 @@ if [ ${#gas} -eq 0 ]; then exit 1 fi -MAJOR=$($gas --version | head -1 | awk '{print $NF}' | cut -d . -f 1) -MINOR=$($gas --version | head -1 | awk '{print $NF}' | cut -d . -f 2) +version_string=$($gas --version | head -1 | sed -e 's/.*) *\([0-9.]*\).*/\1/' ) + +MAJOR=$(echo $version_string | cut -d . -f 1) +MINOR=$(echo $version_string | cut -d . -f 2) printf "%02d%02d\\n" $MAJOR $MINOR -- cgit v1.1 From e38d1cb28c666f154c6f61b323ad0931724c2eb8 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Sun, 28 Dec 2014 01:35:57 +0300 Subject: initcall: add explicit hint if initcall was relocated Commit "initcall: Improve debugging support" makes sense and indeed simplifies process of matching initcalls executed with static disassembly. Until you are debugging relocation functionality. Existign output may make you think that at some point execution somehow returned back to non-relocated area. And there're many reasons/problems that may provoke this behavior. In order to make things clear let's add explicit mention in case initall was actually relocated like this: --->--- initcall: 810015f8 Relocation Offset is: 0efcf000 Relocating to 8ffcf000, new gd at 8fdced3c, sp at 8fdced20 initcall: 810015b8 initcall: 8ffd093c initcall: 8ffd0a14 initcall: 81001940 (relocated to 8ffd0940) initcall: 81001958 (relocated to 8ffd0958) --->--- Note "unexpected" jump from 0x8f... area to 0x81... area. Without explanation this raises many questions: execution jumped in relocated area right as expected and then for some reason returned back? But I hope comment in brackets will save some time for those curious developers who are careful enough to catch "unexpected jump to pre-reloc area" or those unlucky ones who'll have to deal with relocation debugging. Signed-off-by: Alexey Brodkin Cc: Simon Glass Cc: Minkyu Kang --- lib/initcall.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/lib/initcall.c b/lib/initcall.c index 39f4b3f..7142744 100644 --- a/lib/initcall.c +++ b/lib/initcall.c @@ -19,7 +19,11 @@ int initcall_run_list(const init_fnc_t init_sequence[]) if (gd->flags & GD_FLG_RELOC) reloc_ofs = gd->reloc_off; - debug("initcall: %p\n", (char *)*init_fnc_ptr - reloc_ofs); + debug("initcall: %p", (char *)*init_fnc_ptr - reloc_ofs); + if (gd->flags & GD_FLG_RELOC) + debug(" (relocated to %p)\n", (char *)*init_fnc_ptr); + else + debug("\n"); ret = (*init_fnc_ptr)(); if (ret) { printf("initcall sequence %p failed at call %p (err=%d)\n", -- cgit v1.1 From 4d013d8fa8863efb2d4264e1245a61a1a473c80c Mon Sep 17 00:00:00 2001 From: Steve Rae Date: Tue, 9 Dec 2014 11:40:11 -0800 Subject: bcm281xx: add support for "USB OTG clock" enable this clock with the following: clk_usb_otg_enable((void *)HSOTG_BASE_ADDR) Signed-off-by: Steve Rae Reviewed-by: Felipe Balbi --- arch/arm/cpu/armv7/bcm281xx/Makefile | 1 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 16 ++++++++++++++++ arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c | 27 +++++++++++++++++++++++++++ arch/arm/cpu/armv7/kona-common/clk-stubs.c | 5 +++++ arch/arm/include/asm/arch-bcm281xx/sysmap.h | 2 ++ arch/arm/include/asm/kona-common/clk.h | 1 + 6 files changed, 52 insertions(+) create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c diff --git a/arch/arm/cpu/armv7/bcm281xx/Makefile b/arch/arm/cpu/armv7/bcm281xx/Makefile index bd867a2..f24aeb3 100644 --- a/arch/arm/cpu/armv7/bcm281xx/Makefile +++ b/arch/arm/cpu/armv7/bcm281xx/Makefile @@ -10,3 +10,4 @@ obj-y += clk-bcm281xx.o obj-y += clk-sdio.o obj-y += clk-bsc.o obj-$(CONFIG_BCM_SF2_ETH) += clk-eth.o +obj-y += clk-usb-otg.o diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c index d16b99f..7e25255 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c @@ -209,6 +209,10 @@ static struct peri_clk_data sdio4_sleep_data = { .gate = SW_ONLY_GATE(0x0360, 20, 4), }; +static struct bus_clk_data usb_otg_ahb_data = { + .gate = HW_SW_GATE_AUTO(0x0348, 16, 0, 1), +}; + static struct bus_clk_data sdio1_ahb_data = { .gate = HW_SW_GATE_AUTO(0x0358, 16, 0, 1), }; @@ -331,6 +335,17 @@ static struct ccu_clock esub_ccu_clk = { */ /* KPM bus clocks */ +static struct bus_clock usb_otg_ahb_clk = { + .clk = { + .name = "usb_otg_ahb_clk", + .parent = &kpm_ccu_clk.clk, + .ops = &bus_clk_ops, + .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR, + }, + .freq_tbl = master_ahb_freq_tbl, + .data = &usb_otg_ahb_data, +}; + static struct bus_clock sdio1_ahb_clk = { .clk = { .name = "sdio1_ahb_clk", @@ -541,6 +556,7 @@ struct clk_lookup arch_clk_tbl[] = { CLK_LK(bsc2), CLK_LK(bsc3), /* Bus clocks */ + CLK_LK(usb_otg_ahb), CLK_LK(sdio1_ahb), CLK_LK(sdio2_ahb), CLK_LK(sdio3_ahb), diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c new file mode 100644 index 0000000..1d7c5af --- /dev/null +++ b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c @@ -0,0 +1,27 @@ +/* + * Copyright 2014 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include "clk-core.h" + +/* Enable appropriate clocks for the USB OTG port */ +int clk_usb_otg_enable(void *base) +{ + char *ahbstr; + + switch ((u32) base) { + case HSOTG_BASE_ADDR: + ahbstr = "usb_otg_ahb_clk"; + break; + default: + printf("%s: base 0x%p not found\n", __func__, base); + return -EINVAL; + } + + return clk_get_and_enable(ahbstr); +} diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c b/arch/arm/cpu/armv7/kona-common/clk-stubs.c index 338e0e4..fa10802 100644 --- a/arch/arm/cpu/armv7/kona-common/clk-stubs.c +++ b/arch/arm/cpu/armv7/kona-common/clk-stubs.c @@ -19,3 +19,8 @@ int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep) { return 0; } + +int __weak clk_usb_otg_enable(void *base) +{ + return 0; +} diff --git a/arch/arm/include/asm/arch-bcm281xx/sysmap.h b/arch/arm/include/asm/arch-bcm281xx/sysmap.h index 350e7f6..93ebf34 100644 --- a/arch/arm/include/asm/arch-bcm281xx/sysmap.h +++ b/arch/arm/include/asm/arch-bcm281xx/sysmap.h @@ -13,6 +13,8 @@ #define ESUB_CLK_BASE_ADDR 0x38000000 #define ESW_CONTRL_BASE_ADDR 0x38200000 #define GPIO2_BASE_ADDR 0x35003000 +#define HSOTG_BASE_ADDR 0x3f120000 +#define HSOTG_CTRL_BASE_ADDR 0x3f130000 #define KONA_MST_CLK_BASE_ADDR 0x3f001000 #define KONA_SLV_CLK_BASE_ADDR 0x3e011000 #define PMU_BSC_BASE_ADDR 0x3500d000 diff --git a/arch/arm/include/asm/kona-common/clk.h b/arch/arm/include/asm/kona-common/clk.h index 2c7e829..a5e2fd9 100644 --- a/arch/arm/include/asm/kona-common/clk.h +++ b/arch/arm/include/asm/kona-common/clk.h @@ -25,5 +25,6 @@ int clk_set_parent(struct clk *clk, struct clk *parent); struct clk *clk_get_parent(struct clk *clk); int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep); int clk_bsc_enable(void *base); +int clk_usb_otg_enable(void *base); #endif -- cgit v1.1 From d210718d9a184c5b00b7ee729e746ff8be5570bb Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 9 Dec 2014 15:03:58 -0800 Subject: common/board_f.c: fix compile error when tracing disabled When CONFIG_TRACE is disabled, linking fails with: common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to `trace_early_init' To fix, wrap the call to trace_early_init() with #ifdef CONFIG_TRACE. Cc: Simon Glass Cc: Tom Rini Signed-off-by: Kevin Hilman --- common/board_f.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/common/board_f.c b/common/board_f.c index 98c9c72..cfd77f8 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -813,7 +813,9 @@ static init_fnc_t init_sequence_f[] = { #endif setup_mon_len, setup_fdt, +#ifdef CONFIG_TRACE trace_early_init, +#endif initf_malloc, #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) /* TODO: can this go into arch_cpu_init()? */ -- cgit v1.1 From 3ef46a998a2f2c52e227246ac0438ca048ddfd09 Mon Sep 17 00:00:00 2001 From: Nikolay Dimitrov Date: Fri, 12 Dec 2014 20:01:23 +0200 Subject: Fix hash verification Fix issue in parse_verify_sum() which swaps handling of env-var and *address. Move hash_command() argc check earlier. Cosmetic change on do_hash() variable declaration. Improved help message for "hash" command. Signed-off-by: Nikolay Dimitrov Reviewed-by: Simon Glass --- common/cmd_hash.c | 28 +++++++++++++--------------- common/hash.c | 6 ++---- 2 files changed, 15 insertions(+), 19 deletions(-) diff --git a/common/cmd_hash.c b/common/cmd_hash.c index 90facbb..704d21e 100644 --- a/common/cmd_hash.c +++ b/common/cmd_hash.c @@ -18,9 +18,9 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { char *s; -#ifdef CONFIG_HASH_VERIFY int flags = HASH_FLAG_ENV; +#ifdef CONFIG_HASH_VERIFY if (argc < 4) return CMD_RET_USAGE; if (!strcmp(argv[1], "-v")) { @@ -28,8 +28,6 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) argc--; argv++; } -#else - const int flags = HASH_FLAG_ENV; #endif /* Move forward to 'algorithm' parameter */ argc--; @@ -40,19 +38,19 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } #ifdef CONFIG_HASH_VERIFY -U_BOOT_CMD( - hash, 6, 1, do_hash, - "compute hash message digest", - "algorithm address count [[*]sum_dest]\n" - " - compute message digest [save to env var / *address]\n" - "hash -v algorithm address count [*]sum\n" - " - verify hash of memory area with env var / *address" -); +#define HARGS 6 #else +#define HARGS 5 +#endif + U_BOOT_CMD( - hash, 5, 1, do_hash, - "compute message digest", - "algorithm address count [[*]sum_dest]\n" + hash, HARGS, 1, do_hash, + "compute hash message digest", + "algorithm address count [[*]hash_dest]\n" " - compute message digest [save to env var / *address]" -); +#ifdef CONFIG_HASH_VERIFY + "\nhash -v algorithm address count [*]hash\n" + " - verify message digest of memory area to immediate value, \n" + " env var or *address" #endif +); diff --git a/common/hash.c b/common/hash.c index 12d6759..aceabc5 100644 --- a/common/hash.c +++ b/common/hash.c @@ -256,7 +256,7 @@ static int parse_verify_sum(struct hash_algo *algo, char *verify_str, env_var = 1; } - if (env_var) { + if (!env_var) { ulong addr; void *buf; @@ -347,7 +347,7 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag, { ulong addr, len; - if (argc < 2) + if ((argc < 2) || ((flags & HASH_FLAG_VERIFY) && (argc < 3))) return CMD_RET_USAGE; addr = simple_strtoul(*argv++, NULL, 16); @@ -380,8 +380,6 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag, #else if (0) { #endif - if (!argc) - return CMD_RET_USAGE; if (parse_verify_sum(algo, *argv, vsum, flags & HASH_FLAG_ENV)) { printf("ERROR: %s does not contain a valid " -- cgit v1.1 From 3e1ded1fff32d8af8cc5eec22c56797621ea6649 Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Tue, 23 Dec 2014 07:41:26 +0100 Subject: buildman: Fix some typos in README Signed-off-by: Dirk Behme Acked-by: Simon Glass --- tools/buildman/README | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tools/buildman/README b/tools/buildman/README index bfb2f18..0f8ea20 100644 --- a/tools/buildman/README +++ b/tools/buildman/README @@ -42,7 +42,7 @@ Theory of Operation Buildman is a builder. It is not make, although it runs make. It does not produce any useful output on the terminal while building, except for progress information (except with -v, see below). All the output (errors, -warnings and binaries if you are ask for them) is stored in output +warnings and binaries if you ask for them) is stored in output directories, which you can look at while the build is progressing, or when it is finished. @@ -121,7 +121,7 @@ You can also use -x to specifically exclude some boards. For example: means to build all arm boards except nvidia, freescale and anything ending with 'ball'. -It is convenient to use the -n option to see whaat will be built based on +It is convenient to use the -n option to see what will be built based on the subset given. Buildman does not store intermediate object files. It optionally copies @@ -371,7 +371,7 @@ in an hour and 15 minutes. Use this time to buy a faster computer. To find out how the build went, ask for a summary with -s. You can do this -either before the build completes (presumably in another terminal) or or +either before the build completes (presumably in another terminal) or afterwards. Let's work through an example of how this is used: $ ./tools/buildman/buildman -b lcd9b -s @@ -439,7 +439,7 @@ again. At commit 16, the error moves - you can see that the old error at line 120 is fixed, but there is a new one at line 126. This is probably only because -we added some code and moved the broken line father down the file. +we added some code and moved the broken line further down the file. If many boards have the same error, then -e will display the error only once. This makes the output as concise as possible. To see which boards have @@ -647,8 +647,8 @@ This shows that commit 19 has increased text size for arm (although only one board was built) and by 96 bytes for powerpc. This increase was offset in both cases by reductions in rodata and data/bss. -Shown below the summary lines is the sizes for each board. Below each board -is the sizes for each function. This information starts with: +Shown below the summary lines are the sizes for each board. Below each board +are the sizes for each function. This information starts with: add - number of functions added / removed grow - number of functions which grew / shrunk @@ -817,7 +817,7 @@ TODO This has mostly be written in my spare time as a response to my difficulties in testing large series of patches. Apart from tidying up there is quite a bit of scope for improvement. Things like better error diffs and easier -access to log files. Also it would be nice it buildman could 'hunt' for +access to log files. Also it would be nice if buildman could 'hunt' for problems, perhaps by building a few boards for each arch, or checking commits for changed files and building only boards which use those files. -- cgit v1.1 From 125738e819a3b9d15210794b3dcef9f4d9bcf866 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 29 Dec 2014 21:22:38 -0500 Subject: Prepare v2015.01-rc4 Signed-off-by: Tom Rini --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 397edc1..1eb6821 100644 --- a/Makefile +++ b/Makefile @@ -1,7 +1,7 @@ VERSION = 2015 PATCHLEVEL = 01 SUBLEVEL = -EXTRAVERSION = -rc3 +EXTRAVERSION = -rc4 NAME = # *DOCUMENTATION* -- cgit v1.1