From 4d2aee2b3681234691b102194cc2f14857272828 Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Thu, 5 Jan 2012 17:24:13 -0600 Subject: NAND: Remove additional (CONFIG_SYS)_NAND_MAX_CHIPS NAND_MAX_CHIPS has been replaced by CONFIG_SYS_NAND_MAX_CHIPS, and the latter defaults to 1. Signed-off-by: Scott Wood --- include/configs/at91sam9m10g45ek.h | 1 - include/configs/cam_enc_4xx.h | 1 - include/configs/davinci_dm355leopard.h | 1 - include/configs/eb_cpux9k2.h | 1 - include/configs/enbw_cmc.h | 1 - include/configs/pm9263.h | 1 - include/configs/pm9g45.h | 1 - include/configs/tt01.h | 1 - 8 files changed, 8 deletions(-) diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 5ef6bd2..6a02188 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -128,7 +128,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_NAND_MAX_CHIPS 1 #define CONFIG_NAND_ATMEL #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index a21d448..86f74df 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -90,7 +90,6 @@ #define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } /* socket has two chipselects, nCE0 gated by address BIT(14) */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 /* SPI support */ #define CONFIG_SPI diff --git a/include/configs/davinci_dm355leopard.h b/include/configs/davinci_dm355leopard.h index dfa0a00..dc5b408 100644 --- a/include/configs/davinci_dm355leopard.h +++ b/include/configs/davinci_dm355leopard.h @@ -69,7 +69,6 @@ #define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 /* U-Boot command configuration */ #include diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index b08de4a..9046cf0 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -270,7 +270,6 @@ /* NAND */ -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 diff --git a/include/configs/enbw_cmc.h b/include/configs/enbw_cmc.h index c427dc7..83aec79 100644 --- a/include/configs/enbw_cmc.h +++ b/include/configs/enbw_cmc.h @@ -115,7 +115,6 @@ #define CONFIG_SYS_ALE_MASK 0x8 #undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define NAND_MAX_CHIPS 1 #define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=davinci_nand.1" #define MTDPARTS_DEFAULT \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 32c5962..bf31c13 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -253,7 +253,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_ATMEL -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index eec9153..4779878 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -115,7 +115,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_NAND_MAX_CHIPS 1 #define CONFIG_NAND_ATMEL #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/tt01.h b/include/configs/tt01.h index a553712..7e293c6 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -231,7 +231,6 @@ #define CONFIG_NAND_MXC #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 /* * actually this is nothing someone wants to configure! -- cgit v1.1