From de6f604de245b19ce2e330bc63b6522af134d7ae Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Tue, 24 Apr 2012 17:33:25 +0000 Subject: mxc_i2c: specify i2c base address in config file The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky Acked-by: Stefano Babic --- arch/arm/include/asm/arch-mx31/imx-regs.h | 7 +++++++ arch/arm/include/asm/arch-mx35/imx-regs.h | 2 +- drivers/i2c/mxc_i2c.c | 25 ++++--------------------- include/configs/flea3.h | 2 +- include/configs/imx31_phycore.h | 3 ++- include/configs/mx35pdk.h | 2 +- include/configs/mx53ard.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/mx53smd.h | 2 +- 10 files changed, 20 insertions(+), 29 deletions(-) diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index 6454acb..7ddbbd6 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -606,6 +606,13 @@ struct esdc_regs { #define UART4_BASE 0x43FB0000 #define UART5_BASE 0x43FB4000 +#define I2C1_BASE_ADDR 0x43f80000 +#define I2C1_CLK_OFFSET 26 +#define I2C2_BASE_ADDR 0x43F98000 +#define I2C2_CLK_OFFSET 28 +#define I2C3_BASE_ADDR 0x43f84000 +#define I2C3_CLK_OFFSET 30 + #define ESDCTL_SDE (1 << 31) #define ESDCTL_CMD_RW (0 << 28) #define ESDCTL_CMD_PRECHARGE (1 << 28) diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h b/arch/arm/include/asm/arch-mx35/imx-regs.h index e570ad1..3146006 100644 --- a/arch/arm/include/asm/arch-mx35/imx-regs.h +++ b/arch/arm/include/asm/arch-mx35/imx-regs.h @@ -39,7 +39,7 @@ #define MAX_BASE_ADDR 0x43F04000 #define EVTMON_BASE_ADDR 0x43F08000 #define CLKCTL_BASE_ADDR 0x43F0C000 -#define I2C_BASE_ADDR 0x43F80000 +#define I2C1_BASE_ADDR 0x43F80000 #define I2C3_BASE_ADDR 0x43F84000 #define ATA_BASE_ADDR 0x43F8C000 #define UART1_BASE 0x43F90000 diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index c88ac7c..416ffee 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -59,27 +59,10 @@ struct mxc_i2c_regs { #define I2SR_IIF (1 << 1) #define I2SR_RX_NO_AK (1 << 0) -#if defined(CONFIG_SYS_I2C_MX31_PORT1) -#define I2C_BASE 0x43f80000 -#define I2C_CLK_OFFSET 26 -#elif defined (CONFIG_SYS_I2C_MX31_PORT2) -#define I2C_BASE 0x43f98000 -#define I2C_CLK_OFFSET 28 -#elif defined (CONFIG_SYS_I2C_MX31_PORT3) -#define I2C_BASE 0x43f84000 -#define I2C_CLK_OFFSET 30 -#elif defined(CONFIG_SYS_I2C_MX53_PORT1) -#define I2C_BASE I2C1_BASE_ADDR -#elif defined(CONFIG_SYS_I2C_MX53_PORT2) -#define I2C_BASE I2C2_BASE_ADDR -#elif defined(CONFIG_SYS_I2C_MX35_PORT1) -#define I2C_BASE I2C_BASE_ADDR -#elif defined(CONFIG_SYS_I2C_MX35_PORT2) -#define I2C_BASE I2C2_BASE_ADDR -#elif defined(CONFIG_SYS_I2C_MX35_PORT3) -#define I2C_BASE I2C3_BASE_ADDR +#ifdef CONFIG_SYS_I2C_BASE +#define I2C_BASE CONFIG_SYS_I2C_BASE #else -#error "define CONFIG_SYS_I2C_MX_PORTx to use the mx I2C driver" +#error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver" #endif #define I2C_MAX_TIMEOUT 10000 @@ -114,7 +97,7 @@ static uint8_t i2c_imx_get_clk(unsigned int rate) (struct clock_control_regs *)CCM_BASE; /* start the required I2C clock */ - writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET), + writel(readl(&sc_regs->cgr0) | (3 << CONFIG_SYS_I2C_CLK_OFFSET), &sc_regs->cgr0); #endif diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 6c5fcac..e8e3c6a 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -66,7 +66,7 @@ */ #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX35_PORT3 +#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 0xfe #define CONFIG_MXC_SPI diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index acbd670..a412cf6 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -54,7 +54,8 @@ #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX31_PORT2 +#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR +#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_MXC_UART diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index ebbd371..f930ed0 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -57,7 +57,7 @@ */ #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX35_PORT1 +#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_MXC_SPI #define CONFIG_MXC_GPIO diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index ffc799c..0a928af 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -50,7 +50,7 @@ #define CONFIG_CMD_I2C #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX53_PORT2 +#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR #define CONFIG_SYS_I2C_SPEED 100000 /* MMC Configs */ diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 8f2c03f..67def93 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -53,7 +53,7 @@ #define CONFIG_CMD_I2C #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX53_PORT2 1 +#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR #define CONFIG_SYS_I2C_SPEED 100000 /* PMIC Configs */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index e71148d..61ecd02 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -89,7 +89,7 @@ /* I2C Configs */ #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX53_PORT1 +#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR #define CONFIG_SYS_I2C_SPEED 100000 /* PMIC Controller */ diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index 1df20fa..760014f 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -50,7 +50,7 @@ #define CONFIG_CMD_I2C #define CONFIG_HARD_I2C #define CONFIG_I2C_MXC -#define CONFIG_SYS_I2C_MX53_PORT2 +#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR #define CONFIG_SYS_I2C_SPEED 100000 /* MMC Configs */ -- cgit v1.1 From 3174689be239aae5901fbc5c484a15444bbe96ea Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Tue, 24 Apr 2012 17:33:26 +0000 Subject: mx6qsabrelite: add i2c support Signed-off-by: Troy Kisky Acked-by: Stefano Babic --- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 11 +++++++++++ include/configs/mx6qsabrelite.h | 8 ++++++++ 2 files changed, 19 insertions(+) diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index 29cbfed..0eae96d 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -55,6 +55,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -72,6 +77,11 @@ iomux_v3_cfg_t uart2_pads[] = { MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), }; +iomux_v3_cfg_t i2c3_pads[] = { + MX6Q_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), + MX6Q_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), +}; + iomux_v3_cfg_t usdhc3_pads[] = { MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -336,6 +346,7 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif + imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads)); #ifdef CONFIG_CMD_SATA setup_sata(); diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index fd25faf..fbd10d6 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -58,6 +58,14 @@ #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) #endif +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0xfe + /* MMC Configs */ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC -- cgit v1.1 From 9ca37d78a35b590c8ecc93a1ecfca2411fde5fb7 Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Tue, 24 Apr 2012 17:33:27 +0000 Subject: mxc_i2c: remove setting speed at each start Other then being very weird, this code was also wrong. For example, say I set speed to 100K. I'll read back the speed as 85937. But the speed is really 85937.5, so we I reset the speed to 85937, I'll get 73660.7. After a couple of transactions my speed is now exactly 68750 so it will remain there. Signed-off-by: Troy Kisky Acked-by: Marek Vasut Acked-by: Stefano Babic --- drivers/i2c/mxc_i2c.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 416ffee..fc68062 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -231,12 +231,6 @@ int i2c_imx_start(void) struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE; unsigned int temp = 0; int result; - int speed = i2c_get_bus_speed(); - u8 clk_idx = i2c_imx_get_clk(speed); - u8 idx = i2c_clk_div[clk_idx][1]; - - /* Store divider value */ - writeb(idx, &i2c_regs->ifdr); /* Enable I2C controller */ writeb(0, &i2c_regs->i2sr); -- cgit v1.1 From fa86d1c0bf3f4c68aa565952f1fcafbe2aa2c050 Mon Sep 17 00:00:00 2001 From: Torsten Fleischer Date: Tue, 17 Apr 2012 05:37:45 +0000 Subject: mxs-i2c: Fix internal address byte order Large EEPROMs, e.g. 24lc32, need 2 byte to address the internal memory. These devices require that the high byte of the internal address has to be written first. The mxs_i2c driver currently writes the address' low byte first. The following patch fixes the byte order of the internal address that should be written to the I2C device. Signed-off-by: Torsten Fleischer CC: Marek Vasut CC: Stefano Babic CC: Fabio Estevam Acked-by: Marek Vasut Acked-by: Stefano Babic --- drivers/i2c/mxs_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c index c8fea32..48aaaa6 100644 --- a/drivers/i2c/mxs_i2c.c +++ b/drivers/i2c/mxs_i2c.c @@ -97,7 +97,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen, for (i = 0; i < alen; i++) { data >>= 8; - data |= ((char *)&addr)[i] << 24; + data |= ((char *)&addr)[alen - i - 1] << 24; if ((i & 3) == 2) writel(data, &i2c_regs->hw_i2c_data); } -- cgit v1.1 From 175a7d2778ad26a244f5c846a6385413c87d95a7 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 7 May 2012 05:42:34 +0000 Subject: mx28evk: Add I2C support Add I2C support. Tested by placing a 24LC16 EEPROM into the U50 slot which comes empty from factory. Signed-off-by: Fabio Estevam Acked-by: Marek Vasut --- board/freescale/mx28evk/iomux.c | 3 +++ include/configs/mx28evk.h | 8 ++++++++ 2 files changed, 11 insertions(+) diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c index 00cc0cc..40d8cf6 100644 --- a/board/freescale/mx28evk/iomux.c +++ b/board/freescale/mx28evk/iomux.c @@ -159,6 +159,9 @@ const iomux_cfg_t iomux_setup[] = { MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2, MX28_PAD_SSP2_SS0__SSP2_D3 | (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP), + /* I2C */ + MX28_PAD_I2C0_SCL__I2C0_SCL, + MX28_PAD_I2C0_SDA__I2C0_SDA, }; #define HW_DRAM_CTL29 (0x74 >> 2) diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 8f60496..54d21e6 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -68,6 +68,7 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_USB #define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_I2C /* * Memory configurations @@ -188,6 +189,13 @@ #define CONFIG_USB_STORAGE #endif +/* I2C */ +#ifdef CONFIG_CMD_I2C +#define CONFIG_I2C_MXS +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 400000 +#endif + /* * SPI */ -- cgit v1.1