From c8514622e2713d9c47919acfe23fce386782afe7 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 2 Apr 2009 13:22:48 -0500 Subject: fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala --- board/atum8548/atum8548.c | 2 +- board/freescale/mpc8536ds/mpc8536ds.c | 2 +- board/freescale/mpc8544ds/mpc8544ds.c | 2 +- board/freescale/mpc8548cds/mpc8548cds.c | 2 +- board/freescale/mpc8568mds/mpc8568mds.c | 2 +- board/freescale/mpc8569mds/mpc8569mds.c | 2 +- board/freescale/mpc8572ds/mpc8572ds.c | 2 +- board/freescale/mpc8610hpcd/mpc8610hpcd.c | 2 +- board/freescale/mpc8641hpcn/mpc8641hpcn.c | 2 +- board/sbc8548/sbc8548.c | 2 +- board/sbc8641d/sbc8641d.c | 2 +- board/tqc/tqm85xx/tqm85xx.c | 2 +- board/xes/common/fsl_85xx_pci.c | 2 +- board/xes/xpedite5200/xpedite5200.c | 2 +- board/xes/xpedite5370/xpedite5370.c | 2 +- drivers/pci/fsl_pci_init.c | 2 +- include/asm-ppc/fsl_pci.h | 152 ++++++++++++++++++++++++++++++ include/asm-ppc/immap_fsl_pci.h | 152 ------------------------------ 18 files changed, 168 insertions(+), 168 deletions(-) create mode 100644 include/asm-ppc/fsl_pci.h delete mode 100644 include/asm-ppc/immap_fsl_pci.h diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c index 6ef663e..3e5da08 100644 --- a/board/atum8548/atum8548.c +++ b/board/atum8548/atum8548.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 31c1e15..88c6480 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 13760db..4edf420 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index efb2c5b..4d8c698 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index 97f4651..c0e4f49 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c index 53fef43..49a8546 100644 --- a/board/freescale/mpc8569mds/mpc8569mds.c +++ b/board/freescale/mpc8569mds/mpc8569mds.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 33cf0e4..0542bf4 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index b419dcc..1a6f8b4 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index ef0095a..0239abe 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 088f804..70b8119 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -29,7 +29,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index 9f69638..ff48956 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -33,7 +33,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index e1e75b8..b96e7c2 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -36,7 +36,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/xes/common/fsl_85xx_pci.c b/board/xes/common/fsl_85xx_pci.c index 9673a02..683297c 100644 --- a/board/xes/common/fsl_85xx_pci.c +++ b/board/xes/common/fsl_85xx_pci.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include diff --git a/board/xes/xpedite5200/xpedite5200.c b/board/xes/xpedite5200/xpedite5200.c index e266d1d..77afdbc 100644 --- a/board/xes/xpedite5200/xpedite5200.c +++ b/board/xes/xpedite5200/xpedite5200.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/xes/xpedite5370/xpedite5370.c b/board/xes/xpedite5370/xpedite5370.c index 4875095..22cf294 100644 --- a/board/xes/xpedite5370/xpedite5370.c +++ b/board/xes/xpedite5370/xpedite5370.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 20b2dcc..19cf1ce 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR; */ #include -#include +#include /* Freescale-specific PCI config registers */ #define FSL_PCI_PBFR 0x44 diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h new file mode 100644 index 0000000..6715064 --- /dev/null +++ b/include/asm-ppc/fsl_pci.h @@ -0,0 +1,152 @@ +/* (C) Copyright 2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __IMMAP_85xx_fsl_pci__ +#define __IMMAP_85xx_fsl_pci__ + +/* + * Common PCI/PCIE Register structure for mpc85xx and mpc86xx + */ + +/* + * PCI Translation Registers + */ +typedef struct pci_outbound_window { + u32 potar; /* 0x00 - Address */ + u32 potear; /* 0x04 - Address Extended */ + u32 powbar; /* 0x08 - Window Base Address */ + u32 res1; + u32 powar; /* 0x10 - Window Attributes */ +#define POWAR_EN 0x80000000 +#define POWAR_IO_READ 0x00080000 +#define POWAR_MEM_READ 0x00040000 +#define POWAR_IO_WRITE 0x00008000 +#define POWAR_MEM_WRITE 0x00004000 + u32 res2[3]; +} pot_t; + +typedef struct pci_inbound_window { + u32 pitar; /* 0x00 - Address */ + u32 res1; + u32 piwbar; /* 0x08 - Window Base Address */ + u32 piwbear; /* 0x0c - Window Base Address Extended */ + u32 piwar; /* 0x10 - Window Attributes */ +#define PIWAR_EN 0x80000000 +#define PIWAR_PF 0x20000000 +#define PIWAR_LOCAL 0x00f00000 +#define PIWAR_READ_SNOOP 0x00050000 +#define PIWAR_WRITE_SNOOP 0x00005000 + u32 res2[3]; +} pit_t; + +/* PCI/PCI Express Registers */ +typedef struct ccsr_pci { + u32 cfg_addr; /* 0x000 - PCI Configuration Address Register */ + u32 cfg_data; /* 0x004 - PCI Configuration Data Register */ + u32 int_ack; /* 0x008 - PCI Interrupt Acknowledge Register */ + u32 out_comp_to; /* 0x00C - PCI Outbound Completion Timeout Register */ + u32 out_conf_to; /* 0x010 - PCI Configuration Timeout Register */ + u32 config; /* 0x014 - PCIE CONFIG Register */ + char res2[8]; + u32 pme_msg_det; /* 0x020 - PCIE PME & message detect register */ + u32 pme_msg_dis; /* 0x024 - PCIE PME & message disable register */ + u32 pme_msg_int_en; /* 0x028 - PCIE PME & message interrupt enable register */ + u32 pm_command; /* 0x02c - PCIE PM Command register */ + char res4[3016]; /* (- #xbf8 #x30)3016 */ + u32 block_rev1; /* 0xbf8 - PCIE Block Revision register 1 */ + u32 block_rev2; /* 0xbfc - PCIE Block Revision register 2 */ + + pot_t pot[5]; /* 0xc00 - 0xc9f Outbound ATMU's 0, 1, 2, 3, and 4 */ + u32 res5[64]; + pit_t pit[3]; /* 0xda0 - 0xdff Inbound ATMU's 3, 2, and 1 */ +#define PIT3 0 +#define PIT2 1 +#define PIT1 2 + +#if 0 + u32 potar0; /* 0xc00 - PCI Outbound Transaction Address Register 0 */ + u32 potear0; /* 0xc04 - PCI Outbound Translation Extended Address Register 0 */ + char res5[8]; + u32 powar0; /* 0xc10 - PCI Outbound Window Attributes Register 0 */ + char res6[12]; + u32 potar1; /* 0xc20 - PCI Outbound Transaction Address Register 1 */ + u32 potear1; /* 0xc24 - PCI Outbound Translation Extended Address Register 1 */ + u32 powbar1; /* 0xc28 - PCI Outbound Window Base Address Register 1 */ + char res7[4]; + u32 powar1; /* 0xc30 - PCI Outbound Window Attributes Register 1 */ + char res8[12]; + u32 potar2; /* 0xc40 - PCI Outbound Transaction Address Register 2 */ + u32 potear2; /* 0xc44 - PCI Outbound Translation Extended Address Register 2 */ + u32 powbar2; /* 0xc48 - PCI Outbound Window Base Address Register 2 */ + char res9[4]; + u32 powar2; /* 0xc50 - PCI Outbound Window Attributes Register 2 */ + char res10[12]; + u32 potar3; /* 0xc60 - PCI Outbound Transaction Address Register 3 */ + u32 potear3; /* 0xc64 - PCI Outbound Translation Extended Address Register 3 */ + u32 powbar3; /* 0xc68 - PCI Outbound Window Base Address Register 3 */ + char res11[4]; + u32 powar3; /* 0xc70 - PCI Outbound Window Attributes Register 3 */ + char res12[12]; + u32 potar4; /* 0xc80 - PCI Outbound Transaction Address Register 4 */ + u32 potear4; /* 0xc84 - PCI Outbound Translation Extended Address Register 4 */ + u32 powbar4; /* 0xc88 - PCI Outbound Window Base Address Register 4 */ + char res13[4]; + u32 powar4; /* 0xc90 - PCI Outbound Window Attributes Register 4 */ + char res14[268]; + u32 pitar3; /* 0xda0 - PCI Inbound Translation Address Register 3 */ + char res15[4]; + u32 piwbar3; /* 0xda8 - PCI Inbound Window Base Address Register 3 */ + u32 piwbear3; /* 0xdac - PCI Inbound Window Base Extended Address Register 3 */ + u32 piwar3; /* 0xdb0 - PCI Inbound Window Attributes Register 3 */ + char res16[12]; + u32 pitar2; /* 0xdc0 - PCI Inbound Translation Address Register 2 */ + char res17[4]; + u32 piwbar2; /* 0xdc8 - PCI Inbound Window Base Address Register 2 */ + u32 piwbear2; /* 0xdcc - PCI Inbound Window Base Extended Address Register 2 */ + u32 piwar2; /* 0xdd0 - PCI Inbound Window Attributes Register 2 */ + char res18[12]; + u32 pitar1; /* 0xde0 - PCI Inbound Translation Address Register 1 */ + char res19[4]; + u32 piwbar1; /* 0xde8 - PCI Inbound Window Base Address Register 1 */ + char res20[4]; + u32 piwar1; /* 0xdf0 - PCI Inbound Window Attributes Register 1 */ + char res21[12]; +#endif + u32 pedr; /* 0xe00 - PCI Error Detect Register */ + u32 pecdr; /* 0xe04 - PCI Error Capture Disable Register */ + u32 peer; /* 0xe08 - PCI Error Interrupt Enable Register */ + u32 peattrcr; /* 0xe0c - PCI Error Attributes Capture Register */ + u32 peaddrcr; /* 0xe10 - PCI Error Address Capture Register */ +/* u32 perr_disr * 0xe10 - PCIE Erorr Disable Register */ + u32 peextaddrcr; /* 0xe14 - PCI Error Extended Address Capture Register */ + u32 pedlcr; /* 0xe18 - PCI Error Data Low Capture Register */ + u32 pedhcr; /* 0xe1c - PCI Error Error Data High Capture Register */ + u32 gas_timr; /* 0xe20 - PCI Gasket Timer Register */ +/* u32 perr_cap_stat; * 0xe20 - PCIE Error Capture Status Register */ + char res22[4]; + u32 perr_cap0; /* 0xe28 - PCIE Error Capture Register 0 */ + u32 perr_cap1; /* 0xe2c - PCIE Error Capture Register 1 */ + u32 perr_cap2; /* 0xe30 - PCIE Error Capture Register 2 */ + u32 perr_cap3; /* 0xe34 - PCIE Error Capture Register 3 */ + char res23[200]; + u32 pdb_stat; /* 0xf00 - PCIE Debug Status */ + char res24[252]; +} ccsr_fsl_pci_t; + +#endif /*__IMMAP_fsl_pci__*/ diff --git a/include/asm-ppc/immap_fsl_pci.h b/include/asm-ppc/immap_fsl_pci.h deleted file mode 100644 index 6715064..0000000 --- a/include/asm-ppc/immap_fsl_pci.h +++ /dev/null @@ -1,152 +0,0 @@ -/* (C) Copyright 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#ifndef __IMMAP_85xx_fsl_pci__ -#define __IMMAP_85xx_fsl_pci__ - -/* - * Common PCI/PCIE Register structure for mpc85xx and mpc86xx - */ - -/* - * PCI Translation Registers - */ -typedef struct pci_outbound_window { - u32 potar; /* 0x00 - Address */ - u32 potear; /* 0x04 - Address Extended */ - u32 powbar; /* 0x08 - Window Base Address */ - u32 res1; - u32 powar; /* 0x10 - Window Attributes */ -#define POWAR_EN 0x80000000 -#define POWAR_IO_READ 0x00080000 -#define POWAR_MEM_READ 0x00040000 -#define POWAR_IO_WRITE 0x00008000 -#define POWAR_MEM_WRITE 0x00004000 - u32 res2[3]; -} pot_t; - -typedef struct pci_inbound_window { - u32 pitar; /* 0x00 - Address */ - u32 res1; - u32 piwbar; /* 0x08 - Window Base Address */ - u32 piwbear; /* 0x0c - Window Base Address Extended */ - u32 piwar; /* 0x10 - Window Attributes */ -#define PIWAR_EN 0x80000000 -#define PIWAR_PF 0x20000000 -#define PIWAR_LOCAL 0x00f00000 -#define PIWAR_READ_SNOOP 0x00050000 -#define PIWAR_WRITE_SNOOP 0x00005000 - u32 res2[3]; -} pit_t; - -/* PCI/PCI Express Registers */ -typedef struct ccsr_pci { - u32 cfg_addr; /* 0x000 - PCI Configuration Address Register */ - u32 cfg_data; /* 0x004 - PCI Configuration Data Register */ - u32 int_ack; /* 0x008 - PCI Interrupt Acknowledge Register */ - u32 out_comp_to; /* 0x00C - PCI Outbound Completion Timeout Register */ - u32 out_conf_to; /* 0x010 - PCI Configuration Timeout Register */ - u32 config; /* 0x014 - PCIE CONFIG Register */ - char res2[8]; - u32 pme_msg_det; /* 0x020 - PCIE PME & message detect register */ - u32 pme_msg_dis; /* 0x024 - PCIE PME & message disable register */ - u32 pme_msg_int_en; /* 0x028 - PCIE PME & message interrupt enable register */ - u32 pm_command; /* 0x02c - PCIE PM Command register */ - char res4[3016]; /* (- #xbf8 #x30)3016 */ - u32 block_rev1; /* 0xbf8 - PCIE Block Revision register 1 */ - u32 block_rev2; /* 0xbfc - PCIE Block Revision register 2 */ - - pot_t pot[5]; /* 0xc00 - 0xc9f Outbound ATMU's 0, 1, 2, 3, and 4 */ - u32 res5[64]; - pit_t pit[3]; /* 0xda0 - 0xdff Inbound ATMU's 3, 2, and 1 */ -#define PIT3 0 -#define PIT2 1 -#define PIT1 2 - -#if 0 - u32 potar0; /* 0xc00 - PCI Outbound Transaction Address Register 0 */ - u32 potear0; /* 0xc04 - PCI Outbound Translation Extended Address Register 0 */ - char res5[8]; - u32 powar0; /* 0xc10 - PCI Outbound Window Attributes Register 0 */ - char res6[12]; - u32 potar1; /* 0xc20 - PCI Outbound Transaction Address Register 1 */ - u32 potear1; /* 0xc24 - PCI Outbound Translation Extended Address Register 1 */ - u32 powbar1; /* 0xc28 - PCI Outbound Window Base Address Register 1 */ - char res7[4]; - u32 powar1; /* 0xc30 - PCI Outbound Window Attributes Register 1 */ - char res8[12]; - u32 potar2; /* 0xc40 - PCI Outbound Transaction Address Register 2 */ - u32 potear2; /* 0xc44 - PCI Outbound Translation Extended Address Register 2 */ - u32 powbar2; /* 0xc48 - PCI Outbound Window Base Address Register 2 */ - char res9[4]; - u32 powar2; /* 0xc50 - PCI Outbound Window Attributes Register 2 */ - char res10[12]; - u32 potar3; /* 0xc60 - PCI Outbound Transaction Address Register 3 */ - u32 potear3; /* 0xc64 - PCI Outbound Translation Extended Address Register 3 */ - u32 powbar3; /* 0xc68 - PCI Outbound Window Base Address Register 3 */ - char res11[4]; - u32 powar3; /* 0xc70 - PCI Outbound Window Attributes Register 3 */ - char res12[12]; - u32 potar4; /* 0xc80 - PCI Outbound Transaction Address Register 4 */ - u32 potear4; /* 0xc84 - PCI Outbound Translation Extended Address Register 4 */ - u32 powbar4; /* 0xc88 - PCI Outbound Window Base Address Register 4 */ - char res13[4]; - u32 powar4; /* 0xc90 - PCI Outbound Window Attributes Register 4 */ - char res14[268]; - u32 pitar3; /* 0xda0 - PCI Inbound Translation Address Register 3 */ - char res15[4]; - u32 piwbar3; /* 0xda8 - PCI Inbound Window Base Address Register 3 */ - u32 piwbear3; /* 0xdac - PCI Inbound Window Base Extended Address Register 3 */ - u32 piwar3; /* 0xdb0 - PCI Inbound Window Attributes Register 3 */ - char res16[12]; - u32 pitar2; /* 0xdc0 - PCI Inbound Translation Address Register 2 */ - char res17[4]; - u32 piwbar2; /* 0xdc8 - PCI Inbound Window Base Address Register 2 */ - u32 piwbear2; /* 0xdcc - PCI Inbound Window Base Extended Address Register 2 */ - u32 piwar2; /* 0xdd0 - PCI Inbound Window Attributes Register 2 */ - char res18[12]; - u32 pitar1; /* 0xde0 - PCI Inbound Translation Address Register 1 */ - char res19[4]; - u32 piwbar1; /* 0xde8 - PCI Inbound Window Base Address Register 1 */ - char res20[4]; - u32 piwar1; /* 0xdf0 - PCI Inbound Window Attributes Register 1 */ - char res21[12]; -#endif - u32 pedr; /* 0xe00 - PCI Error Detect Register */ - u32 pecdr; /* 0xe04 - PCI Error Capture Disable Register */ - u32 peer; /* 0xe08 - PCI Error Interrupt Enable Register */ - u32 peattrcr; /* 0xe0c - PCI Error Attributes Capture Register */ - u32 peaddrcr; /* 0xe10 - PCI Error Address Capture Register */ -/* u32 perr_disr * 0xe10 - PCIE Erorr Disable Register */ - u32 peextaddrcr; /* 0xe14 - PCI Error Extended Address Capture Register */ - u32 pedlcr; /* 0xe18 - PCI Error Data Low Capture Register */ - u32 pedhcr; /* 0xe1c - PCI Error Error Data High Capture Register */ - u32 gas_timr; /* 0xe20 - PCI Gasket Timer Register */ -/* u32 perr_cap_stat; * 0xe20 - PCIE Error Capture Status Register */ - char res22[4]; - u32 perr_cap0; /* 0xe28 - PCIE Error Capture Register 0 */ - u32 perr_cap1; /* 0xe2c - PCIE Error Capture Register 1 */ - u32 perr_cap2; /* 0xe30 - PCIE Error Capture Register 2 */ - u32 perr_cap3; /* 0xe34 - PCIE Error Capture Register 3 */ - char res23[200]; - u32 pdb_stat; /* 0xf00 - PCIE Debug Status */ - char res24[252]; -} ccsr_fsl_pci_t; - -#endif /*__IMMAP_fsl_pci__*/ -- cgit v1.1 From 32049b4048ff8e59bd5ba6160d6d5206d283b2a2 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 2 Apr 2009 13:57:05 -0500 Subject: fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala --- board/atum8548/atum8548.c | 7 ------- board/freescale/mpc8536ds/mpc8536ds.c | 6 ------ board/freescale/mpc8544ds/mpc8544ds.c | 6 ------ board/freescale/mpc8548cds/mpc8548cds.c | 6 ------ board/freescale/mpc8568mds/mpc8568mds.c | 6 ------ board/freescale/mpc8569mds/mpc8569mds.c | 6 ------ board/freescale/mpc8572ds/mpc8572ds.c | 6 ------ board/freescale/mpc8610hpcd/mpc8610hpcd.c | 6 ------ board/freescale/mpc8641hpcn/mpc8641hpcn.c | 6 ------ board/sbc8548/sbc8548.c | 6 ------ board/sbc8641d/sbc8641d.c | 6 ------ board/tqc/tqm85xx/tqm85xx.c | 6 ------ board/xes/common/fsl_85xx_pci.c | 7 ------- include/asm-ppc/fsl_pci.h | 12 +++++++++--- 14 files changed, 9 insertions(+), 83 deletions(-) diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c index 3e5da08..c8085c7 100644 --- a/board/atum8548/atum8548.c +++ b/board/atum8548/atum8548.c @@ -172,9 +172,6 @@ static struct pci_controller pcie1_hose; int first_free_busno=0; -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - void pci_init_board(void) { @@ -322,7 +319,6 @@ pci_init_board(void) #ifdef CONFIG_PCI2 { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI2_ADDR; - extern void fsl_pci_init(struct pci_controller *hose); struct pci_controller *hose = &pci2_hose; struct pci_region *r = hose->regions; @@ -366,9 +362,6 @@ int last_stage_init(void) } #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 88c6480..28b27ee 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -158,9 +158,6 @@ static struct pci_controller pcie2_hose; static struct pci_controller pcie3_hose; #endif -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - int first_free_busno=0; void @@ -650,9 +647,6 @@ int board_eth_init(bd_t *bis) } #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 4edf420..34bdbad 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -93,9 +93,6 @@ static struct pci_controller pcie2_hose; static struct pci_controller pcie3_hose; #endif -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - int first_free_busno=0; void @@ -477,9 +474,6 @@ int board_eth_init(bd_t *bis) } #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 4d8c698..ac1c9b4 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -262,9 +262,6 @@ static struct pci_controller pci2_hose; static struct pci_controller pcie1_hose; #endif /* CONFIG_PCIE1 */ -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - int first_free_busno=0; void @@ -455,9 +452,6 @@ int last_stage_init(void) #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_pci_setup(void *blob, bd_t *bd) { #ifdef CONFIG_PCI1 diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index c0e4f49..8f991e5 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -311,9 +311,6 @@ static struct pci_controller pci1_hose = { static struct pci_controller pcie1_hose; #endif /* CONFIG_PCIE1 */ -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - int first_free_busno = 0; /* @@ -483,9 +480,6 @@ pci_init_board(void) #endif /* CONFIG_PCI */ #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c index 49a8546..129c58c 100644 --- a/board/freescale/mpc8569mds/mpc8569mds.c +++ b/board/freescale/mpc8569mds/mpc8569mds.c @@ -232,9 +232,6 @@ local_bus_init(void) static struct pci_controller pcie1_hose; #endif /* CONFIG_PCIE1 */ -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - int first_free_busno = 0; #ifdef CONFIG_PCI @@ -315,9 +312,6 @@ pci_init_board(void) #endif /* CONFIG_PCI */ #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 0542bf4..4b95617 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -139,9 +139,6 @@ static struct pci_controller pcie2_hose; static struct pci_controller pcie3_hose; #endif -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - int first_free_busno=0; #ifdef CONFIG_PCI void pci_init_board(void) @@ -557,9 +554,6 @@ int board_eth_init(bd_t *bis) #endif #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { phys_addr_t base; diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 1a6f8b4..a85ebea 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -229,9 +229,6 @@ static struct pci_controller pcie2_hose; int first_free_busno = 0; -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - void pci_init_board(void) { volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; @@ -402,9 +399,6 @@ void pci_init_board(void) } #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 0239abe..7422e6b 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -133,9 +133,6 @@ static struct pci_controller pci2_hose; int first_free_busno = 0; -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - void pci_init_board(void) { #ifdef CONFIG_PCI1 @@ -251,9 +248,6 @@ void pci_init_board(void) #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 70b8119..9c05c2f 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -347,9 +347,6 @@ static struct pci_controller pcie1_hose; int first_free_busno=0; -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - void pci_init_board(void) { @@ -512,9 +509,6 @@ int last_stage_init(void) } #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index ff48956..c39d2c0 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -209,9 +209,6 @@ static struct pci_controller pci2_hose; int first_free_busno = 0; -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - void pci_init_board(void) { volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR; @@ -321,9 +318,6 @@ void pci_init_board(void) #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup (void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index b96e7c2..a70fd26 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -537,9 +537,6 @@ void local_bus_init (void) */ static int first_free_busno; -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_init(struct pci_controller *hose); - #ifdef CONFIG_PCI1 static struct pci_controller pci1_hose; #endif /* CONFIG_PCI1 */ @@ -700,9 +697,6 @@ void pci_init_board (void) } #ifdef CONFIG_OF_BOARD_SETUP -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_setup (void *blob, bd_t *bd) { ft_cpu_setup (blob, bd); diff --git a/board/xes/common/fsl_85xx_pci.c b/board/xes/common/fsl_85xx_pci.c index 683297c..af34fe6 100644 --- a/board/xes/common/fsl_85xx_pci.c +++ b/board/xes/common/fsl_85xx_pci.c @@ -28,10 +28,6 @@ #include #include -extern int fsl_pci_setup_inbound_windows(struct pci_region *r); -extern void fsl_pci_config_unlock(struct pci_controller *hose); -extern void fsl_pci_init(struct pci_controller *hose); - int first_free_busno = 0; #ifdef CONFIG_PCI1 @@ -357,9 +353,6 @@ void pci_init_board(void) } #if defined(CONFIG_OF_BOARD_SETUP) -extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, - struct pci_controller *hose); - void ft_board_pci_setup(void *blob, bd_t *bd) { /* TODO - make node name (eg pci0) dynamic */ diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h index 6715064..624ca56 100644 --- a/include/asm-ppc/fsl_pci.h +++ b/include/asm-ppc/fsl_pci.h @@ -17,8 +17,14 @@ * */ -#ifndef __IMMAP_85xx_fsl_pci__ -#define __IMMAP_85xx_fsl_pci__ +#ifndef __FSL_PCI_H_ +#define __FSL_PCI_H_ + +int fsl_pci_setup_inbound_windows(struct pci_region *r); +void fsl_pci_init(struct pci_controller *hose); +void fsl_pci_config_unlock(struct pci_controller *hose); +void ft_fsl_pci_setup(void *blob, const char *pci_alias, + struct pci_controller *hose); /* * Common PCI/PCIE Register structure for mpc85xx and mpc86xx @@ -149,4 +155,4 @@ typedef struct ccsr_pci { char res24[252]; } ccsr_fsl_pci_t; -#endif /*__IMMAP_fsl_pci__*/ +#endif -- cgit v1.1 From e6a6789f41f0560ce280089fbd3f1bd0f0f64306 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sat, 4 Apr 2009 10:21:02 -0500 Subject: fsl_law: Fix bug in calculation of LAW sizing In set_ddr_laws() when we determined how much of the size requested to be mapped was covered by the the first LAW we needed to recalculate the size based on what was actually mapped. Signed-off-by: Kumar Gala --- drivers/misc/fsl_law.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c index be43a3e..f7d454d 100644 --- a/drivers/misc/fsl_law.c +++ b/drivers/misc/fsl_law.c @@ -139,6 +139,9 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) if (set_last_law(start, law_sz_enc, id) < 0) return -1; + /* recalculate size based on what was actually covered by the law */ + law_sz = 1ull << __ilog2_u64(law_sz); + /* do we still have anything to map */ sz = sz - law_sz; if (sz) { -- cgit v1.1