From 012225eff53ecf500e6eda9fff1b06aeae37b694 Mon Sep 17 00:00:00 2001 From: Terry Lv Date: Fri, 10 Feb 2012 23:45:02 +0800 Subject: ENGR00174104-1: Add conditional CONFIG to fix build break Add CONFIG_MXC_FEC macro to fec init code. Add CONFIG_VIDEO_MX5 to ipu init code. Change temperature function as static. For in iram boot, FEC configs is not needed, those FEC init code will cause build errors. These changes can reduce image size. Signed-off-by: Terry Lv --- board/freescale/mx6q_arm2/mx6q_arm2.c | 5 +++++ board/freescale/mx6q_sabresd/mx6q_sabresd.c | 4 ++++ cpu/arm_cortexa8/mx6/generic.c | 8 ++++++-- 3 files changed, 15 insertions(+), 2 deletions(-) diff --git a/board/freescale/mx6q_arm2/mx6q_arm2.c b/board/freescale/mx6q_arm2/mx6q_arm2.c index 731feed..ba0d6c1 100644 --- a/board/freescale/mx6q_arm2/mx6q_arm2.c +++ b/board/freescale/mx6q_arm2/mx6q_arm2.c @@ -27,7 +27,9 @@ #include #include #include +#ifdef CONFIG_MXC_FEC #include +#endif #if defined(CONFIG_VIDEO_MX5) #include #include @@ -893,6 +895,7 @@ int board_late_init(void) return 0; } +#ifdef CONFIG_MXC_FEC static int phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *pdata) { @@ -935,6 +938,7 @@ int mx6_rgmii_rework(char *devname, int phy_addr) return 0; } + #if defined CONFIG_MX6Q iomux_v3_cfg_t enet_pads[] = { MX6Q_PAD_KEY_COL1__ENET_MDIO, @@ -1010,6 +1014,7 @@ void enet_board_init(void) reg |= 0x8000; writel(reg, GPIO4_BASE_ADDR + 0x0); } +#endif int checkboard(void) { diff --git a/board/freescale/mx6q_sabresd/mx6q_sabresd.c b/board/freescale/mx6q_sabresd/mx6q_sabresd.c index 3307b92..db325ed 100644 --- a/board/freescale/mx6q_sabresd/mx6q_sabresd.c +++ b/board/freescale/mx6q_sabresd/mx6q_sabresd.c @@ -26,7 +26,9 @@ #include #include #include +#ifdef CONFIG_MXC_FEC #include +#endif #if defined(CONFIG_VIDEO_MX5) #include #include @@ -746,6 +748,7 @@ int board_late_init(void) return 0; } +#ifdef CONFIG_MXC_FEC static int phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *pdata) { @@ -837,6 +840,7 @@ void enet_board_init(void) reg |= 0x2000000; writel(reg, GPIO1_BASE_ADDR + 0x0); } +#endif int checkboard(void) { diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c index 281368b..144924a 100644 --- a/cpu/arm_cortexa8/mx6/generic.c +++ b/cpu/arm_cortexa8/mx6/generic.c @@ -801,7 +801,7 @@ int clk_config(u32 ref, u32 freq, u32 clk_type) } #endif -int read_cpu_temperature(void) +static inline int read_cpu_temperature(void) { unsigned int reg, tmp, temperature, i; unsigned int raw_25c, raw_hot, hot_temp, raw_n25c, ratio; @@ -874,7 +874,7 @@ int read_cpu_temperature(void) } -void check_cpu_temperature(void) +static void check_cpu_temperature(void) { cpu_tmp = read_cpu_temperature(); while (cpu_tmp > TEMPERATURE_MIN && cpu_tmp < TEMPERATURE_MAX) { @@ -972,6 +972,7 @@ int arch_cpu_init(void) } #endif +#ifdef CONFIG_VIDEO_MX5 void ipu_clk_enable(void) { } @@ -979,7 +980,9 @@ void ipu_clk_enable(void) void ipu_clk_disable(void) { } +#endif +#ifdef CONFIG_CMD_IMXOTP int otp_clk_enable(void) { u32 reg = 0; @@ -1001,6 +1004,7 @@ int otp_clk_disable(void) writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2); return 0; } +#endif #ifdef CONFIG_IMX_UDC void enable_usboh3_clk(unsigned char enable) -- cgit v1.1