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Our chips may have different spl size and spl header, so
use imagename(passed by "mkimage -n") to select them now.
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
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This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
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The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial loader) when it returns.
Modify idblock generation code to support it.
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Our chips may have different max spl size and spl header, so
we need to add configs for that.
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Dropped CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h,
Added $(if...) to tools/Makefile to fix widespread build breakage
Signed-off-by: Simon Glass <sjg@chromium.org>
Series-changes: 8
- Drop CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h,
- Add $(if...) to tools/Makefile to fix widespread build breakage
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Rockchip SoCs require certain formats for code that they execute, The
simplest format is a 4-byte header at the start of a binary file. Add
support for this so that we can create images that the boot ROM understands.
Signed-off-by: Simon Glass <sjg@chromium.org>
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