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* POST: Add disable interrupts in some of the missing CPU POST testsStefan Roese2008-07-20-0/+36
| | | | | | | Some CPU POST tests did not disable the interrupts while running. This seems to be necessary to protect this self modifying code. Signed-off-by: Stefan Roese <sr@denx.de>
* Big white-space cleanup.Wolfgang Denk2008-05-21-145/+145
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* POST: move CONFIG_POST to MakefilesYuri Tikhonov2008-04-22-9/+8
| | | | | | | | | | | | | Introduce the new logical option CONFIG_HAS_POST which is set when the platform has CONFIG_POST set. Use CONFIG_HAS_POST in the post/ Makefiles to determine should the POST libs be compiled for the selected target platform, or not. To avoid breaking u-boot linking process, the empty post/libpost.a file is created for platforms which do not have POSTs. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* POST: preparations for moving CONFIG_POST to MakefilesYuri Tikhonov2008-04-22-87/+0
| | | | | | | Remove CONFIG_POST ifdefs from the post/ source files. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Fix CPU POST test failureYuri Tikhonov2008-02-21-0/+3
| | | | | | | | | | | | The CPU POST test code (run from cpu_post_exec_31()) doesn't follow the ABI carefully, at least the CR3, CR4, and CR5 fields of CR are clobbered by it. The gcc-4.2 with its more aggressive optimization exposes this fact. This patch just saves the CR value before running the test code, so allowing it to do anything it wants with CR. Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Acked-by: Yuri Tikhonov <yur@emcraft.com> --
* ppc4xx: Enable CPU POST test for 4xx with dcache enabledStefan Roese2007-10-31-0/+11
| | | | | | | | Now with caches enabled (i- and d-cache) on 44x, we need a chance to disable the cache for the CPU POST tests, since these tests consist of self modifying code. This is done via the new change_tlb() function. Signed-off-by: Stefan Roese <sr@denx.de>
* Merged POST framework with the current TOT.Sergei Poselenov2007-07-05-0/+752
| | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
* Extend POST support for PPC440Igor Lisitsin2007-06-22-4/+16
| | | | | | | Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
* Restructure POST directory to support of other CPUs, boards, etc.Wolfgang Denk2007-03-06-0/+4101