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* Move arch/ppc to arch/powerpcStefan Roese2010-04-21-1/+1
| | | | | | | | | | | | | | | | | As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
* ppc: Move cpu/$CPU to arch/ppc/cpu/$CPUPeter Tyser2010-04-13-1/+1
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* ppc_4xx: Apply new HW register namesNiklaus Giger2009-10-07-25/+25
| | | | | | | | Modify all existing *.c files to use the new register names as seen in the AMCC manuals. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Big cleanup of PPC4xx definesStefan Roese2009-09-11-36/+36
| | | | | | | | | | | | | | | | This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Replace 4xx lowercase SPR referencesMatthias Fuchs2009-07-24-3/+3
| | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-54/+54
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Fix merge problemsStefan Roese2008-08-06-0/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config optionsStefan Roese2008-06-06-5/+5
| | | | | | | | We use upper case letters for the AMCC processor defines (like CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and not CONFIG_440SPe. This patch fixes the last misspelled config options. Signed-off-by: Stefan Roese <sr@denx.de>
* POST: OCM test added.Yuri Tikhonov2008-05-20-0/+90
| | | | | | | | Added OCM test to POST layer. This version runs before all other tests but doesn't yet interrupt post sequence on failure. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* post/cpu/ppc4xx/Makefile: line length cleanupWolfgang Denk2008-05-10-1/+7
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* post: Fix building with O=Kumar Gala2008-04-28-1/+1
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* POST: move CONFIG_POST to MakefilesYuri Tikhonov2008-04-22-2/+3
| | | | | | | | | | | | | Introduce the new logical option CONFIG_HAS_POST which is set when the platform has CONFIG_POST set. Use CONFIG_HAS_POST in the post/ Makefiles to determine should the POST libs be compiled for the selected target platform, or not. To avoid breaking u-boot linking process, the empty post/libpost.a file is created for platforms which do not have POSTs. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* POST: preparations for moving CONFIG_POST to MakefilesYuri Tikhonov2008-04-22-22/+2
| | | | | | | Remove CONFIG_POST ifdefs from the post/ source files. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* ppc4xx: program_tlb now uses 64bit physical addessStefan Roese2008-03-15-2/+0
| | | | | | | | This patch changes the physical addess parameter from 32bit to 64bit. This is needed for 36bit 4xx platforms to access areas located beyond the 4GB border, like SoC peripherals (EBC etc.). Signed-off-by: Stefan Roese <sr@denx.de>
* POST: Disable cache while SPR POSTAnatolij Gustschin2008-03-02-0/+14
| | | | | | | | Currently (since commit b2e2142c) u-boot crashes on sequoia board while SPR test if CONFIG_4xx_DCACHE is enabled. This patch disables the cache while SPR test. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* ppc4xx: Refactor ECC POST for AMCC Denali coreLarry Johnson2008-01-16-131/+135
| | | | | | | | | | | | | The ECC POST reported intermittent failures running after power-up on the Korat PPC440EPx board. Even when the test passed, the debugging output occasionally reported additional unexpected ECC errors. This refactoring has three main objectives: (1) minimize the code executed with ECC enabled during the tests, (2) add more checking of the results so any unexpected ECC errors would cause the test to fail, and (3) use synchronization (only) where required by the processor. Signed-off-by: Larry Johnson <lrj@acm.org>
* ppc_4xx: Fix post spr.c for PPC405Niklaus Giger2008-01-14-0/+6
| | | | | | | post/cpu/ppc4xx/spr.c contained a few checks for registers only present for PPC440 and derivates processor. Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
* Cosmetic changes to ECC POST for AMCC Denali coreLarry Johnson2007-12-27-6/+6
| | | | Signed-off-by: Larry Johnson <lrj@acm.org>
* ppc4xx: Fix compilation problem in 405 cache POST testStefan Roese2007-12-27-1/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix problem in 44x cache POST routineStefan Roese2007-12-27-22/+19
| | | | | | | | | | | As repoted by Larry Johnson, running "diag run cache" caused a crash in U-Boot. This problem was introduced by a patch that removed the TLB entry for the cache test after the test has completed. Since this TLB was only setup once, a 2nd attempt to run this cache test failed with a crash. Now this TLB entry is created every time the routine is called. Signed-off-by: Stefan Roese <sr@denx.de>
* Fix/enhance ECC POST for 440EPx/GRxLarry Johnson2007-12-27-46/+46
| | | | | | | | | This patch allows the ECC POST to be used for different boards with the PPC440 Denali SDRAM controller. Modifications include skipping the test if ECC is not enabled (as for non-ECC DIMMs) and adding synchronization to prevent timing errors. Signed-off-by: Larry Johnson <lrj@acm.org>
* PPC4xx: Move/rename ECC POST for 440EPx/GRxLarry Johnson2007-12-27-0/+267
| | | | Signed-off-by: Larry Johnson <lrj@acm.org>
* ppc4xx: use correct io accessors for 4xx ethernet POSTMatthias Fuchs2007-12-27-21/+21
| | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* ppc4xx: Change 4xx POST ethernet test to handle cached memory tooStefan Roese2007-10-31-1/+10
| | | | | | | This patch enables the 4xx EMAC POST driver to work too, when dcache is enabled. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove temporary TLB entry in POST cache test only for 440Stefan Roese2007-10-31-0/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove compiler warning from previous commitStefan Roese2007-10-31-1/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove temporary TLB entry in POST cache testStefan Roese2007-10-31-0/+2
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix POST ethernet test for HaleakalaStefan Roese2007-10-31-7/+29
| | | | | | | | The POST ethernet test needed to be changed to dynamically determine the count of ethernet devices. This code is cloned from the 4xx ethernet driver. Signed-off-by: Stefan Roese <sr@denx.de>
* POST: Add 405EX support to 4xx UART POST testStefan Roese2007-10-31-2/+13
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* POST: Fix merge problemStefan Roese2007-08-14-4/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/stefan/git/u-boot/zeusStefan Roese2007-08-14-8/+197
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| * POST: Add option for external ethernet loopback testStefan Roese2007-08-14-1/+8
| | | | | | | | | | | | | | | | When CFG_POST_ETHER_EXT_LOOPBACK is defined, the ethernet POST is not done using an internal loopback connection, but by assuming that an external loopback connector is plugged into the board. Signed-off-by: Stefan Roese <sr@denx.de>
| * POST: Add ppc405 support to cache and UART POSTStefan Roese2007-08-14-7/+186
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | POST: Add ppc4xx UART POST support without external uart clock (lwmon5)Yuri Tikhonov2007-08-10-0/+43
| | | | | | | | | | | | | | | | The patch adds support for UART POST on ppc44x-based boards with no external serial clocks installed. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Acked-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Update 440EPx lwmon5 board supportStefan Roese2007-07-31-1/+1
|/ | | | | | | | - Clear ECC status regs after ECC POST test - Set dcbz for ECC generation with caches enabled as default - Code cleanup Signed-off-by: Stefan Roese <sr@denx.de>
* Coding style cleanup; update CHANGELOG.Wolfgang Denk2007-07-10-9/+8
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merged POST framework with the current TOT.Sergei Poselenov2007-07-05-25/+998
| | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
* Extend POST support for PPC440Igor Lisitsin2007-06-22-0/+541
Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
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