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* Merge commit 'u-boot/master' into for-1.3.1Stefan Roese2007-12-11-3/+3
|\ | | | | | | | | | | Conflicts: drivers/rtc/Makefile
| * drivers/mtd : move mtd drivers to drivers/mtdJean-Christophe PLAGNIOL-VILLARD2007-11-25-3/+3
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | ppc4xx: Add AMCC Kilauea/Haleakala NAND booting supportStefan Roese2007-11-03-0/+219
| | | | | | | | | | | | | | This patch adds NAND booting support for the AMCC 405EX(r) eval boards. Again, only one image supports both targets. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Fix acadia_nand build problemStefan Roese2007-10-31-1/+5
| | | | | | | | | | | | | | Since the cache handling functions were moved from start.S into cache.S the acadia NAND booting Makfile needs to be adapted accordingly. Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Fixed offset of refresh rate type for Bamboo on-board DDR SDRAMEugene O'Brien2007-10-31-0/+6
|/ | | | | | | | | | | | | This patch also adds a note to the fixed DDR setup for Bamboo NAND booting: Note: As found out by Eugene O'Brien <eugene.obrien@advantechamt.com>, the fixed DDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM modules are still plugged in. So it is recommended to remove the DIMM modules while using the NAND booting code with the fixed SDRAM setup! Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com> Signed-off-by: Stefan Roese <sr@denx.de>
* [ppc4xx] Individual handling of sdram.c for bamboo_nand buildGrzegorz Bernacki2007-09-11-0/+6
| | | | | | | | Bamboo has a file sdram.c which needs special treatment when building in separate directory. It has to be linked to build directory otherwise it is not seen. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* [ppc4xx] Fix problem with NAND booting on AMCC AcadiaStefan Roese2007-06-19-5/+15
| | | | | | | | The latest changes showed a problem with the location of the NAND-SPL image in the OCM and the init-data area (incl. cache). This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval boardStefan Roese2007-06-06-0/+214
| | | | | | | | | | | | | | | | This patch adds NAND booting support for the AMCC Acadia eval board. Please make sure to configure jumper J7 to position 2-3 when booting from NOR, and to position 1-2 when booting for NAND. I also added a board command to configure the I2C bootstrap EEPROM values. Right now only 267MHz is support for booting either via NOR or NAND FLASH. Here the usage: => bootstrap 267 nor ;to configure the board for 267MHz NOR booting => bootstrap 267 nand ;to configure the board for 267MHz NNAND booting Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/stefan/git/u-boot/bamboo-nandStefan Roese2007-06-01-41/+369
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| * ppc4xx: Update Sequoia NAND booting support with ECCStefan Roese2007-06-01-5/+6
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Add NAND booting support for AMCC Bamboo (440EP) eval boardStefan Roese2007-06-01-0/+306
| | | | | | | | | | | | | | | | | | | | This patch adds NAND booting support for the AMCC Bamboo eval board. Since the NAND-SPL boot image is limited to 4kbytes, this version only supports the onboard 64MBytes of DDR. The DIMM modules can't be supported, since the setup code for I2C DIMM autodetection and configuration is too big for this NAND bootloader. Signed-off-by: Stefan Roese <sr@denx.de>
| * NAND: Add ECC support to NAND booting support in nand_spl/nand_boot.cStefan Roese2007-06-01-39/+56
| | | | | | | | | | | | | | | | | | The U-Boot NAND booting support is now extended to support ECC upon loading of the NAND U-Boot image. Tested on AMCC Sequoia (440EPx) and Bamboo (440EP). Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Sequoia: Remove cpu/ppc4xx/speed.c from NAND bootingStefan Roese2007-05-05-5/+1
|/ | | | | | | | Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big for the 4k NAND boot image so define bus_frequency to 133MHz here which is save for the refresh counter setup. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setupStefan Roese2007-03-06-1/+5
| | | | | | | | | | | | | | As provided by the AMCC applications team, this patch optimizes the DDR2 setup for 166MHz bus speed. The values provided are also save to use on a "normal" 133MHz PLB bus system. Only the refresh counter setup has to be adjusted as done in this patch. For this the NAND booting version had to include the "speed.c" file from the cpu/ppc4xx directory. With this addition the NAND SPL image will just fit into the 4kbytes of program space. gcc version 4.x as provided with ELDK 4.x is needed to generate this optimized code. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Add DDR2 optimization code for Sequoia (440EPx) boardStefan Roese2007-01-05-0/+2
| | | | | | | | | | This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese <sr@denx.de>
* Fix sequoia separate object direcory building problems.Marian Balakowicz2006-10-23-24/+40
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* Coding style cleanupWolfgang Denk2006-10-09-2/+2
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* Add NAND environment support for PPC440EPx Sequoia NAND boot configStefan Roese2006-09-12-2/+1
| | | | Patch by Stefan Roese, 12 Sep 2006
* Update NAND boot documentationStefan Roese2006-09-12-2/+2
| | | | Patch by Stefan Roese, 12 Sep 2006
* Add support for AMCC Sequoia PPC440EPx eval boardStefan Roese2006-09-07-0/+375
- Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006
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