arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	Merge with /home/stefan/git/u-boot/bamboo-nand	Stefan Roese	2007-06-01	-41/+369
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\| *	ppc4xx: Update Sequoia NAND booting support with ECC	Stefan Roese	2007-06-01	-5/+6
\| \| \| \| \| \| \| \|	Signed-off-by: Stefan Roese <sr@denx.de>
\| *	ppc4xx: Add NAND booting support for AMCC Bamboo (440EP) eval board	Stefan Roese	2007-06-01	-0/+306
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This patch adds NAND booting support for the AMCC Bamboo eval board. Since the NAND-SPL boot image is limited to 4kbytes, this version only supports the onboard 64MBytes of DDR. The DIMM modules can't be supported, since the setup code for I2C DIMM autodetection and configuration is too big for this NAND bootloader. Signed-off-by: Stefan Roese <sr@denx.de>
\| *	NAND: Add ECC support to NAND booting support in nand_spl/nand_boot.c	Stefan Roese	2007-06-01	-39/+56
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	The U-Boot NAND booting support is now extended to support ECC upon loading of the NAND U-Boot image. Tested on AMCC Sequoia (440EPx) and Bamboo (440EP). Signed-off-by: Stefan Roese <sr@denx.de>
* \|	ppc4xx: Sequoia: Remove cpu/ppc4xx/speed.c from NAND booting	Stefan Roese	2007-05-05	-5/+1
\|/ \| \| \| \| \| \| \|	Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big for the 4k NAND boot image so define bus_frequency to 133MHz here which is save for the refresh counter setup. Signed-off-by: Stefan Roese <sr@denx.de>
*	[PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup	Stefan Roese	2007-03-06	-1/+5
\| \| \| \| \| \| \| \| \| \| \| \| \| \|	As provided by the AMCC applications team, this patch optimizes the DDR2 setup for 166MHz bus speed. The values provided are also save to use on a "normal" 133MHz PLB bus system. Only the refresh counter setup has to be adjusted as done in this patch. For this the NAND booting version had to include the "speed.c" file from the cpu/ppc4xx directory. With this addition the NAND SPL image will just fit into the 4kbytes of program space. gcc version 4.x as provided with ELDK 4.x is needed to generate this optimized code. Signed-off-by: Stefan Roese <sr@denx.de>
*	[PATCH] Add DDR2 optimization code for Sequoia (440EPx) board	Stefan Roese	2007-01-05	-0/+2
\| \| \| \| \| \| \| \| \| \|	This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese <sr@denx.de>
*	Fix sequoia separate object direcory building problems.	Marian Balakowicz	2006-10-23	-24/+40
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*	Coding style cleanup	Wolfgang Denk	2006-10-09	-2/+2
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*	Add NAND environment support for PPC440EPx Sequoia NAND boot config	Stefan Roese	2006-09-12	-2/+1
\| \| \| \|	Patch by Stefan Roese, 12 Sep 2006
*	Update NAND boot documentation	Stefan Roese	2006-09-12	-2/+2
\| \| \| \|	Patch by Stefan Roese, 12 Sep 2006
*	Add support for AMCC Sequoia PPC440EPx eval board	Stefan Roese	2006-09-07	-0/+375
	- Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006