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* SMDK6400: Add some labels to u-boot.lds to support nand_splseedshope2011-03-27-1/+16
| | | | | | | | In the nand_spl feature of SMDK6400. Add some relocation symbols to nand_spl/board/samsung/smdk6400/u-boot.lds to fix the compile error. Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* rename _end to __bss_end__Po-Yu Chuang2011-03-27-15/+15
| | | | | | | Currently, _end is used for end of BSS section. We want _end to mean end of u-boot image, so we rename _end to __bss_end__ first. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
* Introduce a new linker flag LDFLAGS_FINALHaiying Wang2011-03-22-19/+32
| | | | | | | | | | | | | | | commit 8aba9dceebb14144e07d19593111ee3a999c37fc Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGS breaks the usage of --gc-section to build nand_spl. We still need linker option --gc-section for every uboot image, not only the main one. LDFLAGS_FINAL passes the --gc-sections to each uboot image. To get the proper linker flags, we use LDFLAGS and LDFLAGS_FINAL to replace PLATFORM_LDFLAGS in the Makefile of each nand_spl board. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* mx31pdk: Use the new relocation schemeFabio Estevam2011-02-21-7/+52
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* powerpc/85xx: Add support for booting from NAND on MPC8572DSKumar Gala2011-01-14-0/+215
| | | | | | | | Mimic support that exists on MPC8536DS on the MPC8572DS to allow booting from NAND. Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* PowerPC, nand_spl: Add relocation support for -fpicJoakim Tjernlund2010-12-17-3/+9
| | | | | | | | | | | By rearranging the linker script we get support for relocation of -fpic for free. Move __got2_entries outside _GOT2_TABLE_ defining scope matching the rest of PowerPC Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* powerpc/nand spl: link libgccScott Wood2010-12-16-8/+8
| | | | | | | | | | | | | | | | Recent GCC (4.4+) performs out-of-line epilogues in some cases, when optimizing for size. It causes a link error for _restgpr_30_x (and similar) if libgcc is not linked. It actually increases size with very small binaries, due to the fixed size of the out-of-line code, and not having any functions that actually need to restore more than 2 or 3 registers. But I don't see a way to turn it off, other than asking GCC to optimize for speed -- which may also increase size for some boards. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Wolfgang Denk <wd@denx.de>
* Davinci 8xx: Move common functions to share codeStefano Babic2010-11-30-3/+3
| | | | | | | | | | | | | | | | | As more Davinci 8xx board can be added, move common code to be shared between boards. * rebased ontop of Sugosh's patches * moving the HAWKBOARD_KICK{0,1}_UNLOCK defines to arch/arm/include/asm/arch-davinci/davinci_misc.h from to arch/arm/include/asm/arch-davinci/da8xx_common.h * don't define dram functions in PRELOADER * move sync_env_enetaddr into existing EMAC ifdef * use misc.c in hawkboard nand_spl Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Add board support for hawkboardSughosh Ganu2010-11-30-0/+216
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds basic board support for TI's OMAP-L138 based Hawkboard. This board is pretty similar to the da850 EVM. Support for nand and network access is added in this version. The following bootup procedure is used. At reset, the Rom Boot Loader(RBL), initialises the ddr and the nand controllers and copies the second stage bootloader(nand_spl) to RAM. The secondary bootloader then copies u-boot from a predefined location in the nand flash to the RAM, and passes control to the u-boot image. Three config options are supported * hawkboard_config - Used to create the u-boot.bin. Tftp the u-boot.bin image to the RAM from u-boot, and flash to the nand flash at address 0xe0000. * hawkboard_nand_config - Used to generate the secondary bootloader(nand_spl) image. This creates an elf file u-boot-spl under nand_spl/. Create an AIS signed image using this file, and flash it to the nand flash at address 0x20000. The ais file should fit in one block. * hawkboard_uart_config - This is same as the first image, but with the TEXT_BASE as expected by the RBL(0xc1080000). Create the AIS Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Remove board_init_f function from nand_boot.cSughosh Ganu2010-11-28-1/+5
| | | | | | | | | | | | | Remove the board_init_f function from nand_spl/nand_boot.c. This function is to be defined by all boards using the nand_spl functionality in their individual board directory. Currently this function was being used by the smdk6400 board. Added the board specific function definition. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* 83xx: Cleanup for partial linking and --gc-sectionsWolfgang Denk2010-11-27-6/+8
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Haiying Wang <r54964@freescale.com>
* ppc4xx: Cleanup for partial linking and --gc-sectionsWolfgang Denk2010-11-27-6/+6
| | | | | | | | | | | | | | | | | This commit adapts 4xx boards for partial linking with --gc-sections. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Tirumala Marri <tmarri@apm.com> Cc: David Updegraff <dave@cray.com> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Larry Johnson <lrj@acm.org> Cc: Peter De Schrijver <p2@mind.be> Cc: Niklaus Giger <niklaus.giger@netstal.com> Cc: Daniel Poirot <dan.poirot@windriver.com> Acked-by: Stefan Roese <sr@denx.de>
* 83xx: Fix NAND_SPL link addressScott Wood2010-11-27-6/+6
| | | | | | | | | | | | | | | | | Apply the same fix for 83xx as was done for 85xx in commit 96196a1f7546904563994d2d041804a816d7c139. Without this, NAND SPLs are built with the text base intended for the main image, resulting in a broken, very large u-boot-nand.bin. The block of defines for NAND boot is moved closer to where CONFIG_SYS_TEXT_BASE is defined. We can't directly use CONFIG_SYS_NAND_U_BOOT_DST in the definition of CONFIG_SYS_TEXT_BASE because autoconf.mk will include the literal text "CONFIG_SYS_NAND_U_BOOT_DST", but at least keep them close and point out that they're supposed to be the same. Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-11-17-21/+19
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| * tx25: fix linker file for newer ld supportAlbert Aribaud2010-11-17-21/+19
| | | | | | | | | | | | | | | | | | older ld emitted all ELF relocations in input sections named .rel.dyn, whereas newer ld uses names of the form .rel*. The linker script only collected .rel.dyn input sections. Rewrite to collect all .rel* input sections. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
* | powerpc/85xx: add CONFIG_SYS_TEXT_BASE_SPL for 85xx nand spl buildHaiying Wang2010-11-12-6/+6
|/ | | | | | | | | | Introduce a SPL specific CONFIG_SYS_TEXT_BASE_SPL define to be used by the linker. This has similiar semantics to CONFIG_SYS_TEXT_BASE however since SPL is a unqiue image we introduce a new variable to control its text base address. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'elf_reloc'Wolfgang Denk2010-10-19-0/+13
|\ | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/include/asm/config.h board/LaCie/edminiv2/config.mk board/karo/tx25/config.mk board/logicpd/imx27lite/config.mk doc/README.arm-relocation Signed-off-by: Wolfgang Denk <wd@denx.de>
| * arm926ejs, tx25: add support for ELF relocationsHeiko Schocher2010-10-13-0/+13
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk2010-10-18-44/+44
|/ | | | | | | | | | | | The change is currently needed to be able to remove the board configuration scripting from the top level Makefile and replace it by a simple, table driven script. Moving this configuration setting into the "CONFIG_*" name space is also desirable because it is needed if we ever should move forward to a Kconfig driven configuration system. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ppc4xx: Big header cleanup, mostly PPC440 relatedStefan Roese2010-09-23-1/+1
| | | | | | | | | | | This patch starts a bit PPC4xx header cleanup. First patch mostly touches PPC440 files. A later patch will touch the PPC405 files as well. This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Move ppc4xx headers to powerpc include directoryStefan Roese2010-09-23-2/+2
| | | | | | | | | This patch moves some ppc4xx related headers from the common include directory (include/) to the powerpc specific one (arch/powerpc/include/asm/). This way to common include directory is not so cluttered with files. Signed-off-by: Stefan Roese <sr@denx.de>
* ARM: implement relocation for ARM926Heiko Schocher2010-09-19-1/+13
| | | | | | | | | | | | | | | | | | | | | Change the implementation for arm926 to relocate the code to an arbitrary address in RAM. Adapt the TX25 (i.MX25), magnesium board to test the changes. On the tx25 board TEXT_BASE is set to the final relocation address to prevent one more copying of u-boot code when relocating. More info see: doc/README.arm-relocation da850 board: Tested-by: Ben Gardiner <bengardiner@nanometrics.ca> Portions of this work were supported by funding from the CE Linux Forum. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Ben Gardiner <bengardiner@nanometrics.ca>
* 83xx/85xx/86xx: LBC register cleanupBecky Bruce2010-07-16-3/+2
| | | | | | | | | | | | | | | | | | | | | Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Move arch/ppc to arch/powerpcStefan Roese2010-04-21-49/+49
| | | | | | | | | | | | | | | | | As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
* arm: Move cpu/$CPU to arch/arm/cpu/$CPUPeter Tyser2010-04-13-6/+6
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* ppc: Move cpu/$CPU to arch/ppc/cpu/$CPUPeter Tyser2010-04-13-37/+37
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Replace "#include <asm-$ARCH/$FILE>" with "#include <asm/$FILE>"Peter Tyser2010-04-13-2/+2
| | | | | | | | | | The appropriate include/asm-$ARCH directory should already by symlinked to include/asm so using the whole "asm-$ARCH" path is unnecessary. This change should also allow us to move the include/asm-$ARCH directories into their appropriate lib/$ARCH/ directories. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Move lib_$ARCH directories to arch/$ARCH/libPeter Tyser2010-04-13-12/+12
| | | | | | | | | Also move lib_$ARCH/config.mk to arch/$ARCH/config.mk This change is intended to clean up the top-level directory structure and more closely mimic Linux's directory organization. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Create CPUDIR variablePeter Tyser2010-04-13-6/+6
| | | | | | | | | | | | The CPUDIR variable points to the location of a target's CPU directory. Currently, it is set to cpu/$CPU. However, using $CPUDIR will allow for more flexibility in the future. It lays the groundwork for reorganizing U-Boot's directory structure to support a layout such as: arch/$ARCH/cpu/$CPU/* (architecture with multiple CPU types) arch/$ARCH/cpu/* (architecture with one CPU type) Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Add support for KARO TX25 boardJohn Rigby2010-03-07-0/+137
| | | | | | | | | | | | | | This is an i.MX25 base board with only NAND so it uses nand_spl to boot. Signed-off-by: John Rigby <jcrigby@gmail.com> Tune configuration, add support for (redundant) environment in NAND. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> CC: Fred Fan <fanyefeng@gmail.com> CC: Tom <Tom.Rix@windriver.com>
* mpc83xx: fix out-of-tree mpc8315 nand buildKim Phillips2010-03-02-0/+160
| | | | | | | | | | | | | | | | commit 2e95004deb6e33e33bf1b8a92a38cd2115bac4c2 "mpc83xx: Add NAND boot support for MPC8315E-RDB boards" symlinked nand_spl/board/freescale/mpc8315erdb to mpc8313erdb in order to not duplicate code. Since the main makefile builds nand_spl/board/$(BOARDDIR) (which makes sense), and the board Makefile and linker script are the only two necessary files to enable out-of-tree building, and other boards have duplicated nand makefiles (e.g. 8536ds & 8569mds), it only seems prudent to copy these two files in the name of the 8315 too. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: Wolfgang Denk <wd@denx.de>
* Nand boot: Add nand boot support for MPC8569mds boardLiu Yu2010-01-27-0/+208
| | | | | | This patch add nand boot support for MPC8569mds board. Signed-off-by: Liu Yu <yu.liu@freescale.com>
* ppc/85xx: Fix compiler warning in nand_spl/.../p1_p2_rdb/nand_boot.cKumar Gala2009-10-26-1/+1
| | | | | | | nand_boot.c: In function 'board_init_f': nand_boot.c:44: warning: 'sys_clk' may be used uninitialized in this function Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Fix building NAND_SPL out of treeKumar Gala2009-10-26-0/+12
| | | | | | | We need to source files to exist in the O=<FOO> nand_spl dir when we build out of tree. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/P1_P2_RDB: NAND Boot SupportDipen Dudhat2009-10-16-0/+224
| | | | | | | | | NAND Boot support for P1 and P2 series RDB platforms. This patch is derived from NAND Boot support on MPC8536DS. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2009-09-30-0/+210
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| * NAND boot: MPC8536DS supportMingkai Hu2009-09-30-0/+210
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC8536E can support booting from NAND flash which uses the image u-boot-nand.bin. This image contains two parts: a 4K NAND loader and a main U-Boot image. The former is appended to the latter to produce u-boot-nand.bin. The 4K NAND loader includes the corresponding nand_spl directory, along with the code twisted by CONFIG_NAND_SPL. The main U-Boot image just like a general U-Boot image except the parts that included by CONFIG_SYS_RAMBOOT. When power on, eLBC will automatically load from bank 0 the 4K NAND loader into the FCM buffer RAM where CPU can execute the boot code directly. In the first stage, the NAND loader copies itself to RAM or L2SRAM to free up the FCM buffer RAM, then loads the main image from NAND flash to RAM or L2SRAM and boot from it. This patch implements the NAND loader to load the main image into L2SRAM, so the main image can configure the RAM by using SPD EEPROM. In the first stage, the NAND loader copies itself to the second to last 4K address space, and uses the last 4K address space as the initial RAM for stack. Obviously, the size of L2SRAM shouldn't be less than the size of the image used. If so, the workaround is to generate another image that includes the code to configure the RAM by SPD and load it to L2SRAM first, then relocate the main image to RAM to boot up. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper caseStefan Roese2009-09-28-13/+13
|/ | | | | | | | | The latest PPC4xx register cleanup patch missed some SDRAM defines. This patch now changes lower case UIC defines to upper case. Also some names are changed to match the naming in the IBM/AMCC users manuals (e.g. mem_mcopt1 -> SDRAM0_CFG). Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Big cleanup of PPC4xx definesStefan Roese2009-09-11-2/+2
| | | | | | | | | | | | | | | | This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese <sr@denx.de>
* Fix all linker scripts for older binutils versions (pre-2.16)Wolfgang Denk2009-08-21-18/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f62fb99941c6 fixed handling of all rodata sections by using a wildcard combined with calls to ld's builtin functions SORT_BY_ALIGNMENT() and SORT_BY_NAME(). Unfortunately these functions were only introduced with biunutils version 2.16, so the modification broke building with all tool chains using older binutils. This patch makes it work again. This is done by omitting the use of these functions for such old tool chains. This will result in slightly larger target binaries, as the rodata sections are no longer in optimal order alignment-wise which reauls in unused gaps, but the effect was found to be insignificant - especially compared to the fact that you cannot build U-Boot at all in the current state. As ld seems to have no support for conditionals we run the linker script through the C preprocessor which can be easily used to remove the unwanted function calls. Note that the C preprocessor must be run with the "-ansi" (or a "-std=") option to make sure all the system-specific predefined macros outside the reserved namespace are suppressed. Otherise, cpp might for example substitute "powerpc" to "1", thus corrupting for example "OUTPUT_ARCH(powerpc)" etc. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Mike Frysinger <vapier@gentoo.org>
* ppc4xx: Canyonlands-NAND-boot: Support 2 Crucial 512MByte SODIMM'sStefan Roese2009-07-30-14/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Canyonlands boards are equipped with different SODIMM's. This is no problem with the "normal" NOR booting Canyonlands U-Boot, since it automatically detects the SODIMM's via SPD data and correctly configures them. But the NAND booting version is different. Here we only have 4k of image size to completely setup the hardware, including DDR2 setup. So we need to use a fixed DDR2 setup here. This doesn't work for different SODIMM's right now. Currently only this Crucial SODIMM is support: CT6464AC667.8FB (dual ranked) Now some boards are shipped with this SODIMM: CT6464AC667.4FE (single ranked) This patch now supports both SODIMM's by configuring first for the dual ranked DIMM. A quick shows, if this module is really installed. If this test fails, the DDR2 controller is re-configured for the single ranked SODIMM. Tested with those SODIMM's: CT6464AC667.8FB (dual ranked) CT6464AC667.4FE (single ranked) Signed-off-by: Stefan Roese <sr@denx.de>
* nand/ppc4xx: Move PPC4xx NAND driver to common NAND driver directoryStefan Roese2009-07-16-5/+5
| | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* MX31: Add NAND SPL boot support to i.MX31 PDK board.Magnus Lilja2009-07-06-0/+91
| | | | Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
* Fix e-mail address of Gary Jennejohn.Detlev Zundel2009-05-15-1/+1
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-20-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
* SIMPC8313 board: fix out of tree building.Wolfgang Denk2009-03-09-9/+18
| | | | | | | | | Fix typo in makefile which broke out of tree builds. Also use expolicit "rm" instead of "ln -sf" which is known to be unreliable. Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc83xx: fix undefined reference to `flush_cache' error in simpc8313 buildKim Phillips2009-01-28-1/+5
| | | | | | | | | | | | | | extend commit c70564e6b1bd08f3230182392238907f3531a87e "NAND: Fix cache and memory inconsistency issue" to add the cache.o dependency to the simpc8313 build and fix this: ...Large Page NAND...Configuring for SIMPC8313 board... nand_boot_fsl_elbc.o: In function `nand_boot': nand_spl/board/sheldon/simpc8313/nand_boot_fsl_elbc.c:150: undefined reference to `flush_cache' make[1]: *** [/home/r1aaha/git/u-boot-mpc83xx/nand_spl/u-boot-spl] Error 1 make: *** [nand_spl] Error 2 Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Merge branch 'next'Kim Phillips2009-01-23-0/+152
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| * mpc83xx: New board support for SIMPC8313Ron Madrid2009-01-23-0/+152
| | | | | | | | | | | | | | | | | | | | | | This patch will create a new board, SIMPC8313, from Sheldon Instruments. This board boots from NAND devices and is configureable for either large or small page devices. The board supports non-soldered DDR2, one ethernet port, a Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected to the eLBC providing glue logic to a TMS320C67xx DSP. Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | NAND: Fix cache and memory inconsistency issueDave Liu2009-01-23-1/+5
|/ | | | | | | | | | | | | | | | | | We load the secondary stage u-boot image from NAND to system memory by nand_load, but we did not flush d-cache to memory, nor invalidate i-cache before we jump to RAM. When the system has cache enabled and the TLB/page attribute of system memory is cacheable, it will cause issues. - 83xx family is using the d-cache lock, so all of d-cache access is cache-inhibited. so you can't see the issue. - 85xx family is using d-cache, i-cache enable, partial cache lock. you will see the issue. This patch fixes the cache issue. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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