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* nand_spl: remove MPC8315ERDB_NAND supportMasahiro Yamada2014-06-05-110/+0
| | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* nand_spl: remove MPC8536DS supportMasahiro Yamada2014-06-05-158/+0
| | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* nand_spl: remove MPC8569MDS_NAND supportMasahiro Yamada2014-06-05-151/+0
| | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* nand_spl: remove MPC8572DS_NAND supportMasahiro Yamada2014-06-05-158/+0
| | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* nand_spl: remove P1023RDS_NAND supportMasahiro Yamada2014-06-05-183/+0
| | | | | | | Commit 3d5a335c announced that all the nand_spl boards would be removed before v2014.07 release. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPLPrabhakar Kushwaha2014-05-16-173/+0
| | | | | | | | | | | | | | | | | | | | | | In the earlier patches, the SPL/TPL fraamework was introduced. For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The SPL was loaded by the code from the internal on-chip ROM. The SPL initializes the DDR according to the SPD and loads the final uboot image into DDR, then jump to the DDR to begin execution. For NAND booting way, the nand SPL has size limitation on some board(e.g. P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD and loads the final uboot image into DDR,then jump to the DDR to begin execution. This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL. Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to execute, so the section .resetvec is no longer needed. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* PPC: 85xx: Remove IVOR resetAlexander Graf2014-04-22-25/+5
| | | | | | | | | | | There is no need to set IVORs to anything but their default values, so let's leave them where they are. Suggested-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Scott Wood <scottwood@freescale.com> [York Sun: Add back $(obj)start.S section in mpc8572ds/Makefile] Reviewed-by: York Sun <yorksun@freescale.com>
* kbuild: rename OBJTREE to objtreeMasahiro Yamada2014-03-12-6/+6
| | | | | | | | | | | Prior to Kbuild, $(OBJTREE) was used for pointing to the top of build directory with absolute path. In Kbuild style, $(objtree) is used instead. This commit renames OBJTREE to objtree and delete the defition of OBJTREE. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* kbuild: rename SRCTREE to srctreeMasahiro Yamada2014-03-12-69/+69
| | | | | | | | | | | | | | | Prior to Kbuild, $(TOPDIR) or $(SRCTREE) was used for pointing to the top of source directory. (No difference between the two.) In Kbuild style, $(srctree) is used for instead. This commit renames SRCTREE to srctree and deletes the defition of SRCTREE. Note that SRCTREE in scripts/kernel-doc, scripts/docproc.c, doc/DocBook/Makefile should be keep. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* kbuild: rename TOPDIR to stctreeMasahiro Yamada2014-03-12-6/+6
| | | | | | | | | | | | Prior to Kbuild, $(TOPDIR) or $(SRCTREE) was used for pointing to the top of source directory. (No difference between the two.) In Kbuild style, $(srctree) is used instead. This commit renames TOPDIR to srctree and delete the defition of TOPDIR. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* kbuild: rename OBJCFLAGS to OBJCOPYFLAGSMasahiro Yamada2014-02-25-12/+12
| | | | | | | Rename OBJCFLAGS to OBJCOPYFLAGS beforehand to use "cmd_objcopy" in scripts/Makefile.lib in an upcoming commit. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* kbuild: use Linux Kernel build scriptsMasahiro Yamada2014-02-19-24/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now we are ready to switch over to real Kbuild. This commit disables temporary scripts: scripts/{Makefile.build.tmp, Makefile.host.tmp} and enables real Kbuild scripts: scripts/{Makefile.build,Makefile.host,Makefile.lib}. This switch is triggered by the line in scripts/Kbuild.include -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj We need to adjust some build scripts for U-Boot. But smaller amount of modification is preferable. Additionally, we need to fix compiler flags which are locally added or removed. In Kbuild, it is not allowed to change CFLAGS locally. Instead, ccflags-y, asflags-y, cppflags-y, CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o are prepared for that purpose. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Gerhard Sittig <gsi@denx.de>
* kbuild: change out-of-tree buildMasahiro Yamada2014-02-19-159/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit changes the working directory where the build process occurs. Before this commit, build process occurred under the source tree for both in-tree and out-of-tree build. That's why we needed to add $(obj) prefix to all generated files in makefiles like follows: $(obj)u-boot.bin: $(obj)u-boot Here, $(obj) is empty for in-tree build, whereas it points to the output directory for out-of-tree build. And our old build system changes the current working directory with "make -C <sub-dir>" syntax when descending into the sub-directories. On the other hand, Kbuild uses a different idea to handle out-of-tree build and directory descending. The build process of Kbuild always occurs under the output tree. When "O=dir/to/store/output/files" is given, the build system changes the current working directory to that directory and restarts the make. Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=<sub-dir>" syntax for descending into sub-directories. (We can write it like "make $(obj)=<sub-dir>" with a shorthand.) This means the current working directory is always the top of the output directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Gerhard Sittig <gsi@denx.de>
* nand-spl: Use scripts/Makefile.buildMasahiro Yamada2014-02-19-60/+1
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-12-02-4/+5
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| * Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xxYork Sun2013-11-25-1/+2
| | | | | | | | | | | | | | Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3 structure for 83xx, 85xx and 86xx. Signed-off-by: York Sun <yorksun@freescale.com>
| * Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun2013-11-25-4/+4
| | | | | | | | | | | | | | Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
* | nand_spl: trivial refactoring of makefilesMasahiro Yamada2013-11-25-175/+151
|/ | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-199/+12
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* board/p1010rdb:Add NAND boot support using new SPL formatPrabhakar Kushwaha2013-06-20-281/+0
| | | | | | | | | | - defines constants - Add spl_minimal.c to initialise DDR - update TLB entries as per NAND boot - remove nand_spl support for P1010RDB Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* nand: mxc: Switch NAND SPL to generic SPLBenoît Thébaudeau2013-04-12-150/+0
| | | | | | | | | This also fixes support for mx31pdk and tx25, which had been broken by commit e05e5de7fae5bec79617e113916dac6631251156. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-03-18-43/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Albert's rework of the linker scripts conflicted with Simon's making everyone use __bss_end. We also had a minor conflict over README.scrapyard being added to in mainline and enhanced in u-boot-arm/master with proper formatting. Conflicts: arch/arm/cpu/ixp/u-boot.lds arch/arm/cpu/u-boot.lds arch/arm/lib/Makefile board/actux1/u-boot.lds board/actux2/u-boot.lds board/actux3/u-boot.lds board/dvlhost/u-boot.lds board/freescale/mx31ads/u-boot.lds doc/README.scrapyard include/configs/tegra-common.h Build tested for all of ARM and run-time tested on am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
| * Refactor linker-generated arraysAlbert ARIBAUD2013-03-12-43/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor linker-generated array code so that symbols which were previously linker-generated are now compiler- generated. This causes relocation records of type R_ARM_ABS32 to become R_ARM_RELATIVE, which makes code which uses LGA able to run before relocation as well as after. Note: this affects more than ARM targets, as linker- lists span possibly all target architectures, notably PowerPC. Conflicts: arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds arch/arm/cpu/armv7/omap-common/u-boot-spl.lds board/ait/cam_enc_4xx/u-boot-spl.lds board/davinci/da8xxevm/u-boot-spl-da850evm.lds board/davinci/da8xxevm/u-boot-spl-hawk.lds board/vpac270/u-boot-spl.lds Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | Replace __bss_end__ with __bss_endSimon Glass2013-03-15-3/+3
|/ | | | | | | | | | | | | Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge remote-tracking branch 'mpc83xx/next'Kim Phillips2013-01-16-166/+3
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| * powerpc/mpc83xx: convert MPC8313ERDB to new-SPLScott Wood2012-12-19-163/+0
| | | | | | | | | | | | | | This converts MPC8313ERDB NAND boot to use the new SPL infrastructure. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * powerpc/mpc83xx: add support for new SPLScott Wood2012-12-19-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | This adds arch support for PPC mpc83xx to boot "minimal" (4K) SPLs using the new infrastructure. Existing nand_spl targets are updated to deal with the name change from nand_init.c to spl_minimal.c (as in theory this isn't limited to NAND anymore). Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | arm: move C runtime setup code in crt0.SAlbert ARIBAUD2013-01-08-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move all the C runtime setup code from every start.S in arch/arm into arch/arm/lib/crt0.S. This covers the code sequence from setting up the initial stack to calling into board_init_r(). Also, rewrite the C runtime setup and make functions board_init_*() and relocate_code() behave according to normal C semantics (no jumping across the C stack any more, etc). Some SPL targets had to be touched because they use start.S explicitly or for some reason; the relevant maintainers and custodians are cc:ed. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | Merge branch 'master' of git://git.denx.de/u-boot into resolveMinkyu Kang2012-12-10-367/+48
|\ \ | |/ | | | | | | | | | | | | | | | | | | Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| * 8xxx: Change all 8*xx_DDR addresses to 8xxxAndy Fleming2012-11-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were a number of shared files that were using CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and several variants (DDR2, DDR3). A recent patchset added 85xx-specific ones to code which was used by 86xx systems. After reviewing places where these constants were used, and noting that the type definitions of the pointers assigned to point to those addresses were the same, the cleanest approach to fixing this problem was to unify the namespace for the 85xx, 83xx, and 86xx DDR address definitions. This patch does: s/CONFIG_SYS_MPC8.xx_DDR/CONFIG_SYS_MPC8xxx_DDR/g All 85xx, 86xx, and 83xx have been built with this change. Signed-off-by: Andy Fleming <afleming@freescale.com> Tested-by: Andy Fleming <afleming@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
| * powerpc/mpc85xx/p1_p2_rdb_pc: convert from nand_spl to new splScott Wood2012-11-26-274/+0
| | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * spl/mpc85xx: rename cpu_init_nand.c to spl_minimal.cScott Wood2012-11-26-28/+28
| | | | | | | | | | | | | | There is nothing really NAND-specific about this file. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * spl/mpc85xx: move udelay to cpu codeScott Wood2012-11-26-55/+3
| | | | | | | | | | | | | | | | | | It applies to non-Freescale 85xx boards as well as Freescale boards, so it doesn't belong in board/freescale. Plus, it needs to come out of nand_spl if it's to be used by the new SPL. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc8xxx: move LAW code into arch/powerpc/cpu/mpc8xxxScott Wood2012-11-26-7/+7
| | | | | | | | | | | | | | | | | | | | | | It's arch code and not a driver, so move it where it belongs. When it originally went into drivers/misc there was no 8xxx CPU directory. This will make new-SPL support a little easier since we can keep the CPU stuff together and not need to pull stuff in from drivers/misc. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * nand_spl: fix u-boot.lst breakageScott Wood2012-11-14-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | Commit 97b24d3d51a92cb8c0c1e1a74abf22fe1a1807a3 "common: Add symbol handling for generic lists into Makefile" introduced build errors in many nand_spl targets, complaining of a missing u-boot.lst. When not doing an out-of-tree build, $(obj) expands to nothing, so GCC ended up being given -I with no argument (or rather, -ansi was the argument). The failure didn't show up during a -j1 build because it was picking up the non-SPL version of u-boot.lst. Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge git://git.denx.de/u-bootStefano Babic2012-11-10-19/+61
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| * common: Discard the __u_boot_cmd sectionMarek Vasut2012-10-22-3/+0
| | | | | | | | | | | | | | | | | | | | | | The command declaration now uses the new LG-array method to generate list of commands. Thus the __u_boot_cmd section is now superseded and redundant and therefore can be removed. Also, remove externed symbols associated with this section from include/command.h . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
| * common: Add .u_boot_list into all linker filesMarek Vasut2012-10-22-0/+5
| | | | | | | | | | | | | | | | | | | | Add section for the linker-generated lists into all possible linker files, so that everyone can easily use these lists. This is mostly a mechanical adjustment. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
| * common: Add symbol handling for generic lists into MakefileMarek Vasut2012-10-22-16/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds essential components for generation of the contents of the linker section that is used by the linker-generated array. All of the contents is held in a separate file, u-boot.lst, which is generated at runtime just before U-Boot is linked. The purpose of this code is to especially generate the appropriate boundary symbols around each subsection in the section carrying the linker-generated arrays. Obviously, the interim linker code for actual placement of the variables into the section is generated too. The generated file, u-boot.lst, is included into u-boot.lds via the linker INCLUDE directive in u-boot.lds . Adjustments are made in the Makefile and spl/Makefile so that the u-boot.lds and u-boot-spl.lds depend on their respective .lst files. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Joe Hershberger <joe.hershberger@ni.com>
* | ARM: Fix start.S when used with SPL in arm1136Stefano Babic2012-10-26-0/+2
|/ | | | | | | | This patch modifies start.S for the arm1136 to make it conform to start.S in armv7 architecture, to make it usable if the SPL framework is used. Signed-off-by: Stefano Babic <sbabic@denx.de>
* nand_spl: change out_be32 to raw_writel and depend on subsequent syncMatthew McClintock2012-08-23-73/+71
| | | | | | | | | | | | | This change reduces the SPL size by removing the redundant syncs produced by out_be32 and just replies on one final sync Done with: sed -r '/in_be32/b; s/(out_be32)\(([^,]*),\s+(.*)\)/__raw_writel(\3, \2)/g' -i `git grep --name-only sdram_init nand_spl/` Signed-off-by: Matthew McClintock <msm@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* nand_spl: p1023rds: wait before enabling DDR controllerMatthew McClintock2012-08-23-5/+20
| | | | | | | | We have a requirement to wait a period of time before enabling the DDR controller Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* nand_spl: update udelay for Freescale boardsMatthew McClintock2012-08-23-15/+60
| | | | | | | | | | | | | | Let's use the more appropriate udelay for the nand_spl. While we can't make use of u-boot's full udelay we can atl east use a for loop that won't get optimized away .Since we have the bus clock we can use the timebase to calculate wall time. Looked at reusing the u-boot udelay functions but it pulls in a lot of code and would require quite a bit of work to keep us within the very small space constrains we currently have Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/p1010rdb: nandboot: compare SVR properlyMatthew McClintock2012-08-23-1/+2
| | | | | | | | | | | | | | | | We were not comparing the SVRs properly previously. This comparison will properly shift the SVR and mask off the E bit This fixes the boot output to show the correct DDR bus width: 512 MiB (DDR3, 16-bit, CL=5, ECC off) instead of 512 MiB (DDR3, 32-bit, CL=5, ECC off) Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* p1014rdb: set ddr bus width properly depending on SVRMatthew McClintock2012-08-23-0/+11
| | | | | | | | | | Currently, for NAND boot for the P1010/4RDB we hard code the DDR configuration. We can still dynamically set the DDR bus width in the nand spl so the P1010/4RDB boards can boot from the same u-boot image Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-04-0/+542
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
| * powerpc/85xx: Add NAND/NAND_SPL support to P1010RDBDipen Dudhat2011-09-29-0/+271
| | | | | | | | | | | | | | | | | | And various defines to enable NAND support and NAND spl code for the P1010RDB platform. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support for new P102x/P2020 RDB style boardsLi Yang2011-09-29-0/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following boards share a common design but with minor variations between them: P1020MSBG-PC P1020RDB-PC P1020UTM-PC P1021RDB-PC P1024RDB P1025RDB P2020RDB-PC The P1020RDB-PC shares its roots in the existing P1020RDB board design, however uses DDR3 instead of DDR2. P2020RDB-PC differs from the P102x RDB-PC with 64-bit DDR and 100Mhz SYSCLK. Key features on these boards include: * DDR3 * NOR flash * NAND flash (on RDB's only) * SPI flash (on RDB's only) * SDHC/MMC card slot * VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB) * PCIE slot and mini-PCIE slots As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM is used to store SPD data. In case of absent or corrupted SPD, falling back to timing data embedded in the source code will be used. Raw timing data is extracted from DDR chip datasheet. Different speeds of DDR are supported with this approach. ODT option is forced to fit this set of boards, again because they don't have regular DIMMs. CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet specification for writing timing. VSC firmware Address is defined by default in config file for eTSEC1. SD width is based off DIP switch. DIP switch is detected on the board by reading i2c bus and setting the appropriate mux values. Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC have pins multiplexing. QE function needs to be disabled to access Nor Flash and CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe" in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below 'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD. 'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Zhao Chenhui <b26998@freescale.com> Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: ramneek.mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Akhil Goyal <akhil.goyal@freescale.com>
* | MX31: mx31pdk: Remove nand_spl config.mk fileFabio Estevam2011-09-30-2/+1
|/ | | | | | | No need to have a config.mk to only store a single line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* replace CONFIG_PRELOADER with CONFIG_SPL_BUILDAneesh V2011-07-26-2/+2
| | | | | | replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD Signed-off-by: Aneesh V <aneesh@ti.com>
generated by cgit v1.1 at 2024-12-04 11:34:36 +0000