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* ARM: UniPhier: adjust device trees for business transferMasahiro Yamada2015-03-15-1/+1
| | | | | | | Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-03-05-1/+2
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| * rsa : Compile Modular Exponentiation files based on CONFIG_RSA_SOFTWARE_EXPgaurav rana2015-03-05-1/+2
| | | | | | | | | | | | | | | | | | | | Remove dependency of rsa_mod_exp from CONFIG_FIT_SIGNATURE. As rsa modular exponentiation is an independent module and can be invoked independently. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <yorksun@freescale.com>
* | lib/asm-offsets - make GD_RELOCADDR, GD_RELOC_OFF & GD_START_ADDR_SP ↵Alexey Brodkin2015-03-05-4/+0
|/ | | | | | | | | | | | | available for all architectures GD_RELOCADDR, GD_RELOC_OFF & GD_START_ADDR_SP are generic members of global data structure so why don't we allow architectures other than ARM to use it. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* usb: UniPhier: add UniPhier on-chip xHCI host driver supportMasahiro Yamada2015-03-01-0/+1
| | | | | | | Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
* crypto/fsl - Add progressive hashing support using hardware acceleration.gaurav rana2015-02-25-0/+36
| | | | | | | | | | | Currently only normal hashing is supported using hardware acceleration. Added support for progressive hashing using hardware. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <yorksun@freescale.com>
* fdtdec: Add compatible id and string for Intel Quark MRCBin Meng2015-02-06-0/+1
| | | | | | | | Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* rsa: Use checksum algorithms from struct hash_algoRuchika Gupta2015-01-29-21/+36
| | | | | | | | | | | | | | | Currently the hash functions used in RSA are called directly from the sha1 and sha256 libraries. Change the RSA checksum library to use the progressive hash API's registered with struct hash_algo. This will allow the checksum library to use the hardware accelerated progressive hash API's once available. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> CC: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Fixed build error in am335x_boneblack_vboot due to duplicate CONFIG_DM) Change-Id: Ic44279432f88d4e8594c6e94feb1cfcae2443a54
* lib/rsa: Add Kconfig for devices supporting RSA Modular ExponentiationRuchika Gupta2015-01-29-6/+28
| | | | | | | | | | | | | | | | | | | Kconfig option added for devices which support RSA Verification. 1. RSA_SOFTWARE_EXP Enables driver for supporting RSA Modular Exponentiation in Software 2. RSA_FREESCALE_EXP Enables driver for supporting RSA Modular Exponentiation using Freescale specific driver The above drivers use RSA uclass Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> CC: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Removed duplicate line in Kconfig comment) Change-Id: I7663c4d5350e2bfc3dfa2696f70ef777d6ccc6f6
* lib/rsa: Modify rsa to use DM driverRuchika Gupta2015-01-29-0/+14
| | | | | | | | | | | | | Modify rsa_verify to use the rsa driver of DM library .The tools will continue to use the same RSA sw library. CONFIG_RSA is now dependent on CONFIG_DM. All configurations which enable FIT based signatures have been modified to enable CONFIG_DM by default. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> CC: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* FIT: Modify option FIT_SIGNATURE in KconfigRuchika Gupta2015-01-29-0/+7
| | | | | | | | | | For FIT signature based approach to work, RSA library needs to be selected. The FIT_SIGNATURE option in Kconfig is modified to automatically select RSA. Selecting RSA compiles the RSA library required for image verification. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> CC: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* rsa: Split the rsa-verify to separate the modular exponentiationRuchika Gupta2015-01-29-275/+359
| | | | | | | | | | | | | | | | | | | | | | Public exponentiation which is required in rsa verify functionality is tightly integrated with verification code in rsa_verify.c. The patch splits the file into twp separating the modular exponentiation. 1. rsa-verify.c - The file parses device tree keys node to fill a keyprop structure. The keyprop structure can then be converted to implementation specific format. (struct rsa_pub_key for sw implementation) - The parsed device tree node is then passed to a generic rsa_mod_exp function. 2. rsa-mod-exp.c Move the software specific functions related to modular exponentiation from rsa-verify.c to this file. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> CC: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* dm: exynos: Drop unused COMPAT features for SPISimon Glass2015-01-29-1/+0
| | | | | | | This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* dm: tegra: Drop unused COMPAT features for I2C, SPISimon Glass2015-01-29-6/+0
| | | | | | These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Drop gpio.h header from fdtdec.cSimon Glass2015-01-29-2/+0
| | | | | | | Since GPIO support has now moved to the driver model uclass, we can drop this include. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: fdt: Remove the old GPIO functionsSimon Glass2015-01-29-95/+0
| | | | | | | Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: fdt: Add a function to decode phandles with argumentsSimon Glass2015-01-29-0/+124
| | | | | | | | | | | For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: dts: Add compatible string for Intel ICH9 SPI controllerSimon Glass2015-01-23-0/+1
| | | | | | | Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* lzo: Update dst_len even on errorSimon Glass2015-01-14-1/+3
| | | | | | | This allows the caller to easily detect how much of the destination buffer has been used. Signed-off-by: Simon Glass <sjg@chromium.org>
* gunzip: Update lenp even on errorSimon Glass2015-01-14-3/+4
| | | | | | | This allows the caller to easily detect how much of the destination buffer has been used. Signed-off-by: Simon Glass <sjg@chromium.org>
* bzlib: Update destLen even on errorSimon Glass2015-01-14-1/+1
| | | | | | | This allows the caller to easily detect how much of the destination buffer has been used. Signed-off-by: Simon Glass <sjg@chromium.org>
* lzma: fix buffer bound check error furtherSimon Glass2015-01-14-2/+2
| | | | | | | | | | | | | | | | | | | | | | Commit 4d3b8a0d fixed a problem with lzma decompress where it would run out of bytes to decompress. The algorithm needs to know how many uncompressed bytes it is expected to produce. However, the fix introduced a potential buffer overrun, and causes the compression test to fail (test_compression command in sandbox). The correct fix seems to be to use the minimum of the expected number of uncompressed bytes and the amount of output space available. That way things work normally when there is enough space, and return an error (without overrunning available space) when there is not. Signed-off-by: Antonios Vamporakis <ant@area128.com> CC: Kees Cook <keescook@chromium.org> CC: Simon Glass <sjg@chromium.org> CC: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> CC: Luka Perkov <luka@openwrt.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Add several apis to decode pci device nodeBin Meng2015-01-13-14/+157
| | | | | | | | | | | | | | This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error)
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-01-01-0/+5
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| * pci: tegra: Add Tegra PCIe driverThierry Reding2014-12-18-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Implement XUSB pad controllerThierry Reding2014-12-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * power: Add AMS AS3722 PMIC supportThierry Reding2014-12-18-0/+1
| | | | | | | | | | | | | | | | | | The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | initcall: add explicit hint if initcall was relocatedAlexey Brodkin2014-12-29-1/+5
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit "initcall: Improve debugging support" makes sense and indeed simplifies process of matching initcalls executed with static disassembly. Until you are debugging relocation functionality. Existign output may make you think that at some point execution somehow returned back to non-relocated area. And there're many reasons/problems that may provoke this behavior. In order to make things clear let's add explicit mention in case initall was actually relocated like this: --->--- initcall: 810015f8 Relocation Offset is: 0efcf000 Relocating to 8ffcf000, new gd at 8fdced3c, sp at 8fdced20 initcall: 810015b8 initcall: 8ffd093c initcall: 8ffd0a14 initcall: 81001940 (relocated to 8ffd0940) initcall: 81001958 (relocated to 8ffd0958) --->--- Note "unexpected" jump from 0x8f... area to 0x81... area. Without explanation this raises many questions: execution jumped in relocated area right as expected and then for some reason returned back? But I hope comment in brackets will save some time for those curious developers who are careful enough to catch "unexpected jump to pre-reloc area" or those unlucky ones who'll have to deal with relocation debugging. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com>
* x86: Clean up asm-offsetsBin Meng2014-12-13-3/+0
| | | | | | | | | Move GD_BIST from lib/asm-offsets.c to arch/x86/lib/asm-offsets.c as it is x86 arch specific stuff. Also remove GENERATED_GD_RELOC_OFF which is not referenced anymore. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* lib: errno: introduce errno_str(): returns errno related messagePrzemyslaw Marczak2014-12-11-0/+148
| | | | | | | | | | | | | | | | | | | | | | | The functions error's numbers are standarized - but the error messages are not. The errors are often handled with unclear error messages, so why not use an errno standarized messages. Advantages: - This could decrease the binary size. - Appended with a detailed information, the error message will be clear. This commit introduces new function: - const char *errno_to_str(int errno) The functions returns a pointer to the errno corresponding text message: - if errno is null or positive number - a pointer to "Success" message - if errno is negative - a pointer to errno related message Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Tom Rini <trini@ti.com>
* lib: string: move strlcpy() to a common placeMasahiro Yamada2014-12-11-0/+25
| | | | | | | | | Move strlcpy() definition from drivers/usb/gadget/ether.c to lib/string.c because it is a very useful function. Let's add the prototype to include/linux/string.h too. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* libfdt: move CONFIG_OF_LIBFDT and CONFIG_FIT to lib/MakefileMasahiro Yamada2014-12-08-5/+3
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* libfdt: descend from lib/ to lib/libfdt/Masahiro Yamada2014-12-08-0/+1
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* lib: bzip2: move bzip2 files to lib/bzip2/ directoryMasahiro Yamada2014-12-08-5/+3
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Replace <compiler.h> with <linux/compiler.h>Masahiro Yamada2014-12-08-1/+1
| | | | | | Including <linux/compiler.h> is enough for general use. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Merge git://git.denx.de/u-boot-fdtTom Rini2014-12-01-15/+0
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| * fdt: remove fdtdec_get_alias_node() functionMasahiro Yamada2014-11-27-15/+0
| | | | | | | | | | | | | | | | | | | | The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-x86Tom Rini2014-12-01-0/+3
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| * x86: Add initial video device init for Intel GMASimon Glass2014-11-25-0/+1
| | | | | | | | | | | | | | | | | | Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Add init for model 206AX CPUSimon Glass2014-11-25-0/+1
| | | | | | | | | | | | Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: ivybridge: Add SATA initSimon Glass2014-11-25-0/+1
| | | | | | | | | | | | Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-fdtTom Rini2014-11-26-7/+81
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| * fdt: Add a function to decode a named memory regionSimon Glass2014-11-21-0/+61
| | | | | | | | | | | | | | | | Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
| * fdt: Enhance flashmap function to deal with region propertiesSimon Glass2014-11-21-0/+8
| | | | | | | | | | | | | | | | | | Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com>
| * fdt: Use the correct return types for fdtdec_decode_region()Simon Glass2014-11-21-7/+12
| | | | | | | | | | | | | | | | Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2014-11-24-3/+3
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: drivers/serial/serial-uclass.c Signed-off-by: Tom Rini <trini@ti.com>
| * | dm: fdt: Correct handling of aliases with embedded digitsSimon Glass2014-11-22-3/+3
| |/ | | | | | | | | | | | | | | | | | | Since we scan from left to right looking for the first digit, "i2c0" returns 2 instead of 0 for the alias number. Adjust the code to scan from right to left instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@ti.com>
* | Merge git://git.denx.de/u-boot-x86Tom Rini2014-11-24-0/+25
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: arch/x86/cpu/Makefile Signed-off-by: Tom Rini <trini@ti.com>
| * | x86: ivybridge: Implement SDRAM initSimon Glass2014-11-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: ivybridge: Perform Intel microcode update on bootSimon Glass2014-11-21-0/+1
| | | | | | | | | | | | | | | | | | | | | Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-18 20:07:48 +0000