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* x86: dts: Drop memory SPD compatible stringSimon Glass2016-03-17-1/+0
| | | | | | | | This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Drop all the old pin configuration codeSimon Glass2016-03-17-1/+0
| | | | | | | | We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: fdtdec: Correct a sandbox build warningSimon Glass2016-03-14-2/+3
| | | | | | | Adjust the cast to avoid a warning when stdint.h is used. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* tegra: nyan-big: Move the LCD driver to driver modelSimon Glass2016-02-16-1/+0
| | | | | | | | | | Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* fdt: introduce fdtdec_get_child_countPeng Fan2016-02-06-0/+11
| | | | | | | | | Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Drop the irq router compatible stringSimon Glass2016-01-24-1/+0
| | | | | | | We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: video: sandbox: Convert sandbox to use driver model for videoSimon Glass2016-01-20-1/+0
| | | | | | | | Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-01-14-0/+1
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| * fdtdec: Add compatible string for Intel IvyBridge FSPBin Meng2016-01-13-0/+1
| | | | | | | | | | | | | | | | Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | dm: serial: Convert ns16550 driver to use driver model PCI APISimon Glass2016-01-12-52/+5
|/ | | | | | | | | | | | | | | | | Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* arm: socfpga: Allow DWC2 UDC probing from OFMarek Vasut2015-12-20-0/+1
| | | | | | | | | | | | The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
* dm: tegra: pci: Convert tegra boards to driver model for PCISimon Glass2015-12-01-4/+0
| | | | | | | | | Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* dm: tegra: Convert keyboard driver to driver modelSimon Glass2015-11-19-1/+0
| | | | | | | | Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* pci: tegra: add/enable support for Tegra210Stephen Warren2015-11-12-0/+1
| | | | | | | | | This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* dm: spl: Support device tree when BSS is in a different sectionSimon Glass2015-11-04-2/+5
| | | | | | | | | | | | | | | | At present in SPL we place the device tree immediately after BSS. This avoids needing to copy it out of the way before BSS can be used. However on some boards BSS is not placed with the image - e.g. it can be in RAM if available. Add an option to tell U-Boot that the device tree should be placed at the end of the image binary (_image_binary_end) instead of at the end of BSS. Note: A common reason to place BSS in RAM is to support the FAT filesystem. We should update the code so that it does not use so much BSS. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fdt: Add a function to look up a /chosen propertySimon Glass2015-11-04-5/+10
| | | | | | | | It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BITStephen Warren2015-10-23-7/+7
| | | | | | | | | | | | | | | | PCI addresses are always represented as 3 cells in DT. (one cell for bus and device, and two cells for a 64-bit addres). This does not vary based on either the physical address size of the CPU, nor any #address-cells property in DT (or more precisely, #address-cells must be set to 3 in any PCIe controller's node). Fix fdtdec_get_pci_addr() to use conversion functions that operate on (fixed) cell-sized data rather than (varying) physical-address-sized data, so that the function works on 64-bit systems. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Thierry Reding <treding@nvidia.com>
* fdtdec: fix parsing 'reg' property with zero value in '#size-cells'Przemyslaw Marczak2015-10-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After rework of lib/fdtdec.c by: commit: 02464e3 fdt: add new fdt address parsing functions the function fdtdec_get_addr() doesn't work as previous, because the implementation assumes that properties '#address-cells' and '#size-cells' are equal to 1, which can be not true sometimes. The new API introduced fdtdec_get_addr_size_auto_parent() for the 'reg' property parsing, but the implementation assumes, that #size-cells can't be less than 1. This causes that the following children's 'reg' property can't be reached: parent@0x0 { #address-cells = <1>; #size-cells = <0>; children@0x100 { reg = < 0x100 >; }; }; Change the condition value from '1' to '0', which allows parsing property with at least zero #size-cells, fixes the issue. Now, fdtdec_get_addr_size_auto_parent() works properly. Tested on: Odroid U3/X2, Trats, Trats2, Odroid XU3, Snow (by Simon). Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* fdt: fix fdtdec_get_addr_size not to require any size cellsStephen Warren2015-10-03-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fdtdec_get_addr_size() may be used in two cases: a) With sizep supplied, in which case both an address and a size are parsed from DT. In this case, the DT property must be large enough to contain both values. b) With sizep NULL, in which case only an address is parsed from DT. In this case, the DT property only need be large enough to contain this address value. Commit 02464e386bb5 "fdt: add new fdt address parsing functions" broke this relaxed checking, and required the DT property to contain both an address and a size value in all cases. Fix fdtdec_get_addr_size() to vary ns based on whether the size value is being parsed from the DT or not. This is safe since the function only parses the first entry in the property, so the overall value of (na + ns) need not be accurate, since it is never used to step through the property data to find other entries. Besides, this fixed behaviour essentially matches the original behaviour before the patch this patch fixes. (The original code validated that the property was exactly the length of either na or (na + ns), whereas the current code only validates that the property is at least that long. For non-failure cases, the two behaviours are identical). Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Thierry Reding <treding@nvidia.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Suchanek <hramrach@gmail.com> Fixes: 02464e386bb5 ("fdt: add new fdt address parsing functions") Reported-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* fdt: add new fdt address parsing functionsStephen Warren2015-09-15-21/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org>
* mmc: dw_mmc: Probe the MMC from OFMarek Vasut2015-09-04-0/+1
| | | | | | | | | | | | | Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
* dm: tpm: Convert I2C driver to driver modelSimon Glass2015-08-31-2/+0
| | | | | | | | | Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* fdtdec: Fix possible infinite loop in fdtdec_get_pci_vendev()Bin Meng2015-08-26-2/+1
| | | | | | | | When there is no valid compatible string in current list, we should advance to next one in the compatible string list. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* Revert "fdt: Fix fdtdec_get_addr_size() for 64-bit"Simon Glass2015-08-14-36/+20
| | | | | | | | | | | | | | | | This reverts commit 5b34436035fc862b5e8d0d2c3eab74ba36f1a7f4. This function has a few problems. It calls fdt_parent_offset() which as mentioned in code review is very slow. https://patchwork.ozlabs.org/patch/499482/ https://patchwork.ozlabs.org/patch/452604/ It also happens to break SPI flash on Minnowboard max which is how I noticed that this was applied. I can send a patch to tidy that up, but in any case I think we should consider a revert until the function is better implemented. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: baytrail: Configure FSP UPD from device treeAndrew Bradford2015-08-14-0/+2
| | | | | | | | | | | | | | | | | Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: socfpga: misc: Reset ethernet from OFMarek Vasut2015-08-08-0/+1
| | | | | | | | | | | Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* dts: Drop unused compatible ID for the NXP video bridgeSimon Glass2015-08-05-1/+0
| | | | | | This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: Remove the old parade driverSimon Glass2015-08-05-1/+0
| | | | | | | We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org>
* power: Remove old TPS65090 driversSimon Glass2015-08-05-1/+0
| | | | | | | Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* lib: fdt: fix indent of #ifdef..#endif conditionalMasahiro Yamada2015-08-05-1/+1
| | | | | | | | Match the depth of indentation between #ifdef and #endif for better readability. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: Tegra210: Add support to common Tegra source/config filesTom Warren2015-07-28-0/+2
| | | | | | | | | | | Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* fdt: Fix fdtdec_get_addr_size() for 64-bitThierry Reding2015-07-28-20/+36
| | | | | | Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* fdt: Provide debug info when a device tree cannot be foundSimon Glass2015-07-21-0/+7
| | | | | | | It can be quite confusing with a new platform to figure out why the device tree cannot be located. Add some debug information for this case. Signed-off-by: Simon Glass <sjg@chromium.org>
* lib: Add function to extract a number from the end of a stringSimon Glass2015-07-21-8/+6
| | | | | | | Split out the code in fdtdec which finds a number at the end of a string. It can be useful in other situations. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: armv8: Fix build warnings on armv8Haikun Wang2015-07-20-2/+2
| | | | | | | | | | | | | | | | | | | Fix below build warnings on armv8, drivers/spi/fsl_dspi.c: In function ‘fsl_dspi_ofdata_to_platdata’: drivers/spi/fsl_dspi.c:667:2: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 2 has type ‘fdt_addr_t’ [-Wformat=] debug("DSPI: regs=0x%x, max-frequency=%d, endianess=%s, num-cs=%d\n", ^ lib/fdtdec.c: In function ‘fdtdec_get_addr_size’: lib/fdtdec.c:105:4: warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 3 has type ‘fdt_size_t’ [-Wformat=] debug("addr=%08lx, size=%08lx\n", ^ Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: usb: tegra: Drop legacy USB codeSimon Glass2015-06-10-3/+0
| | | | | | Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-04-0/+1
| | | | | | | | | Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Refactor PIRQ routing supportBin Meng2015-06-04-0/+1
| | | | | | | | | | | | PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* pmic: max77686 set the same compatible as in the kernelPrzemyslaw Marczak2015-05-14-1/+1
| | | | | | | This commit also updates the proper dts files. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* tpm: Rename Infineon TPM to slb9645ttSimon Glass2015-05-14-1/+1
| | | | | | This name is used in Linux, so use it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* tegra: video: Support serial output resource (SOR) on tegra124Simon Glass2015-05-13-0/+3
| | | | | | | | | The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* fdt: Add binding decode function for display-timingsSimon Glass2015-05-13-0/+92
| | | | | | | | This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* dm: usb: exynos: Drop legacy USB codeSimon Glass2015-05-06-2/+0
| | | | | | Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Rename setup_fdt() and make it prepare alsoSimon Glass2015-04-23-2/+2
| | | | | | | There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: sandbox: Move setup code from board_f to fdtdecSimon Glass2015-04-23-0/+31
| | | | | | | We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add a panic_str() function to reduce code sizeSimon Glass2015-04-23-3/+5
| | | | | | | | The printf() in panic() adds about 1.5KB of code size to SPL when compiled with Thumb-2. Provide a smaller version that does not support printf()-style arguments and use it in two commonly compiled places. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: exynos: Match up device tree with kernel versionSimon Glass2015-04-18-1/+0
| | | | | | | | | | | The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Drop LPC compatible string in fdtdecSimon Glass2015-04-18-1/+0
| | | | | | | This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: cros_ec: Drop compatible string in fdtdecSimon Glass2015-04-18-1/+0
| | | | | | This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
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