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* pci: tegra: Add Tegra PCIe driverThierry Reding2014-12-18-0/+3
| | | | | | | | | | | | | | | Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Implement XUSB pad controllerThierry Reding2014-12-18-0/+1
| | | | | | | | | | | | | | | This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* power: Add AMS AS3722 PMIC supportThierry Reding2014-12-18-0/+1
| | | | | | | | | The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge git://git.denx.de/u-boot-fdtTom Rini2014-12-01-15/+0
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| * fdt: remove fdtdec_get_alias_node() functionMasahiro Yamada2014-11-27-15/+0
| | | | | | | | | | | | | | | | | | | | The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-x86Tom Rini2014-12-01-0/+3
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| * x86: Add initial video device init for Intel GMASimon Glass2014-11-25-0/+1
| | | | | | | | | | | | | | | | | | Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: Add init for model 206AX CPUSimon Glass2014-11-25-0/+1
| | | | | | | | | | | | Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org>
| * x86: ivybridge: Add SATA initSimon Glass2014-11-25-0/+1
| | | | | | | | | | | | Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-fdtTom Rini2014-11-26-7/+81
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| * fdt: Add a function to decode a named memory regionSimon Glass2014-11-21-0/+61
| | | | | | | | | | | | | | | | Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
| * fdt: Enhance flashmap function to deal with region propertiesSimon Glass2014-11-21-0/+8
| | | | | | | | | | | | | | | | | | Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com>
| * fdt: Use the correct return types for fdtdec_decode_region()Simon Glass2014-11-21-7/+12
| | | | | | | | | | | | | | | | Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2014-11-24-3/+3
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: drivers/serial/serial-uclass.c Signed-off-by: Tom Rini <trini@ti.com>
| * | dm: fdt: Correct handling of aliases with embedded digitsSimon Glass2014-11-22-3/+3
| |/ | | | | | | | | | | | | | | | | | | Since we scan from left to right looking for the first digit, "i2c0" returns 2 instead of 0 for the alias number. Adjust the code to scan from right to left instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@ti.com>
* | x86: ivybridge: Implement SDRAM initSimon Glass2014-11-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: ivybridge: Perform Intel microcode update on bootSimon Glass2014-11-21-0/+1
| | | | | | | | | | | | | | Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org>
* | fdt: Add a function to decode a variable-sized u32 arraySimon Glass2014-11-21-0/+20
|/ | | | | | | Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-x86Tom Rini2014-10-23-0/+1
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| * x86: dts: Add device tree compatible string for Intel IPCSimon Glass2014-10-22-0/+1
| | | | | | | | | | | | Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org>
* | fdt: Add a function to return PCI BDF tripletThierry Reding2014-10-22-0/+14
| | | | | | | | | | | | | | | | | | The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | fdt: Add resource parsing functionsThierry Reding2014-10-22-0/+57
|/ | | | | | | | | Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2014-09-13-0/+15
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| * dm: fdt: Add a function to look up a chosen nodeSimon Glass2014-09-10-0/+15
| | | | | | | | | | | | | | Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org>
* | video: Add driver for Parade PS8625 dP to LVDS bridgeVadim Bendebury2014-09-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | video: exynos_fimd: Add framework to disable FIMD sysmmuAjay Kumar2014-09-05-0/+1
|/ | | | | | | | | | | On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* fdt: Add a function to get the node offset of an aliasSimon Glass2014-07-23-0/+15
| | | | | | This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Add a function to get the alias sequence of a nodeSimon Glass2014-07-23-0/+46
| | | | | | | | | | | | | | | | | | | | Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org>
* lib, fdt: move fdtdec_get_int() out of lib/fdtdec.cHeiko Schocher2014-06-23-36/+0
| | | | | | | | | | | | | | | | | move fdtdec_get_int() out of lib/fdtdec.c into lib/fdtdec_common.c as this function is also used, if CONFIG_OF_CONTROL is not used. Poped up on the ids8313 board using signed FIT images, and activating CONFIG_SYS_GENERIC_BOARD. Without this patch it shows on boot: No valid FDT found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb> With this patch, it boots again with CONFIG_SYS_GENERIC_BOARD enabled. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com>
* exynos: Enable the LCD backlight for snowSimon Glass2014-05-28-0/+1
| | | | | | | | | The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* power: Add support for TPS65090 PMU chip.Tom Wai-Hong Tam2014-05-28-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMCJaehoon Chung2014-05-16-1/+1
| | | | | | | | Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'next'Tom Rini2014-04-17-0/+20
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| * tools, fit_check_sign: verify a signed fit imageHeiko Schocher2014-03-21-0/+20
| | | | | | | | | | | | | | | | add host tool "fit_check_sign" which verifies, if a fit image is signed correct. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org>
* | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-25-0/+26
|\ \ | |/ | | | | | | | | | | | | Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
| * sandbox: Add LCD driverSimon Glass2014-03-17-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * cros_ec: sandbox: Add Chrome OS EC emulationSimon Glass2014-03-17-0/+1
| | | | | | | | | | | | | | | | Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * cros_ec: Add a function for reading a flash map entrySimon Glass2014-03-17-0/+24
| | | | | | | | | | | | | | | | | | A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* | drivers:mmc:sdhci: enable support for DTPiotr Wilczek2014-03-12-0/+1
| | | | | | | | | | | | | | | | | | This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | video:mipidsim:fdt: Add DT support for mipi dsim driverPiotr Wilczek2014-03-12-0/+1
|/ | | | | | | | | This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* mmc: tegra: support Tegra124Stephen Warren2014-02-03-0/+1
| | | | | | | | | | | | | | | | | | | | | Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* sandbox: Correct data sizes and printf() strings in fdtdec.cSimon Glass2013-11-21-4/+4
| | | | | | | | | | There are a few wwrnings in this file when building for sandbox. Addresses coming from the device tree need to be treated as ulong as elsewhere in U-Boot and we must use map_sysmem() to convert to a pointer when needed. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
* exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCIVivek Gautam2013-10-20-0/+2
| | | | | | | | | | | | | Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-07-24-0/+1
|\ | | | | | | | | | | | | | | | | | | | | The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
| * fdtdec: Add compatible string for High speed i2cnaveen krishna chatradhi2013-07-23-0/+1
| | | | | | | | | | | | | | Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
|/ | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-0/+3
|\ | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114Jim Lin2013-07-11-0/+2
| | | | | | | | | | | | | | | | | | | | Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * EXYNOS5: FDT: Add compatible strings for SerialRajeshwari Shinde2013-06-24-0/+1
| | | | | | | | | | | | | | | | Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | cros: adds cros_ec keyboard driverHung-ying Tyan2013-06-26-0/+1
| | | | | | | | | | | | | | | | | | | | This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
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