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* armv8: ls1012a: Add support of ls1012afrdm boardPrabhakar Kushwaha2016-06-03-0/+44
| | | | | | | | | | | | | | QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance development platform, with a complete debugging environment. The LS1012AFRDM board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1012a: Add support of ls1012ardb boardPrabhakar Kushwaha2016-06-03-0/+107
| | | | | | | | | | | | | QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1012a: Add support of ls1012aqds boardPrabhakar Kushwaha2016-06-03-0/+336
| | | | | | | | | | | | | | QorIQ LS1012A Development System (LS1012AQDS) is a high-performance development platform, with a complete debugging environment. The LS1012AQDS board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: fsl-layerscape: Add support of QorIQ LS1012A SoCPrabhakar Kushwaha2016-06-03-1/+165
| | | | | | | | | | | | | | | | | | | | | The QorIQ LS1012A processor, optimized for battery-backed or USB-powered, integrates a single ARM Cortex-A53 core with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance. This patch add support of LS1012A SoC along with - Update platform & DDR clock read logic as per SVR - Define MMDC controller register set. - Update LUT base address for PCIe - Avoid L3 platform cache compilation - Update USB address, errata - SerDes table - Added CSU IDs for SDHC2, SAI-1 to SAI-4 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Makarand Pawagi <makarand.pawagi@mindspeed.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-31-60/+18
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| * mips: ath79: Use 8MB flash profile for mtd partition by defaultWills Wang2016-05-31-5/+5
| | | | | | | | | | | | Change bootm flash address and mtd partition table for 8MB flash profile. Signed-off-by: Wills Wang <wills.wang@live.com>
| * MIPS: Split I & D cache line size configPaul Burton2016-05-31-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: Move cache sizes to KconfigPaul Burton2016-05-31-49/+0
| | | | | | | | | | | | | | | | | | | | | | | | Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: Allow MIPS64 buildsPaul Burton2016-05-31-5/+13
| | | | | | | | | | | | | | | | Both real Malta boards & emulators that mimic Malta (eg. QEMU) can support MIPS64 CPUs. Allow MIPS64 builds of U-Boot for such boards, which enables the user to make use of the whole 64 bit address space. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-05-31-0/+2
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| * | arm: spear: x600: Add support for Micrel KSZ9031 PHYStefan Roese2016-05-31-0/+2
| |/ | | | | | | | | | | | | | | As the old ethernet PHY is not available any more, the x600 board has been redesigned with the Micrel KSZ9031 PHY. This patch adds support to autodetect the PHY and configure the Micrel PHY correctly. Signed-off-by: Stefan Roese <sr@denx.de>
* | Revert "image.h: Tighten up content using handy CONFIG_IS_ENABLED() macro."Masahiro Yamada2016-05-31-12/+57
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 56adbb38727320375b2f695bd04600d766d8a1b3. Since commit 56adbb387273 ("image.h: Tighten up content using handy CONFIG_IS_ENABLED() macro."), I found my boards fail to boot Linux because the commit changed the logic of macros it touched. Now, IMAGE_ENABLE_RAMDISK_HIGH and IMAGE_BOOT_GET_CMDLINE are 0 for all the boards. As you can see in include/linux/kconfig.h, CONFIG_IS_ENABLE() (and IS_ENABLED() as well) can only take a macro that is either defined as 1 or undefined. This is met for boolean options defined in Kconfig. On the other hand, CONFIG_SYS_BOOT_RAMDISK_HIGH and CONFIG_SYS_BOOT_GET_CMDLINE are defined without any value in arch/*/include/asm/config.h . This kind of clean-up is welcome, but the options should be moved to Kconfig beforehand. Moreover, CONFIG_IS_ENABLED(SPL_CRC32_SUPPORT) looks weird. It should be either CONFIG_IS_ENABLED(CRC32_SUPPORT) or IS_ENABLED(CONFIG_SPL_CRC32_SUPPORT). But, I see no define for CONFIG_SPL_CRC32_SUPPORT anywhere. Likewise for the other three. The logic of IMAGE_OF_BOARD_SETUP and IMAGE_OF_SYSTEM_SETUP were also changed for SPL. This can be a problem for boards defining CONFIG_SPL_OF_LIBFDT. I guess it should have been changed to IS_ENABLED(CONFIG_OF_BOARD_SETUP). In the first place, if we replace the references in C code, the macros IMAGE_* will go away. if (IS_ENABLED(CONFIG_OF_BOARD_SETUP) { ... } Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-05-27-80/+337
|\ | | | | | | | | | | | | | | | | | | | | | | | | For odroid-c2 (arch-meson) for now disable designware eth as meson now needs to do some harder GPIO work. Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: lib/efi_loader/efi_disk.c Modified: configs/odroid-c2_defconfig
| * dm: mmc: dwmmc: Support CONFIG_BLKSimon Glass2016-05-27-1/+6
| | | | | | | | | | | | Add support for using driver model for block devices in this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: efi: Update for CONFIG_BLKSimon Glass2016-05-27-1/+1
| | | | | | | | | | | | | | | | This code does not currently build with driver model enabled for block devices. Update it to correct this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alexander Graf <agraf@suse.de>
| * rockchip: Drop SPL GPIO support for rk3288Simon Glass2016-05-27-1/+0
| | | | | | | | | | | | This is not currently used and saves a little over 1KB of SPL image size. Signed-off-by: Simon Glass <sjg@chromium.org>
| * mmc: Drop dead mmc code for non-generic MMCSimon Glass2016-05-26-4/+0
| | | | | | | | | | | | | | All boards that use MMC define CONFIG_GENERIC_MMC now, so we can drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * mmc: Drop mmc_register()Simon Glass2016-05-26-1/+0
| | | | | | | | | | | | This function is no longer used. Signed-off-by: Simon Glass <sjg@chromium.org>
| * arm: rpi: Define CONFIG_TFTP_TSIZE to show tftp size infoSimon Glass2016-05-26-0/+1
| | | | | | | | | | | | | | | | This shows a proper progress display and the total amount of data transferred. Enable it for Raspberry Pi. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
| * Add a mailbox driver framework/uclassStephen Warren2016-05-26-0/+233
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A mailbox is a hardware mechanism for transferring small message and/or notifications between the CPU on which U-Boot runs and some other device such as an auxilliary CPU running firmware or a hardware module. This patch defines a standard API that connects mailbox clients to mailbox providers (drivers). Initially, DT is the only supported method for connecting the two. The DT binding specification (mailbox.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/mailbox/mailbox.txt. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Rename reset to sysresetStephen Warren2016-05-26-72/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The current reset API implements a method to reset the entire system. In the near future, I'd like to introduce code that implements the device tree reset bindings; i.e. the equivalent of the Linux kernel's reset API. This controls resets to individual HW blocks or external chips with reset signals. It doesn't make sense to merge the two APIs into one since they have different semantic purposes. Resolve the naming conflict by renaming the existing reset API to sysreset instead, so the new reset API can be called just reset. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: allow setting driver_data before/during bindStephen Warren2016-05-26-0/+24
| | | | | | | | | | | | | | | | | | | | | | This will allow a driver's bind function to use the driver data. One example is the Tegra186 GPIO driver, which instantiates child devices for each of its GPIO ports, yet supports two different HW instances each with a different set of ports, and identified by the udevice_id .data field. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | image.h: Tighten up content using handy CONFIG_IS_ENABLED() macro.Robert P. J. Day2016-05-27-57/+12
| | | | | | | | | | | | | | | | | | | | In order for CONFIG_IS_ENABLED(FOO) to work we need to move the changes that CONFIG_FIT_DISABLE_SHA256 makes to be prior to the evaluation by CONFIG_IS_ENABLED(foo) Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> [trini: Move CONFIG_FIT_DISABLE_SHA256 parts to fix build breakage] Signed-off-by: Tom Rini <trini@konsulko.com>
* | board: am335x: Allow to choose serial device dynamicallyLokesh Vutla2016-05-27-0/+4
| | | | | | | | | | | | | | | | Different AM335x based platforms have different serial consoles. As serial console is Kconfig option a separate defconfig has to be created for each platform. So pass the serial device dynamically. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | config: env: Set AM335x-ICEv2 board specific envLokesh Vutla2016-05-27-0/+9
| | | | | | | | | | | | | | Populate the right dtb file and console for AM335x-ICEv2 board. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: AM335x-ICEv2: Add cpsw supportLokesh Vutla2016-05-27-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to enable cpsw on AM335x ICEv2 board, the following needs to be done: 1)There are few on board jumper settings which gives a choice between cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting this, there are few GPIOs which control these muxes that needs to be held high. 2) The clock to PHY is provided by a PLL-based clock synthesizer[2] connected via I2C. This needs to properly programmed and locked for PHY operation. And PHY needs to be reset before before being used, which is also held by a GPIO. 3) RMII mode needs to be selected. [1] http://www.ti.com/lit/zip/tidr336 [2] http://www.ti.com/lit/ds/symlink/cdce913.pdf Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | configs: am335x_evm: Switch to env on FAT SD by defaultTom Rini2016-05-27-19/+21
| | | | | | | | | | | | | | | | Re-org env sections so that we can fall back to env is in FAT on SD card, for broader board compatibility Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: AM335x-evmsk: Add initial supportLokesh Vutla2016-05-27-0/+37
| | | | | | | | | | | | | | Add initial DTS support for AM335x-evm sk. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: AM43x-EPOS Initial SupportLokesh Vutla2016-05-27-0/+14
| | | | | | | | | | | | | | Add initial DTS support for AM43-EPOS evm. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Remove unused BOOTFLAG definitionsChris Packham2016-05-27-16/+0
| | | | | | | | | | | | | | | | This follows on from commit d98b052 ("powerpc: Cleanup BOOTFLAG_* references") and commit fc3d297 ("Drop bogus BOOTFLAG_* definitions"). Remove the definitions that have crept in since. Signed-off-by: Chris Packham <judge.packham@gmail.com>
* | spl: Allow to load a FIT containing U-Boot from FSLokesh Vutla2016-05-27-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | This provides a way to load a FIT containing U-Boot and a selection of device tree files from a File system. Making sure that all the reads and writes are aligned to their respective needs. Tested-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Make this still apply with Michal's alignment change for 'fit'] Signed-off-by: Tom Rini <trini@konsulko.com>
* | ti_omap5_common: Update SPL start address on secure partsDaniel Allred2016-05-27-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated the CONFIG_SPL_TEXT_BASE to support secure parts (moving the start address past secure reserved memory and the size of the security certificate that precedes the boot image on secure devices). Updated the related CONFIG_SPL_MAX_SIZE to properly reflect the internal memory actually available on the various device flavors (Common minimum internal RAM guaranteed for various flavors of DRA7xx/AM57xx is 512KB). Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ti: AM43xx: board: Detect AM43xx HS EVMMadan Srinivas2016-05-27-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds code to detect AM43xx HS EVMS - the string in the I2C EEPROM for HS EVMs differs from GP EVMs. Adds code to for evm detection, regardless of whether the evm is for GP or HS parts, and updates board init to use that. Modifies findfdt command to pick up am437x-gp-evm.dtb for the HS EVMs also, as the boards are similar except for some security specific changes around power supply and enclosure protection. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ti: AM43xx: Use CONFIG options from SOC KconfigMadan Srinivas2016-05-27-12/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates configs/am43xx_evm.h to use CONFIG options from SOC specific Kconfig file for various calculations. On AM43x devices, the address of SPL entry point depends on the device type, i.e. whether it is secure or non-secure. Further, for non-secure devices, the SPL entry point is different between USB HOST boot mode, other "memory" boot modes (MMC, NAND) and "peripheral" boot modes (UART, USB) To add to the complexity, on secure devices, in addition to the above differences, the SPL entry point can change because of the space occupied by other components (other than u-boot or spl) that go into a secure boot image. To prevent the user from having to modify source files every time any component of the secure image changes, the value of CONFIG_SPL_TEXT_BASE has been set using a Kconfig option that is supplied in the am43xx_*_defconfig files Using the CONFIG options also enables us to do away with some compile time flags that were used to specify CONFIG_SPL_TEXT_BASE for different boot modes. On QSPI devices, the same problem described above occurs w.r.t. the address of the u-boot entry point in flash, when booting secure devices. To handle this, CONFIG_SYS_TEXT_BASE is also setup via a Kconfig option and the defconfig files. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | arm: Kconfig: Add support for AM43xx SoC specific KconfigMadan Srinivas2016-05-27-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding support for AM43xx secure devices require the addition of some SOC specific config options like the amount of memory used by public ROM and the address of the entry point of u-boot or SPL, as seen by the ROM code, for the image to be built correctly. This mandates the addition of am AM43xx CONFIG option and the ARM Kconfig file has been modified to source this SOC Kconfig file. Moving the TARGET_AM43XX_EVM config option to the SOC KConfig and out of the arch/arm/Kconfig. Updating defconfigs to add the CONFIG_AM43XX=y statement and removing the #define CONFIG_AM43XX from the header file. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Tested-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Drop references to CONFIG_SYS_GENERIC_BOARD in config filesSimon Glass2016-05-27-7/+0
| | | | | | | | | | | | This option is no longer used so need not be enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Drop use of CONFIG_SYS_GENERIC_BOARD in U-BootSimon Glass2016-05-27-2/+1
| | | | | | | | | | | | | | | | This option is always enabled and is about to be removed. Drop references to it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* | openrisc: Drop the arch-specific board initSimon Glass2016-05-27-0/+1
| | | | | | | | | | | | | | | | | | It is well past the deadline for conversion to generic board init. Remove the old code. Stefan, can you test this please and perhaps send a follow-up patch if needed? Signed-off-by: Simon Glass <sjg@chromium.org>
* | efi_loader: Add bounce buffer supportAlexander Graf2016-05-27-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Some hardware that is supported by U-Boot can not handle DMA above 32bits. For these systems, we need to come up with a way to expose the disk interface in a safe way. This patch implements EFI specific bounce buffers. For non-EFI cases, this apparently was no issue so far, since we can just define our environment variables conveniently. Signed-off-by: Alexander Graf <agraf@suse.de>
* | arm: add initial support for Amlogic Meson and ODROID-C2Beniamino Galvani2016-05-27-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1]. [1] https://patchwork.ozlabs.org/patch/603583/ Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | distro: Add efi pxe boot codeAlexander Graf2016-05-27-1/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we can expose network functionality to EFI applications, the logical next step is to load them via pxe to execute them as well. This patch adds the necessary bits to the distro script to automatically load and execute EFI payloads. It identifies the dhcp client as a uEFI capable PXE client, hoping the server returns a tftp path to a workable EFI binary that we can then execute. To enable boards that don't come with a working device tree preloaded, this patch also adds support to load a device tree from the /dtb directory on the remote tftp server. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | net: Fix client identifiers for ARMAlexander Graf2016-05-27-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are client identifiers specifically reserved for ARM U-Boot according to http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml#processor-architecture. So let's actually make use of them rather than the bogus 0x100 that we emitted so far. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Drop the Xilinx define to 0x100 as it's not the correct value to use]. Signed-off-by: Tom Rini <trini@konsulko.com>
* | net: Move the VCI and client arch values to KconfigAlexander Graf2016-05-27-30/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | We have a bunch of boards that define their vendor class identifier and client archs in the board files or in the distro config. Move everything to the generic Kconfig options. We're missing the distinction between i386 and x86_64, as I couldn't find any config variable that would tell us the difference. Is that really important to people? I guess not, so I left it out. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | efi_loader: Add network access supportAlexander Graf2016-05-27-1/+127
|/ | | | | | | | | | | | | We can now successfully boot EFI applications from disk, but users may want to also run them from a PXE setup. This patch implements rudimentary network support, allowing a payload to send and receive network packets. With this patch, I was able to successfully run grub2 with network access inside of QEMU's -M xlnx-ep108. Signed-off-by: Alexander Graf <agraf@suse.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-25-30/+1
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| * MIPS: Move CONFIG_SYS_TEXT_BASE to KconfigPaul Burton2016-05-26-23/+0
| | | | | | | | | | | | | | | | | | Move CONFIG_SYS_TEXT_BASE to Kconfig, and add default values in board Kconfig files matching what was present in their config headers. This will make it cleaner to conditionalise the value for Malta based on 32 vs 64 bit builds. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: Use device model & tree for UARTPaul Burton2016-05-26-6/+0
| | | | | | | | | | | | | | | | | | | | | | Make use of device model & device tree to probe the UART driver. This is the initial step in bringing Malta up to date with driver model, and allows for cleaner handling of the different I/O addresses for different system controllers by specifying the ISA bus address instead of a translated memory address. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * malta: Tidy up UART address selectionPaul Burton2016-05-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The address of the UART differs based upon the system controller because it's actually within the I/O port region, which is in a different location for each system controller. Rather than handling this as 2 UARTs with the correct one selected at runtime, use I/O port accessors for the UART such that access to it gets translated into the I/O port region automatically. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-05-25-6/+92
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| * | arm64: sunxi: adjust default load addressesAndre Przywara2016-05-25-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As arm64 has slightly different expectations about load addresses, lets use a different set of default addresses for things like the kernel. As arm64 kernels don't come with a decompressor right now, reserve some more space for really big uncompressed kernels. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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