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* rockchip: add usb mass storage feature support for rk3036jacob2.chen2016-10-01-0/+4
| | | | | | | | Enable ums feature for rk3036 boards, so that we can mount the mmc device to PC. Signed-off-by: jacob2.chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* Enable ROCKCHIP_SPL_BACK_TO_BROM for rock2 boardSandy Patterson2016-10-01-0/+9
| | | | | | | | | | | | Rock2 has been tested with back to brom feature. The tricky part is that with this feature the default environment is inside u-boot, and it's defined for every rk3288 board independetly. So I just changed it for rock2 here if ROCKCHIP_SPL_BACK_TO_BROM. Solve by moving environment after u-boot before 1M boundary Signed-off-by: Sandy Patterson <apatterson@sightlogix.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2016-09-30-1/+0
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| * nds32: Support relocation.rick2016-09-29-1/+0
| | | | | | | | | | | | | | Enable pie option for relocation. Signed-off-by: rick <rick@andestech.com> Cc: Andes <uboot@andestech.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-09-30-8/+37
|\ \ | |/ |/| | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/dra7xx_evm.h
| * drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controllerSriram Dash2016-09-27-0/+2
| | | | | | | | | | | | | | | | | | | | | | Currently the controller by default enables the Receive Detect feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive detection in P3 mode. Enabling the USB3 controller to configure USB in P2 mode whenever the Receive Detect feature is required. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * usb: fsl: Rename fdt_fixup_dr_usbSriram Dash2016-09-27-2/+2
| | | | | | | | | | | | | | | | The function fdt_fixup_dr_usb is specific to fsl/nxp. So, make the function name explicit and rename fdt_fixup_dr_usb into fsl_fdt_fixup_dr_usb. Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
| * apalis_t30: colibri_imx7: colibri_t30: fix ethernet functionalityMarcel Ziswiler2016-09-27-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit aa7a648747d8c704a9a81c9e493d386930724e9d ("net: Stop including NFS overhead in defragment max") the following has been reproducibly observed while trying to transfer data over TFTP: Load address: 0x80408000 Loading: EHCI timed out on TD - token=0x8008d80 T EHCI timed out on TD - token=0x88008d80 Rx: failed to receive: -5 This patch fixes this by lowering our TFTP block size to be within the standard maximal de-fragmentation aka IP packet size again. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * dra7x: configs: enable SPL-DFU supportB, Ravi2016-09-27-3/+19
| | | | | | | | | | | | | | | | This patch enables the SPL-DFU support for dra7x platform. Signed-off-by: Ravi Babu <ravibabu@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * spl: dfu: adding dfu support functions for SPL-DFUB, Ravi2016-09-27-0/+8
| | | | | | | | | | | | | | Adding support functions to run dfu spl commands. Signed-off-by: Ravi Babu <ravibabu@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * common: dfu: saperate the dfu common functionalityB, Ravi2016-09-27-0/+1
| | | | | | | | | | | | | | | | | | The cmd_dfu functionality is been used by both SPL and u-boot, saperating the core dfu functionality moving it to common/dfu.c. Signed-off-by: Ravi Babu <ravibabu@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined ↵Sriram Dash2016-09-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | transfers requests This is required for better performance, and performs below tuning: 1. Enable burst length set, and define it as 4/8/16. 2. Set burst request limit to 16 requests. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
| * colibri_t30: fix usb ethernet functionalityMarcel Ziswiler2016-09-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit aa7a648747d8c704a9a81c9e493d386930724e9d ("net: Stop including NFS overhead in defragment max") the following has been reproducibly observed while trying to transfer data over TFTP: Load address: 0x80408000 Loading: EHCI timed out on TD - token=0x8008d80 T EHCI timed out on TD - token=0x88008d80 Rx: failed to receive: -5 This patch fixes this by upping our maximal de-fragmentation aka IP packet size again. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* | Merge git://www.denx.de/git/u-boot-ppc4xxTom Rini2016-09-27-7/+0
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| * | CPCI4052: Remove CONFIG_AUTO_COMPLETE and custom baud rate tableTom Rini2016-09-27-7/+0
| |/ | | | | | | | | | | | | | | | | | | This board is getting close to or exceeding the size limit again, remove CONFIG_AUTO_COMPLETE to save space and while in here switch to the default and slightly less complete default baudrate table. Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-09-27-179/+326
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| * | ARM: tegra: pull Tegra210 SoC DT from Linux v4.7Stephen Warren2016-09-27-172/+267
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Brought in the correct Tegra210 CAR binding; the old file in U-Boot appears to be a renamed version of the Tegra124 bindings rather than the real Tegra210 version. * Conversion of SPI and UART nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot, including separation of the Tegra LIC (Legacy IRQ controller) and GIC. * Node sort order fixes. Remaining deltas relative to the Linux DT: * U-Boot has enabled PCIe for Tegra210, but the kernel hasn't yet. * The GPIO node compatible value in the kernel explicitly includes Tegra124 values whereas U-Boot does not. I'll send a kernel patch to correct this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: pull Tegra124 SoC DT from Linux v4.7Stephen Warren2016-09-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * USB phy_type property is aligned with the kernel, so board files are updated so the final DT content doesn't change. I'm not convinved that Nyan uses HSIC phy_type. However, I'd rather this change be a no-op, and any DT bug-fixes be separate. * Sync misc changes from the kernel: missing DT content, minor compatible value fixes, typos. Remaining deltas relative to the Linux DT: * U-Boot uses #address-cells/#size-cells of 1 whereas the kernel uses 2. I believe U-Boot's DT parsing currently assumes that these values match the physical address size, so I didn't synchronize this part of the DT. * U-Boot uses the original XUSB PHY DT binding, wherease the kernel DT has moved to a newer version. Thus, XUSB client nodes include properties names phys and phy-names that do not appear in the kernel, and don't include pad definitions in the padctl node. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: pull Tegra114 SoC DT from Linux v4.7Stephen Warren2016-09-27-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Boards need to define the clk32k_in clock that feeds the Tegra PMC. * Addition of tegra114-mc.h since tegra114.dtsi now includes it. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot. * Node sort order fixes. Remaining deltas relative to the Linux DT: * USB node compatible values in U-Boot explicitly list Tegra114 values whereas the kernel does not. I'll send a kernel patch to correct this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: pull Tegra30 SoC DT from Linux v4.7Stephen Warren2016-09-27-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Modification of PCIe memory region addresses. The HW memory layout is programmable, so this should work fine, and Beaver PCIe was tested without issue. * Removal of pcie_xclk from the PCIe node and clock binding header. This clock doesn't exist and isn't used; only a reset with this ID exists. * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Changed the phy_type value for the second USB port. This required board DTs to be updated to keep the same configuration. * Boards need to define the clk32k_in clock that feeds the Tegra PMC. * Addition of tegra30-mc.h since tegra30.dtsi now includes it. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot. * Node sort order fixes. Remaining deltas relative to the Linux DT: * None. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: pull Tegra20 SoC DT from Linux v4.7Stephen Warren2016-09-27-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This brings in a few minor fixes since the last sync. The largest change is the removal of the definition for TEGRA20_CLK_PCIE_XCLK. This clock doesn't actually exist. Remaining deltas: * Addition of u-boot,dm-pre-reloc property to a couple of nodes. * Addition of the NAND controller, which Linux doesn't yet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: increase console buffer size and sys args numBryan Wu2016-09-27-2/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux-for-Tegra kernel uses a very long command line. The default value of CONFIG_SYS_CBSIZE is too small to printf out the long command line and causes a message like: bootarg overflow 602+0+0+1 > 512 on the console, and the board refuses to boot. The default value of CONFIG_SYS_MAXARGS is too small to add a long long command line, and the kernel won't boot without the complete bootargs. Increasing these two config options solves this problem. Signed-off-by: Bryan Wu <pengw@nvidia.com> Signed-off-by: Peter Chubb <Peter.Chubb@data61.csiro.au> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-09-27-0/+338
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| * | arm64: mvebu: Add Armada 7K db-88f7040 development board supportStefan Roese2016-09-27-0/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the Marvell Armada 7K DB-88F7040 development board. Supported are the following interfaces: - UART - SPI (incl. SPI NOR) - I2C - USB - SATA / AHCI Support for other interfaces will follow. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | arm64: mvebu: Add Armada 3700 db-88f3720 development board supportStefan Roese2016-09-27-0/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the Marvell Armada 3700 DB-88F3720 development board. Supported are the following interfaces: - UART - SPI (incl. SPI NOR) - I2C - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 3kStefan Roese2016-09-27-0/+61
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This version is based on the Marvell U-Boot version with this patch applied as latest patch: Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb device mode" from 2016-07-05. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
* | dfu: Migrate to KconfigTom Rini2016-09-27-93/+0
| | | | | | | | | | | | | | | | | | | | | | Introduce a hidden USB_FUNCTION_DFU Kconfig option and select it for CMD_DFU (as we must have the DFU command enabled to do anything DFU). Make all of the entries in drivers/dfu/Kconfig depend on CMD_DFU and add options for all of the back end choices that DFU can make use of. Cc: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* | ti_armv7_common.h: Adjust malloc pool size in all cases.Tom Rini2016-09-27-6/+2
|/ | | | | | | | | | | | | | Previously we had been adjusting CONFIG_SYS_MALLOC_LEN based on if CONFIG_DFU_MMC has been set or not. However, for quite some time this has not been the case as we often include <configs/ti_armv7_common.h> prior to setting CONFIG_DFU_MMC so we would always use 16MiB and then not have enough room for to DFU files. Given the amount of memory we always have, setting a minimum size of 32MiB for malloc is reasonable. However, in the SPL case not only do we not need that much we start running into overlap problems and then will fail to boot. Since we don't need 16MiB in the SPL case, bring this down to 8MiB. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-09-26-106/+1020
|\ | | | | | | | | | | | | trini: Drop local memset() from examples/standalone/mem_to_mem_idma2intr.c Signed-off-by: Tom Rini <trini@konsulko.com>
| * armv7: ls1021a: Convert CONFIG_LS1_DEEP_SLEEP to Kconfig optionYork Sun2016-09-26-2/+0
| | | | | | | | | | | | | | | | Move this option to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> CC: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021AYork Sun2016-09-26-2/+1
| | | | | | | | | | | | | | | | | | Move this config to Kconfig option and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> CC: Calvin Johnson <calvin.johnson@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * driver: ddr: fsl_mmdc: Pass board parameters through data structureYork Sun2016-09-26-51/+17
| | | | | | | | | | | | | | | | | | Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046AYork Sun2016-09-26-1/+0
| | | | | | | | | | | | | | | | | | Move this option to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> CC: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * armv8: ls1046aqds: Add LS1046AQDS board supportShaohui Xie2016-09-14-1/+524
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1046AQDS Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046ardb: Add LS1046ARDB board supportMingkai Hu2016-09-14-0/+415
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card * On-board 4G eMMC Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: * PCIe1 (SerDes2 Lane0) to miniPCIe slot * PCIe2 (SerDes2 Lane1) to x2 PCIe slot * PCIe3 (SerDes2 Lane2) to x4 PCIe slot SATA: * SerDes2 Lane3 to SATA port USB 3.0: one super speed USB 3.0 type A port one Micro-AB port UART: supports two UARTs up to 115200 bps for console Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * Export memset for standalone AQ FW load appsShaohui Xie2016-09-14-1/+2
| | | | | | | | | | | | | | | | | | | | The 'commit 95279315076c ("board/ls2085rdb: Export functions for standalone AQ FW load apps")' mentioned memset was exported but it was not, this patch exports the memset. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012aShengzhou Liu2016-09-14-60/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * nxp: ls102xa: add LS1 PSCI system suspendHongbo Zhang2016-09-14-0/+2
| | | | | | | | | | | | | | | | The deep sleep function of LS1 platform, is mapped into PSCI system suspend function, this patch adds implementation of it. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * nxp: ls102xa: add registers definition for system sleepHongbo Zhang2016-09-14-0/+7
| | | | | | | | | | | | | | | | This patch adds definitions of all the regesters necessary for system sleep. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080a: Remove debug server supportYork Sun2016-09-14-39/+1
| | | | | | | | | | | | Debug server feature has been dropped from roadmap. Signed-off-by: York Sun <york.sun@nxp.com>
| * fsl: csu: add an API to set R/W permission to PCIeHou Zhiqiang2016-09-14-0/+1
| | | | | | | | | | Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl: csu: add an API to set individual device access permissionHou Zhiqiang2016-09-14-0/+1
| | | | | | | | | | | | | | | | Add this API to make the individual device is able to be set to the specified permission. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add more debug registersYork Sun2016-09-14-3/+2
| | | | | | | | | | | | | | 32 more debug registers are added for newer DDR controllers. Signed-off-by: York Sun <york.sun@nxp.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
* | kconfig: introduce kconfig for UBIHeiko Schocher2016-09-26-70/+0
| | | | | | | | | | | | | | | | | | move the UBI config options into Kconfig. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andrew F. Davis <afd@ti.com> Reviewed by: Evgeni Dobrev <evgeni at studio-punkt.com>
* | board: amcore: add update scriptsAngelo Dureghello2016-09-25-1/+12
| | | | | | | | | | | | | | | | | | Add some useful update scripts. Signed-off-by: Angelo Dureghello <angelo@sysam.it> --- Changes for v.2: - Fix syntax error on upgrade_jffs2 script
* | arm: mvebu: NAND support for DB-88F6820-AMCChris Packham2016-09-24-0/+4
| | | | | | | | | | | | | | Enable the NAND interface on this board. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | arm: mvebu: add DB-88F6820-AMC boardChris Packham2016-09-24-0/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board is a plug in card for Marvell's switch system development kits. Form-factor aside it is similar to the DB-88F6820-GP with the following differences. - TCLK is 200MHz - SPI1 is used - No SATA - No MMC - NAND flash Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | reset: add no-op stubs for optional reset controlMasahiro Yamada2016-09-23-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | My motivation for this patch is to make reset control handling optional for generic drivers. I want to add reset control to drivers/usb/host/ehci-generic.c, but it is used by several platforms, some will implement a reset controller driver, some will not. Add no-op stubs in order to avoid link error for drivers that implement reset controlling, but still it is optional. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | errno.h: sync error macros with linux 4.8-rc7Masahiro Yamada2016-09-23-11/+46
| | | | | | | | | | | | | | | | | | | | | | For synchronization, import macros from - include/uapi/asm-generic/errno-base.h - include/uapi/asm-generic/errno.h - include/linux/errno.h of Linux 4.8-rc7. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Move ENOTSUPP defines to include/linux/errno.hMasahiro Yamada2016-09-23-4/+2
| | | | | | | | | | | | Collect a couple of duplicated defines into a single place. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.1 at 2024-09-03 21:28:59 +0000