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* board: Add Qualcomm Dragonboard 410C supportMateusz Kulikowski2016-04-01-0/+150
| | | | | | | | | | | | | | | | | | | | | | This commit add support for 96Boards Dragonboard410C. It is board based on APQ8016 Qualcomm SoC, complying with 96boards specification. Features (present out of the box): - 4x Cortex A53 (ARMv8) - 2x USB Host port - 1x USB Device port - 4x LEDs - 1x HDMI connector - 1x uSD connector - 3x buttons (Power, Vol+, Vol-/Reset) - WIFI, Bluetooth with integrated antenna - 8GiB eMMC U-Boot boots chained with fastboot in 64-bit mode. For detailed build instructions see readme.txt in board directory. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Tested-by: Simon Glass <sjg@chromium.org>
* drivers: Add SPMI bus uclassMateusz Kulikowski2016-04-01-0/+47
| | | | | | | | | | | | Qualcom processors use proprietary bus to talk with PMIC devices - SPMI (System Power Management Interface). On wiring level it is similar to I2C, but on protocol level, it's multi-master and has simple autodetection capabilities. This commit adds simple uclass that provides bus read/write interface. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* ehci-ci.h: drop generic USBCMD fieldsMateusz Kulikowski2016-04-01-4/+0
| | | | | | | | Use definitions from ehci.h instead. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
* usb: ehci-ci: Add missing registers.Mateusz Kulikowski2016-04-01-1/+5
| | | | | | | | | | | | | | Some registers of usb_ehci were marked as reserved. This may be true for some variants of Chipidea USB core, but they have meaning on other devices. The following registers were added: sbusstatus/sbusmode: AHB-related registers genconfig*: Auxiluary IP core configuration registers. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
* usb: Rename ehci-fsl.h to ehci-ci.hMateusz Kulikowski2016-04-01-3/+3
| | | | | | | | | | | | | Most of ehci-fsl header describe USB controller designed by Chipidea and used by various SoC vendors. This patch renames it to a generic header: ehci-ci.h Contents of file are not changed (so it contains several references to freescale SoCs). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Simon Glass <sjg@chromium.org>
* usb: ulpi: Fix compile warning in read/write on 64-bit machines.Mateusz Kulikowski2016-04-01-0/+2
| | | | | | | | | | | | | | | | | | | ulpi_read and ulpi_write are used to read/write registers via ULPI bus. Code generates compilation warnings on 64-bit machines where pointer is cast to u32. This patch drops all but last 8 bits of register address. It is possible, because addresses on ULPI bus are 6- or 8-bit. It is not possible (according to ULPI 1.1 spec) to have more than 8-bit addressing. This patch should not cause regressions as all calls to ulpi_read/write use either structure pointer (@ address 0) or integer offsets cast to pointer - addresses requested are way below 8-bit range. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* usb: ulpi: Fix viewport_addr typeMateusz Kulikowski2016-04-01-1/+1
| | | | | | | | | | | viewport_addr is address of memory mapped ULPI viewport. It is used only as argument to readl/writel later causing compile warnings on 64-bit devices. This fix changes its type to match pointer size. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* Migrate CONFIG_ULPI* to KconfigMateusz Kulikowski2016-04-01-10/+1
| | | | | | | | | | | | | Move CONFIG_USB_ULPI* from headers to defconfigs for boards that use it. Also - add CONFIG_USB where necesarry - all boards use it, but some are not defining it explicitly. Affected boards: colibri_t20, harmony, mcx, mt_ventoux, twister, zynq_(picozed, zc702, zc706, zed, zybo) Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: ti: DRA7: Add DP83867 TI phy for rev cDan Murphy2016-04-01-0/+1
| | | | | | | | | | | Enable the TI DP83867 Giga bit phy on the dra7 rev c board. The rx and tx internal delays are need for this board so the usage of RGMII_ID is required. Signed-off-by: Dan Murphy <dmurphy@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* kc1: Add some sysboot and devicetree-related environment variablesPaul Kocialkowski2016-04-01-0/+2
| | | | | | This adds some environment variables for sysboot and devicetree. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* kc1: Include explicit serial baudrate on bootargsPaul Kocialkowski2016-04-01-1/+1
| | | | | | This makes the baudrate for the kernel command line explicit. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* sniper: Include explicit serial baudrate on bootargsPaul Kocialkowski2016-04-01-1/+1
| | | | | | This makes the baudrate for the kernel command line explicit. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* configs: ti_armv7_keystone2: make SYS_TEXT_BASE configurable at build timeVitaly Andrianov2016-04-01-0/+2
| | | | | | | | | | | U-boot for general purpose KS2 devices is loaded to the beginning of the internal memory (0x0c000000). Secure devices uses this memory and CONFIG_SYS_TEXT_BASE has to be different for those devices. This commit make this configurable at build time by giving CONFIG_SYS_TEXT_BASE as a command line definition to make command. Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
* rpi: BCM2837 and Raspberry Pi 3 32-bit supportStephen Warren2016-04-01-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Raspberry Pi 3 contains a BCM2837 SoC. The BCM2837 is a BCM2836 with the CPU complex swapped out for a quad-core ARMv8. This can operate in 32- or 64-bit mode. 32-bit mode is the current default selected by the VideoCore firmware on the Raspberry Pi 3. This patch adds a 32-bit port of U-Boot for the Raspberry Pi 3. >From U-Boot's perspective, the only delta between the RPi 2 and RPi 3 is a change in usage of the SoC UARTs. On all previous Pis, the PL011 was the only UART in use. The Raspberry Pi 3 adds a Bluetooth module which uses a UART to connect to the SoC. By default, the PL011 is used for this purpose since it has larger FIFOs than the other "mini" UART. However, this can be configured via the VideoCore firmware's config.txt file. This patch hard-codes use of the mini UART in the RPi 3 port. If your system uses the PL011 UART for the console even on the RPi 3, please use the RPi 2 U-Boot port instead. A future change might determine which UART to use at run-time, thus allowing the RPi 2 and RPi 3 (32-bit) ports to be squashed together. The mini UART has some limitations. One externally visible issue in the BCM2837 integration is that the UART divides the SoC's "core clock" to generate the baud rate. The core clock is typically variable, and under control of the VideoCore firmware for thermal management reasons. If the VC FW does modify the core clock rate, UART communication will be corrupted since the baud rate will vary from the expected value. This was not an issue for the PL011 UART, since it is fed by a fixed 3MHz clock. To work around this, the VideoCore firmware can be told not to modify the SoC core clock. However, the only way this can happen and be thermally safe is to limit the core clock to a low/minimum frequency. This leaves performance on the table for use-cases that don't care about a UART console. Consequently, use of the mini UART console must be explicitly requested by entering the following line into config.txt: enable_uart=1 A recent version of the VC firmware is required to ensure that the mini UART is fully and correctly initialized by the VC FW; at least firmware.git 046effa13ebc "firmware: arm_loader: emmc clock depends on core clock See: https://github.com/raspberrypi/firmware/issues/572". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: bcm2835: move CONFIG_BCM283* to KconfigStephen Warren2016-04-01-2/+0
| | | | | Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Drop command-processing code when CONFIG_CMDLINE is disabledSimon Glass2016-04-01-0/+18
| | | | | | | | Command parsing and processing code is not needed when the command line is disabled. Remove this code in that case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-04-01-13/+57
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| * sunxi: Add support for Allwinner A64 SoCsSiarhei Siamashka2016-04-01-6/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: usb_phy: Add support for A83T USB PHYsChen-Yu Tsai2016-03-31-0/+2
| | | | | | | | | | | | | | | | | | The A83T has 3 USB PHYs: 1 for USB OTG, 1 for standard USB 1.1/2.0 host, 1 for USB HSIC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp818: Add support for FLDOsChen-Yu Tsai2016-03-31-0/+2
| | | | | | | | | | | | | | | | | | The FLDOs on AXP818 PMIC normally provide power to CPUS and USB HSIC PHY on the A83T/H8. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: axp: Support VBUS drive GPIO on AXP818Chen-Yu Tsai2016-03-31-1/+5
| | | | | | | | | | | | | | | | | | AXP818 supports VBUS drive function, even though the manual does not mention it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: axp: Generalize register macros for VBUS drive GPIOChen-Yu Tsai2016-03-31-4/+4
| | | | | | | | | | | | | | | | | | VBUS drive is supported on AXP221 and later PMICs. Rework the macros so we can support this on later PMICs without too much work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp818: Remove undefined axp818_init()Chen-Yu Tsai2016-03-31-2/+0
| | | | | | | | | | | | | | | | axp818_init() is declared, but never defined. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | ARM: uniphier: remove CONFIG_ARP_TIMEOUT defineMasahiro Yamada2016-04-01-8/+0
| | | | | | | | | | | | | | | | | | I no longer see the problem claimed in the comment block. Rather, the 0.5 msec timeout seems too short for some TFTP servers. Drop the CONFIG_ARM_TIMEOUT to fall back to the 5 sec timeout. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: drop unneeded defines related to legacy serial driverMasahiro Yamada2016-04-01-6/+0
| | | | | | | | | | | | | | These defined were used for pre-DM ns16550 serial driver. They are unneeded because UniPhier SoCs now use DM serial. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: add sramupdate commandMasahiro Yamada2016-04-01-0/+4
| | | | | | | | | | | | This command would be useful to update U-Boot images in SRAM. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: make u-boot-with-spl.bin really availableMasahiro Yamada2016-04-01-0/+1
|/ | | | | | | | | | | Commit d085ecd61b99 ("ARM: uniphier: switch to raw U-Boot image") claimed that u-boot-with-spl.bin would be useful in its commit log, but it was not available because the commit missed to define CONFIG_SPL_MAX_SIZE. Without it, CONFIG_SPL_PAD_TO is not defined either (see include/config_fallbacks.h). So, the SPL image is not padded correctly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-03-29-23/+103
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| * armv8/ls2080ardb: Enable VID supportRai Harninder2016-03-29-0/+16
| | | | | | | | | | | | | | | | This patch enable VID support for ls2080ardb platform. It uses the common VID driver. Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * SECURE BOOT: Change fsl_secboot_validate func to pass image addrSaksham Jain2016-03-29-2/+2
| | | | | | | | | | | | | | | | | | Use a pointer to pass image address to fsl_secboot_validate(), instead of using environmental variable "img_addr". Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * SECURE BOOT: Halt execution when secure boot failSaksham Jain2016-03-29-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | In case of fatal failure during secure boot execution (e.g. header not found), reset is asserted to stop execution. If the RESET_REQ is not tied to HRESET, this allows the execution to continue. Add esbh_halt() after the reset to make sure execution stops. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * SECURE_BOOT: Use default bootargsSaksham Jain2016-03-29-4/+10
| | | | | | | | | | | | | | | | | | | | For secure boot, currently we were using fixed bootargs for all SoCs. This is not needed and we can use the bootargs which are used in non-secure boot. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-lsch3: Copy Bootscript and header from NOR to DDRSaksham Jain2016-03-29-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | To unify steps for secure boot for xip (eg. NOR) and non-xip memories (eg. NAND, SD), bootscipts and its header are copied to main memory. Validation and execution are performed from there. For other ARM Platforms (ls1043 and ls1020), to avoid disruption of existing users, this copy step is not used for NOR boot. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080rdb: ls2080qds: Add secure boot supportSaksham Jain2016-03-29-0/+4
| | | | | | | | | | | | | | | | | | | | Sec_init has been called at the beginning to initialize SEC Block (CAAM) which is used by secure boot validation later for both ls2080a qds and rdb. 64-bit address in ESBC Header has been enabled. Secure boot defconfigs are created for boards (NOR boot). Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-lsch3: Add new header for secure bootSaksham Jain2016-03-29-8/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For secure boot, a header is used to identify key table, signature and image address. A new header structure is added for lsch3. Currently key extension (IE) feature is not supported. Single key feature is not supported. Keys must be in table format. Hence, SRK (key table) must be present. Max key number has increase from 4 to 8. The 8th key is irrevocable. A new barker Code is used. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080: Add SFP Configs for LS2080Saksham Jain2016-03-29-1/+2
| | | | | | | | | | | | | | | | | | In LS2080, SFP has version 3.4. It is in little endian. The base address is 0x01e80200. SFP is used in Secure Boot to read fuses. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/ls1043a: Update env settings for booting kernelQianyu Gong2016-03-24-4/+4
| | | | | | | | | | Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | zipitz2: enable cachesVasily Khoruzhick2016-03-27-2/+1
| | | | | | | | | | | | | | It speeds up loading kernel from SD or USB a lot. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* | pxa: add support for D- and I- cachesVasily Khoruzhick2016-03-27-0/+1
| | | | | | | | | | | | Tested with OHCI and pxafb drivers - no issues found Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
* | zipitz2: enable USB host supportVasily Khoruzhick2016-03-27-0/+1
| | | | | | | | Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
* | pxa-common: pxa27x has 3 OHCI portsVasily Khoruzhick2016-03-27-0/+4
| | | | | | | | | | | | | | 3rd port can be used as a device or host. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* | zipitz2: enable libfdtVasily Khoruzhick2016-03-27-0/+1
| | | | | | | | | | | | zipitz2 supports DT boot since linux-4.4 (not mainlined yet) Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
* | zipitz2: enable LCD rotationVasily Khoruzhick2016-03-27-0/+1
| | | | | | | | | | | | | | z2's screen is rotated by 270 degrees Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* | zipitz2: restore board supportVasily Khoruzhick2016-03-27-0/+224
| | | | | | | | | | | | zipitz2 was dropped in 49d8899ba9c26335e4a12e01c18028fc5e40c796 Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
* | serial: add BCM283x mini UART driverStephen Warren2016-03-27-0/+24
| | | | | | | | | | | | | | | | The RPi3 typically uses the regular UART for high-speed communication with the Bluetooth device, leaving us the mini UART to use for the serial console. Add support for this UART so we can use it. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | net: export eth_setenv_enetaddr_by_index() to net.hRoger Quadros2016-03-27-0/+17
| | | | | | | | | | | | | | | | | | Some TI boards (e.g. IDK) have 4 to 6 ethernet ports and this function is handy at board.c to configure the MAC address of the ports. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: bcm283x: don't always define CONFIG_BCM2835Stephen Warren2016-03-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, CONFIG_BCM2835 is defined for all BCM283x builds and _BCM2836 is defined when building for that SoC. That means there isn't a single define that means "exactly BCM2835". This will complicate future patches where BCM2835-vs-anything-else needs to be determined simply. Modify the code to define one or the other of CONFIG_BCM2835/BCM2836 so future patches are simpler. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | RPi: Enable caches for rpi2Alexander Graf2016-03-27-1/+0
| | | | | | | | | | | | | | | | Now that we have support for running with caches enabled in HYP mode, opt in to that on the Raspberry Pi 2. This brings a significant performance boost. Signed-off-by: Alexander Graf <agraf@suse.de>
* | efi_loader: Add GOP supportAlexander Graf2016-03-27-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | The EFI standard defines a simple boot protocol that an EFI payload can use to access video output. This patch adds support to expose exactly that one (and the mode already in use) as possible graphical configuration to an EFI payload. With this, I can successfully run grub2 with graphical output. Signed-off-by: Alexander Graf <agraf@suse.de>
* | stm32f746-disco: enable flash supportVikas Manocha2016-03-26-7/+4
| | | | | | | | | | | | This patch enables embedded flash for stm32f746 discovery board. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
generated by cgit v1.1 at 2024-11-02 07:20:01 +0000