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* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-04-28-65/+326
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| * mx6cuboxi: Load the correct 'fdtfile' variableFabio Estevam2015-04-27-3/+16
| | | | | | | | | | | | | | | | | | | | | | Instead of hardcoding the 'fdtfile' variable, let's detect the SoC and board variant on the fly and change the dtb name. Based on the scheme done on am335x board. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * mx6cuboxi: Use more standard namings for fdt variablesFabio Estevam2015-04-27-6/+6
| | | | | | | | | | | | | | | | README file suggests to use 'fdtfile' for the dtb file name and 'fdt_addr_r' for the dtb address in RAM, so do as suggested. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * nitrogen6x: allow gzipped bitmap displayEric Nelson2015-04-22-0/+3
| | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * arm: mx6: tqma6: Extract baseboard configs into separate config fileStefan Roese2015-04-22-41/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch extracts all baseboard specific defines into a separate config file. This makes it easier to add other baseboards that use the TQMa6 SoM. This patch will be used by the upcoming WRU-IV board support which also uses the TQMa6 SoM. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Stefano Babic <sbabic@denx.de> Acked-By: Markus Niebel <Markus.Niebel@tq-group.com>
| * power: pfuze100: fix LDO_EN bit valueTim Harvey2015-04-22-1/+1
| | | | | | | | | | | | | | | | The LDO_EN is bit 4, not value 4. This is only used on the Ventana boards so we will change it in the header as the other values there are in terms of values and not bit numbers. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: update boot scripts to support ubifs boot volTim Harvey2015-04-22-17/+27
| | | | | | | | | | | | | | Added support in default boot scripts to find kernel/dtbs on a boot volume separate from rootfs volume. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: add usb_pgood_delay 2sec defaultTim Harvey2015-04-22-0/+1
| | | | | | | | | | | | | | We have encountered many USB storage devices that require more warm-up than the spec allows for. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: config: enable EXT4 filesystem read/write supportTim Harvey2015-04-22-0/+2
| | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: config: enable edid supportTim Harvey2015-04-22-0/+1
| | | | | | | | | | | | | | | | | | | | Enable the 'i2c edid' command to query and display data from an attached HDMI monitor of LVDS display with an EDID device. Example: Ventana > i2c dev 2 && i2c edid 0x50 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: config: Support ramdiskTim Harvey2015-04-22-0/+1
| | | | | | | | | | | | | | | | Set the initrd_high env so that ramdisk range can be properly set. See commit 7e9603e and README Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: config: add USB Mass Storage (ums) supportTim Harvey2015-04-22-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the USB mass storage gadget to enable access to on-board storage. Example: Ventana > ums 0 mmc 0 # provide ums access to the uSD Ventana > ums 0 usb 0 # provide ums access to the first USB device Ventana > ums 0 sata 0 # provide ums access to an mSATA device Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: assign default ethprime dynamicallyTim Harvey2015-04-22-1/+0
| | | | | | | | | | | | | | Gateworks Ventana boards don't all use IMX6 FEC, so lets define default ethprime based off the first detected device. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: add i210 supportTim Harvey2015-04-22-0/+1
| | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: disable 4k tftp/nfs packetsTim Harvey2015-04-22-5/+0
| | | | | | | | | | | | | | I've encountered issues when using 4k packets through certain switches. For now disable this and go back to using MTU size packets. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * mx6: Add initial SPL support for HummingBoard-i2eXFabio Estevam2015-04-22-0/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | Add the initial SPL support for HummingBoard-i2eX, which is based on a MX6 Dual. For more information about HummingBoard, please check: http://www.solid-run.com/products/hummingboard/ Based on the work from Jon Nettleton and Rabeeh Khoury. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * fdt: add new fdt_fixup_display function to configure displayTim Harvey2015-04-22-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Add 'fdt_fixup_display' function to fixup device-tree native-mode property of display-timings node to select timings for a specific display. This is useful if a device-tree has configurations for multiple display timings for undetectable displays. see kernel Documentation/devicetree/bindings/video/display-timing.txt Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-04-28-15/+15
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| * | dm: sf: Save flash flags to struct spi_flashBin Meng2015-04-28-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add a new member 'flags' in struct spi_flash to store the flash flags during spi_flash_validate_params(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | dm: spi: Correct SPI claim/release_bus() methodsSimon Glass2015-04-23-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These methods should be passed a slave device, not a bus. This matches the old SPI interface. It is important to know which device is claiming the bus so passing a bus is not that useful. Reported-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | spi flash: fix trivial problemsPavel Machek2015-04-22-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | Fix typos and too big #ifdef. Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | sf: Correct the macros as per new array fast read commandSiva Durga Prasad Paladugu2015-04-22-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the macros as per insertion of array fast read command CMD_READ_ARRAY_FAST in spi_read_cmds_array in file sf_probe.c Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-04-24-257/+4109
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| * | | ls2085a: esdhc: Add esdhc support for ls2085aYangbo Lu2015-04-23-4/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds esdhc support for ls2085a. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls2085ardb: Enable NAND SPL supportScott Wood2015-04-23-5/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable NAND boot support using SPL framework. To boot from NAND, either use DIP switches on board, or "qixis_reset nand" command. Details of forming NAND image can be found in README. Signed-off-by: Scott Wood <scottwood@freescale.com> [York Sun: Remove +S from defconfig after commit 252ed872] Signed-off-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls2085aqds: NAND boot supportScott Wood2015-04-23-5/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds NAND boot support for LS2085AQDS, using SPL framework. Details of forming NAND image can be found in README. Signed-off-by: Scott Wood <scottwood@freescale.com> [York Sun: Remove +S from defconfig after commit 252ed872] Signed-off-by: York Sun <yorksun@freescale.com>
| * | | driver/ifc: Add 64KB page supportJaiprakash Singh2015-04-23-28/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC has two register pages.Till IFC version 1.4 each register page is 4KB each.But IFC ver 2.0 register page size is 64KB each.IFC regiters structure is break into two viz FCM and RUNTIME.FCM(Flash control machine) registers are defined in PAGE0 and controls IFC generic functionality. RUNTIME registers are defined in PAGE1 and controls NAND and GPCM funcinality. FCM and RUNTIME structures defination is common for IFC version 1.4 and 2.0. Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | board/ls2085qds: Add support ethernetPrabhakar Kushwaha2015-04-23-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of ethernet: - eth.c: mapping lane to slot for (0x2A, 0x07) - ls2085a.c: To enable/disable dpmac and get link type Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls2085ardb: Add support of LS2085ARDB platformYork Sun2015-04-23-0/+266
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LS2085ARDB is a evaluation platform that supports LS2085A family SoCs. This patch add sbasic support for the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | armv8/ls2085aqds: Add support of LS2085AQDS platformYork Sun2015-04-23-7/+315
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
| * | | driver/ldpaa: Add support of WRIOP static data structurePrabhakar Kushwaha2015-04-23-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire rate IO Processor (WRIOP) provide support of receive and transmit ethernet frames from the ethernet MAC. Here Each WRIOP block supports upto 64 DPMACs. Create a house keeping data structure to support upto 16 DPMACs and store external phy related information. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | net/memac_phy: reuse driver for little endian SoCsShaohui Xie2015-04-23-0/+264
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memac for PHY management on little endian SoCs is similar on big endian SoCs, so we modify the driver by using I/O accessor function to handle the endianness, so the driver can be reused on little endian SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access is little endian, if not, the I/O access is big endian. Move fsl_memac.h out of powerpc include. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | drivers/fsl-mc: Changed MC firmware loading for new boot architectureJ. German Rivera2015-04-23-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changed MC firmware loading to comply with the new MC boot architecture. Flush D-cache hierarchy after loading MC images. Add environment variables "mcboottimeout" for MC boot timeout in milliseconds, "mcmemsize" for MC DRAM block size. Check MC boot status before calling flib functions. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | armv8: Add SerDes framework for Layerscape ArchitectureMinghuan Lian2015-04-23-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of SerDes framework for Layerscape Architecture. - Add support of 2 SerDes block - Add SerDes protocol parsing and detection - Create table of SerDes protocol supported by LS2085A Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls2085a: Fix generic timer clock sourceYork Sun2015-04-23-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timer clock is system clock divided by 4, not fixed 12MHz. This is common to the SoC, not board specific. Primary core is fixed when u-boot still runs in board_f. Secondary cores are fixed by reading a variable set by u-boot. Signed-off-by: York Sun <yorksun@freescale.com> CC: Mark Rutland <mark.rutland@arm.com>
| * | | armv8/ls2085a: Update common header filePrabhakar Kushwaha2015-04-23-109/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ls2085a_common.h contains hard-coded information for NOR/NAND flash, I2C, DDR, etc. These are platform specific. Move them out of common header file and placed into respective board header files. Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector size. Enable command auto complete. Update prompt symbol. Set fdt_high to 0xa0000000 because Linux requires that the fdt be 8-byte aligned and below 512 MiB. Besides ensuring compliance with the 512 MiB limit, this avoids problems with the dtb being misaligned within the FIT image. Change the MC FW, MC DPL and Debug server NOR addresses in compliance with the NOR flash layouts for 128MB flash. Add PCIe macros. Enable "loadb" command. Disable debug server. Enable workaround for erratum A008511. Stop reset on panic for postmortem debugging. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | driver/ddr/fsl: Add workaround for DDR erratum A008511York Sun2015-04-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This erratum only applies to general purpose DDR controllers in LS2. It shouldn't be applied to DP-DDR controller. Check DDRC versoin number before applying workaround. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | drivers/ddr/fsl: Update DDR driver for DDR4York Sun2015-04-23-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add/update registers for DDR4, including DQ mappings. Allow raw timing method used for all controllers. Update mode_9 register to 0x500 for improved stability. Check DDR controller version number individually in case a SoC has multiple DDR controllers of different versions. Increase read-write turnaround for DDR4 high speeds. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | driver/i2c/mxc: Enable I2C bus 3 and 4York Sun2015-04-23-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SoCs have more than two I2C busses. Instead of adding ifdef to the driver, macros are put into board header file where CONFIG_SYS_I2C_MXC is defined. Signed-off-by: York Sun <yorksun@freescale.com> CC: Heiko Schocher <hs@denx.de>
| * | | board/ls2085_common: Increase malloc lengthPrabhakar Kushwaha2015-04-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Increase malloc length for more than 2M. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | driver/ldpaa_eth: Add LDPAA Ethernet driverPrabhakar Kushwaha2015-04-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LDPAA Ethernet driver is a freescale's new ethernet driver based on Layerscape architecture. Every ethernet driver controls on DPNI object. Where all DPNIs share one common DPBP and DPIO object to support Rx and Tx flows. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Cristian Sovaiala <cristian.sovaiala@freescale.com> CC: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> CC: J. German Rivera <German.Rivera@freescale.com> [York Sun: s/NetReceive/net_process_received_packet] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | driver/fsl-mc: Add support of MC FlibsPrabhakar Kushwaha2015-04-21-104/+2519
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's Layerscape Management Complex (MC) provide support various objects like DPRC, DPNI, DPBP and DPIO. Where: DPRC: Place holdes for other MC objectes like DPNI, DPBP, DPIO DPBP: Management of buffer pool DPIO: Used for used to QBMan portal DPNI: Represents standard network interface These objects are used for DPAA ethernet drivers. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/fsl-lsch3: Add Freescale Debug Server driverBhupesh Sharma2015-04-21-5/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Debug Server driver is responsible for loading the Debug server FW on the Service Processor (Cortex-A5 core) on LS2085A like SoCs and then polling for the successful initialization of the same. TOP MEM HIDE is adjusted to ensure the space required by Debug Server FW is accounted for. MC uses the DDR area which is calculated as: MC DDR region start = Top of DDR - area reserved by Debug Server FW Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | QE/DeepSleep: add QE deepsleep support for mpc85xxZhao Qiang2015-04-21-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Muram will power off during deepsleep, and the microcode of qe in muram will be lost, it should be reload when resume. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | drivers:usb: Check if USB Erratum A005697 is applicable on BSC913xNikhil Badola2015-04-21-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check if USB Erratum A005697 is applicable on BSC913x and add corresponding property in the device tree via device tree fixup which is used by linux driver Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | drivers:usb:fsl: Add affected SOCs for USB Erratum A007792Nikhil Badola2015-04-21-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add following affected SOCs and their personalities for USB Erratum A007792 : T1040 Rev 1.1 T1024 Rev 1.0 Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | drivers:usb: Add device-tree fixup to identify socs having dual phyNikhil Badola2015-04-21-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Identify soc(s) having dual phy so as to add "utmi_dual" as phy_mode for all these socs. This is required for supporting deel-sleep feature in linux for usb driver Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | Add bootscript support to esbc_validate.gaurav rana2015-04-21-0/+90
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Default environment will be used for secure boot flow which can't be edited or saved. 2. Command for secure boot is predefined in the default environment which will run on autoboot (and autoboot is the only option allowed in case of secure boot) and it looks like this: #define CONFIG_SECBOOT \ "setenv bs_hdraddr 0xe8e00000;" \ "esbc_validate $bs_hdraddr;" \ "source $img_addr;" \ "esbc_halt;" #endif 3. Boot Script can contain esbc_validate commands and bootm command. Uboot source command used in default secure boot command will run the bootscript. 4. Command esbc_halt added to ensure either bootm executes after validation of images or core should just spin. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2015-04-23-25/+203
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| * | | dm: core: Select device tree control correctly for SPLSimon Glass2015-04-23-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-10-11 01:26:45 +0000