| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
These changes were identified by HighSmith Bill ,Mazzyar and Joseph for
DDR configuration in u-boot code. Some are related to performance, some
affect stability and some correct few basic errors in the current
configuration.
The changes have been tested and found to give better memory latency
figures on MPC8313eRDB.LMBench figures prove it.
The changes are:
- CS0_CONFIG[ AP_n_EN] is changed from 1 to 0
(this may improve performance for application with many read
or write to open pages).
- CS0_CONFIG[ODT_WR_CFG] is currently changed from 100 to
001 (activating all the CS when only one is used may cause
unwanted noise on the system)
- TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 8clks (based on
Tras=45ns)
- TIMING_CFG_1[REFREC] changed from 21 clks to 18clks.
- TIMING_CFG_2[AL] value changed from 0 setting to 1 clk to
comply with the 3 ODT clk requirements)
- TIMING_CFG_2[CPO] was set to a reserved value, changed to RL+3/4.
- TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 6clks.
- DDR_SDRAM_MODE[AL]changed from 0 to 1.
- DDR_SDRAM_MODE[WRREC] changed from 1 clk to 3 clks.
- DDR_SDRAM_INTERVAL[REFINT] is changed from 0x0320 to 0x0510.
- DDR_SDRAM_INTERVAL[BSTOPRE] is changed from 0x64 to 0x0500.
The patch is based of git://www.denx.de/git/u-boot-mpc83xx.git
The last commit on this tree was 6775c68683a53c7abc778774641aac6f833a2cbf
Signed-off-by: Poonam Aggrwal-b10812 <b10812@freescale.com>
Cc: Bill HighSmith <Bill.Highsmith@freescale.com>
Cc: Razzaz Mazyar <MRazzaz@freescale.com>
Cc: Josep P J <PJ.Joseph@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
|
|
|
|
|
| |
The isdram command prints out decoded information the "serial presence
detect" (SPD) chip on the SDRAM SIMMs. This can be very helpful when
debugging memory configuration problems.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The features list:
- Boot from NOR Flash
- DDR2 266MHz hardcoded configuration
- Local bus NOR Flash R/W operation
- I2C, UART, MII and RTC
- eTSEC0/1 support
- PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
The MPC8360ERDK board support patch is added before
the commit 2c5b48fc205c3e2752910da8f39209ed075929e5
so, miss clean up it.
The patch clean up the miss cache config.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
|
|
| |
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
|
|
|
| |
adjust default environment;
disable SCC ethernet (not used on this board).
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: John Rigby <jrigby@freescale.com>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
|
|
|
|
| |
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
|
|
|
|
| |
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
|
|
|
|
| |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
| |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
|
|
| |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
|
|
| |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
|
|
| |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
|
|
| |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
|
|
| |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
|
|
|
|
|
|
| |
(1) Remove unused symbol "CFG_EEPROM_PAGE_WRITE_ENABLE".
(2) Use conditional Makefile.o.
Signed-off-by: Larry Johnson <lrj@acm.org>
|
|
|
|
|
|
|
|
|
| |
The TK885D board uses a TQM885D module from TQ, this port adds an
own configuration file and adds a last_stage_init() method to
configure the two PHYs, depending on the phy_auto_nego environment
variable.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
|
|\ |
|
| |
| |
| |
| |
| | |
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
|
|\ \ |
|
| | |
| | |
| | |
| | |
| | |
| | | |
Rework Lime support for lwmon5 using new video driver
Signed-off-by: Anatolij Gustschin <agust@denx.de>
|
| | |
| | |
| | |
| | | |
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| |/
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
vxWorks expects in
TLB 0 a entry for the Machine Check interrupt
TLB 1 a entry for the RAM
TLB 2 a entry for the EBC
TLB 3 a entry for the boot flash
After changing the baudrate to 9600 I had no problems to boot the
vxWorks image as distributed by WindRiver (Revision 2.0/1 from
June 18, 2007)
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
|
|\ \ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Format the code, make it more readable
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Reduce the AL from 2 to 1 clock to improve the performance.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
According to the latest user manual of MPC8315E,
1) The SVCOD of HRCWL is different than 837x
2) The SCCR has changes
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
The SPCR about TSEC priority is wrong.
Signed-off-by: Michael Barkowski <Michael.Barkowski@freescale.com>
Signed-off-by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Fix the typo in global_data.h
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
clean up the cache config from configs.h of board
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This is MPC8360E based board with:
- 256MB fixed SDRAM;
- 8MB Intel Strata NOR flash;
- StMICRO 64MiB NAND flash;
- two 10/100/1000 ethernet ports connected via Broadcom
BCM5481 PHYs;
- two 10/100 ethernet ports connected via National
DP83848 PHYs;
- one PCI and one miniPCI slots;
- four serial ports (two NS16550-compatible, two UCCs);
- four USB ports working through MPC8360E "FHCI" USB controller;
- Fujitsu MB86277 graphics controller;
- Analog to Digital Converter/Touchscreen controller, AD7843
connected to SPI.
Features not supported in this patch are:
- StMICRO 64MiB NAND flash (patch sent);
- MINT framebuffer initialization (patch is pending);
- Fetching production information from the EEPROM via I2C;
- FHCI USB;
- Two slow UCCs used as RS-485 UARTs.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| |/
| |
| |
| |
| |
| |
| |
| |
| | |
the new libfdt code only updates eth0 if CONFIG_HAS_ETH0
is defined; add the define to the missing board configs.
Thanks to Emilian Medve for finding this.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|\ \
| |/ |
|
| |\ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
These boards weren't updated by Kumar's config patch because they
weren't in the tree, yet.
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Define the layout of a binary blob that contains a QE firmware and instructions
on how to upload it. Add function qe_upload_firmware() to parse the blob and
perform the actual upload. Add command-line command "qe fw" to take a firmware
blob in memory and upload it. Update ft_cpu_setup() on 85xx to create the
'firmware' device tree node if U-Boot has uploaded a firmware. Fully define
'struct rsp' in immap_qe.h to include the actual RISC Special Registers.
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Either use the standard defines in asm/cache.h or grab the information
at runtime from the L1CFG SPR.
Also, minor cleanup in cache.h to make the code a bit more readable.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | |
| | | |
Add support for Instituto Atlantico's ATUM8548 board
Signed-off-by: robert lazarski <robertlazarski@gmail.com>
|
| | |
| | |
| | |
| | |
| | |
| | | |
Add support for Wind River's SBC8548 reference board.
Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
The old macros made it difficult to know what WIMGE and perm bits
were set for a TLB entry. Actually use the bit masks for these items
since they are only a single bit.
Also moved the macros into mmu.h out of e500.h since they aren't specific
to e500.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Grab the FSL Book-E MAS register macros from Linux. Also added
defines for page sizes up to 4TB and removed SHAREN since it doesnt
really exist.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| |\ \ |
|
| | |\ \
| | | |/
| | |/| |
|