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* powerpc/corenet_ds: Various updates to initial env cfgEmil Medve2010-10-07-6/+9
| | | | | | | | | | | * Make the U-Boot update command sequence conditional. Helps prevent accidental erasing if an upload or previous step fails * Make it easier to update other FLASH banks * Enable DDR controller cache line interleaving and bank cs0/cs1 by default Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* p1022ds: add audclk hwconfig setting to enable codec reference clockTimur Tabi2010-10-07-0/+1
| | | | | | | | | | | | | | | | The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference clock for the audio codec, but by default both are disabled. Add a 'audclk' hwconfig option that allows the user to choose which clock he wants. The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48, 64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and 88200Hz. Also configure a pin muxing to select some SSI signals, which will disable I2C1. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8569mds: fix consuming long time while relocating code.Haiying Wang2010-10-07-1/+2
| | | | | | | | | | | | The original code maps boot flash as non-cacheable region. When calling relocate_code in flash to copy u-boot from flash to ddr, every loop copy command is read from flash. The flash read speed will be the bottleneck, which consuming long time to do this operation. To resovle this, map the boot flash as write-through cache via tlb. And set tlb to remap the flash after code executing in ddr, to confirm flash erase operation properly done. Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8569mds: fix CONFIG_ENV_SIZEHaiying Wang2010-10-07-2/+2
| | | | | | | | | | | CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which is 128KB, so it took longer time to do crc32 calculation for ENV than it should do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size. Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2010-10-05-51/+567
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| * Blackfin: bf537-pnav: increase monitor lenMike Frysinger2010-10-02-1/+1
| | | | | | | | | | | | | | Building this board for parallel flash fills up the bss section and thus fails to link, so bump up the monitor size a bit. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf527-ad7160-eval: fix GPIO CS defineMike Frysinger2010-10-02-1/+1
| | | | | | | | | | | | Rather than use a hardcoded "7", use the new Blackfin global define. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf548-ezkit: bump SPI flash size upMike Frysinger2010-10-02-1/+5
| | | | | | | | | | | | | | | | The current size used (256KiB) is smaller than the LDR created for the bf548-ezkit, so 'run update' doesn't work correctly. So bump up the size a bit by making this flexible per-board config. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: blackvme: new board portWojtek Skulski2010-10-02-0/+246
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The board includes: * ADSP-BF561 rev. 0.5 * 32-bit SDRAM (2 * MT48LC16M16A2TG or MT48LC32M16A2TG) * Gigabit Ether AX88180 (ASIX) + 88E1111 rev. B2 (Marvell) * SPI boot flash on PF2 (M25P64 8MB, or M25P128 16 MB) * FPGA boot flash on PF3 (M25P64 8MB, or M25P128 16 MB) * Spartan6-LX150 (memory-mapped; both PPIs also connected) * See http://www.skutek.com/ Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf526-ezbrd: enable BootROM-OOB layout when booting from NANDMike Frysinger2010-10-02-2/+3
| | | | | | | | | | | | | | | | | | | | We need to use the Blackfin BootROM-specific OOB layout when we boot out of NAND as that is what the on-chip ROM expects. Also need to increase the monitor size a little to accommodate the extra NAND code overhead. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: adi config: enable nand lock/unlock supportMike Frysinger2010-10-02-0/+1
| | | | | | | | | | | | | | | | We use the lock/unlock options in our default nand code, so enabl support for the options. Reported-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bct-brettl2: new board portPeter Meerwald2010-10-02-0/+155
| | | | | | | | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: adi config: allow boards to tweak a little moreMike Frysinger2010-10-02-8/+14
| | | | | | | | | | | | Let people easily override bootdelay and network settings. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf527-sdp: new board portMike Frysinger2010-10-02-0/+121
| | | | | | | | | | | | Support for the Blackfin System Development Platform (SDP) base module. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: adi config: add a hook for boards to append the envMike Frysinger2010-10-02-1/+5
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: adi config: add an "all spi flashes" option to unify board listsMike Frysinger2010-10-02-12/+15
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: move CONFIG_BFIN_CPU to board config.mkMike Frysinger2010-10-02-25/+0
| | | | | | | | | | | | | | | | | | The CONFIG_BFIN_CPU option is largely used in the build system, so move it out of the board config.h and into the board config.mk. It'd be nice to keep everything in the config.h, but the patch to extract that value early was rejected. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-10-05-130/+346
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| * | ppc4xx: Use common ns16550 functions in 4xx UART POST driverStefan Roese2010-10-04-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the PPC4xx POST UART driver to use the common NS16550 functions for receiving and sending. Additionally the local function for SoC divisor setup are removed. Instead the functions from arch/powerpc/cpu/ppc4xx/4xx_uart.c are used. This removes code duplication. Also the common CONFIG_SYS_NS16550_COMx defines are now used to describe the POST UART's. And a compile breakage is fixed, introduced by a git merge of the ppc4xx/next branch into master. Now "ppc4xx.h" is moved to "asm/ppc4xx.h". Fixed as well with this patch. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Big lwmon5 board support rework/updateSascha Laue2010-10-04-124/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch brings the lwmon5 board support up-to-date. Here a summary of the changes: lwmon5 board port related: - GPIO's changed to control the LSB transmitter - Reset USB PHY's upon power-up - Enable CAN upon power-up - USB init error workaround (errata CHIP_6) - EBC: Enable burstmode and modify the timings for the GDC memory - EBC: Speed up NOR flash timings lwmon5 board POST related: - Add FPGA memory test - Add GDC memory test - DSP POST reworked - SYSMON POST: Fix handling of negative temperatures - Add output for sysmon1 POST - HW-watchdog min. time test reworked Additionally some coding-style changes were done. Signed-off-by: Sascha Laue <sascha.laue@liebherr.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | APM821xx: Add bluestone board supportTirumala Marri2010-10-04-0/+178
| |/ | | | | | | | | | | | | | | | | Add support code for bluestone board wth APM821XX processor based. This patch includes early board init, misc init, configure EBC, initializes UIC, MAKEALL, board.cfg and MAINTAINERS file. Signed-off-by: Tirumala R Marri <tmarri@apm.com Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'next' of git://git.denx.de/u-boot-videoWolfgang Denk2010-10-05-5/+75
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| * atmel_lcd: Allow contrast polarity to be either positive or negativeAlexander Stein2010-09-25-0/+1
| | | | | | | | Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
| * p1022ds: use weak CFI flash accessors when DIU is enabledTimur Tabi2010-09-25-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the Freescale P1022, the DIU and the LBC share address pins, which means that when the DIU is active (e.g. the console is on the DVI display), NOR flash cannot be accessed. So we use the weak accessor function feature of the CFI flash code to temporarily switch the pin mux from DIU to LBC whenever we want to read or write flash. This has a significant performance penalty, but it's the only way to make it work. This change allows the 'saveenv' command to work when the video display is enabled. Erasing flash and writing to flash (with the 'cp' command) works, but reading from flash (with the 'md' and 'cp' commands) does not. Also, while flash is being written, the video display will be blank. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * p1022ds: add video supportTimur Tabi2010-09-25-5/+8
| | | | | | | | | | | | | | | | Add support for the DIU controller. If CONFIG_VIDEO is defined, then the console will appear on a DVI monitor instead of the serial port. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * fsl_diu_fb: further refactoring of FSL DIU codeAnatolij Gustschin2010-09-25-0/+60
| | | | | | | | | | | | | | | | Move common code to the fsl_diu_fb.c file and remove obsolete code from board files (aria, mpc8610hpcd and pdm360ng). Move fsl_diu_fb.h file to the include directory. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Merge branch 'next' of /home/wd/git/u-boot/nextWolfgang Denk2010-09-28-5166/+3035
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: include/ppc4xx.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | Add support for operating system OSETorkel Lundgren2010-09-28-0/+2
| |/ | | | | | | | | | | Add OSE as operating system for mkimage and bootm. Signed-off-by: Torkel Lundgren <torkel.lundgren@enea.com>
| * 83xx: Remove warmboot parameter from PCI init functionsPeter Tyser2010-09-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This change lays the groundwork for the BOOTFLAG_* flags being removed. This change has the small affect of delaying 100ms on PCI initialization after a warm boot as opposed to the optimal 1ms on some boards. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> included the mpc8308_p1m board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: extend CONFIG_SYS_BOOTMAPSZ increase to mpc8308_p1mKim Phillips2010-09-23-1/+1
| | | | | | | | | | | | | | continuation of commit 39da1ba923d55f316f9f1bb3a960e4ed91dc17ac: "e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernels" Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc8308_p1m: support for MPC8308 P1M boardIlya Yanok2010-09-23-0/+555
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support for MPC8308 P1M board with the following set of features: Dual UART is supported NOR flash is supported Both TSEC Ethernet controllers are supported PCI Express initialization is supported Both I2C controllers are supported Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * MPC8308RDB: various clean upsIlya Yanok2010-09-23-20/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans up the Freescale MPC8308RDB Development board support. Things fixed: - Removed unused PCIE2 definitions from configuration - SICR{L,H} defines used for System I/O Configuration Registers values instead of hardcoding - CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of writing to SCCR from the board code - sleep mode stuff removed as MPC8308 has no support for deep sleep and PMCCR1 register. board_early_init_f() removed. - MPC8308 has no ERRATA for DDR controller so workaround removed - 'assignment in if statement' issues solved - use LBLAWAR_* defines instead of hardcoding Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc8308: add SICR{L,H} fields definitionsIlya Yanok2010-09-23-0/+48
| | | | | | | | | | | | | | | | This patch adds defines to set supported fields in System I/O Configuration Registers High and Low on Freescale MPC8308 CPU. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernelsIra W. Snyder2010-09-23-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer Linux kernels can overrun the initial memory window used for booting with their BSS area. When this happens, they overwrite the FDT and silently fail to boot. On e300 CPUs, the Linux kernel uses an initial BAT covering the first 256MB of RAM. See arch/powerpc/kernel/head_32.S for details. Increase the value of CONFIG_SYS_BOOTMAPSZ to accommodate the maximum value allowed by Linux. This will allow very large kernels to boot. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc831xerdb: enable mtdparts for NANDScott Wood2010-09-23-2/+16
| | | | | | | | | | | | | | | | | | The default partition table matches the .dts files for these boards in Linux. This allows these partitions to be used by name with U-Boot's "nand" command. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * ppx4xx: remove unused functionality for DU405 boardsMatthias Fuchs2010-09-23-26/+5
| | | | | | | | | | | | | | | | Remove some unused functionality to make U-Boot build again. Especially PCI is not used on the board. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
| * Remove unused CONFIG_SERIAL_SOFTWARE_FIFO featureStefan Roese2010-09-23-98/+0
| | | | | | | | | | | | | | | | | | This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO feature from U-Boot. It has only been implemented for PPC4xx and was not used at all. So let's remove it and make the code smaller and cleaner. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
| * ppc4xx: Use common NS16550 driver for PPC4xx UARTStefan Roese2010-09-23-96/+341
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the PPC4xx UART driver. Instead the common NS16550 driver is used, since all PPC4xx SoC's use this peripheral device. The file 4xx_uart.c now only implements the UART clock calculation function which also sets the SoC internal UART divisors. All PPC4xx board config headers are changed to use this common NS16550 driver now. Tested on these boards: acadia, canyonlands, katmai, kilauea, sequoia, zeus Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup part 2, mostly PPC405 relatedStefan Roese2010-09-23-80/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. As a part from this cleanup, the GPIO definitions for PPC405EP are corrected. The high and low parts of the registers (for example CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in the wrong order. This patch now fixes this issue by switching these xxxH and xxxL values. This brings the GPIO 405EP port in sync with all other PPC4xx ports. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup, mostly PPC440 relatedStefan Roese2010-09-23-11/+0
| | | | | | | | | | | | | | | | | | | | | | This patch starts a bit PPC4xx header cleanup. First patch mostly touches PPC440 files. A later patch will touch the PPC405 files as well. This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Move ppc4xx headers to powerpc include directoryStefan Roese2010-09-23-3834/+1
| | | | | | | | | | | | | | | | | | This patch moves some ppc4xx related headers from the common include directory (include/) to the powerpc specific one (arch/powerpc/include/asm/). This way to common include directory is not so cluttered with files. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Remove unreferenced file include/405_dimm.hStefan Roese2010-09-23-4/+0
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo ↵Timur Tabi2010-09-21-3/+8
| | | | | | | | | | | | | | | | | | | | features The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO). So delete the 8610-specific code and use the built-in features instead. Signed-off-by: Timur Tabi <timur@freescale.com>
| * arm: Make jadecpu board use relocationMatthias Weisser2010-09-21-0/+3
| | | | | | | | | | | | | | This patch modifies jadecpu board so that it is usable with the relocation patches by Heiko Schocher Signed-off-by: Matthias Weisser <weisserm@arcor.de>
| * Merge branch 'next' of ../custodians into nextWolfgang Denk2010-09-21-2/+1683
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| | * Merge branch 'next' of git://git.denx.de/u-boot-usb into nextWolfgang Denk2010-09-21-2/+1683
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| | | * USB-CDC: Fix coding style issuesVitaly Kuzmichev2010-09-20-77/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes most of checkpatch warnings and errors in USB gadget stack. The most frequently encountered problems are: 1) "(foo*)", "foo * bar", "foo* bar" 2) C99 // comments 3) No spaces before/after/around '?', ':', '=', '==', ',', '&', '(' 4) Spaces before '[' 5) Spaces between function names and '(' 6) Block braces in wrong places 7) Spaces before tabs 8) Macros with complex values not enclosed in parenthesis 9) Multiline comments start just after /* Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
| | | * Integrate USB gadget layer and USB CDC driver layerRemy Bohmer2010-09-20-2/+1697
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Derived from Linux kernel 2.6.27 Signed-off-by: Thomas Smits <ts.smits@gmail.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
| * | | Merge branch 'next' of ../custodians into nextWolfgang Denk2010-09-21-12/+21
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| | * | cfi_flash: Simplify dynamic flash bank number detectionStefan Roese2010-09-20-12/+21
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By moving these optional variables and defines into the common code, board specific code is minimized. Currently only the following board use this feature: APC405, IDS8247, TQM834x And IDS8247 doesn't seem to really need this feature, since its not updating the bank number variable at all. So this patch removes the definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port. This new framework will be used by the upcoming lwmon5 update as well. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
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