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* 83xx: fix CFG_ENV_ADDR and CFG_ENV_SECT_SIZE definitionsTimur Tabi2008-01-08-9/+14
| | | | | | | | | Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the currently-defined 83xx boards. This change guarantees that the environment will be located on the first flash sector after the U-Boot image. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-01-08-3/+241
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| * Merge branch 'katmai-ddr-gda'Stefan Roese2008-01-05-2/+11
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| | * ppc4xx: Update Katmai/44x_spd_ddr2.c code for optimal DDR2 setupStefan Roese2008-01-05-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Katmai the complete auto-calibration somehow doesn't seem to produce the best results, meaning optimal values for RQFD/RFFD. This was discovered by GDA using a high bandwidth scope, analyzing the DDR2 signals. GDA provided a fixed value for RQFD, so now on Katmai "only" RFFD is auto-calibrated. This patch also adds RDCC calibration as mentioned on page 7 of the AMCC PowerPC440SP/SPe DDR2 application note: "DDR1/DDR2 Initialization Sequence and Dynamic Tuning" Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Use CFG_4xx_GPIO_TABLE to configure Korat boardLawrence R. Johnson2008-01-04-1/+152
| | | | | | | | | | | | Signed-off-by: Larry Johnson <lrj@acm.org>
| * | ppc4xx: Use CFG_4xx_GPIO_TABLE to configure Sequoia boardLawrence R. Johnson2008-01-04-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note: this patch changes the configuration of some GPIO registers: Register Old Value New Value --------------- ---------- ---------- DCR GPIO0_TCR 0x0000000F 0x0000F0CF DCR GPIO0_TSRH 0x55005000 0x00000000 DCR GPIO1_TCR 0xC2000000 0xE2000000 DCR GPIO1_TSRL 0x0C000000 0x00200000 DCR GPIO1_ISR2L 0x00050000 0x00110000 Signed-off-by: Larry Johnson <lrj@acm.org>
| * | ppc4xx: Add functionality to GPIO supportLawrence R. Johnson2008-01-04-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes two additions to GPIO support: First, it adds function gpio_read_in_bit() to read the a bit from the GPIO Input Register (GPIOx_IR) in the same way that function gpio_read_out_bit() reads a bit from the GPIO Output Register (GPIOx_OR). Second, it modifies function gpio_set_chip_configuration() to provide an additional option for configuring the GPIO from the "CFG_4xx_GPIO_TABLE". According to the 440EPx User's Manual, when an alternate output is used, the three-state control is configured in one of two ways, depending on the particular output. The first option is to select the corresponding alternate three-state control in the GPIOx_TRSH/L registers. The second option is to select the GPIO Three-State Control Register (GPIOx_TCR) in the GPIOx_TRSH/L registers, and set the corresponding bit in the GPIOx_TCR register to enable the output. For example, the Manual specifies configuring the GPIO00 Alternate 1 Signal (PreAddr07) to use the alternate three-state control (first option), and specifies configuring the GPIO32 Alternate 1 Signal (USB2OM0) with the output enabled in the GPIOx_TCR register (second option). Currently, gpio_set_chip_configuration() configures all alternate signal outputs to use the first option. This patch allow the second option to be selected by setting the "out_val" element in the table entry to "GPIO_OUT_1". The first option is used when the "out_val" element is set to "GPIO_OUT_0". Because "out_val" is not currently used when an alternate signal is selected, and because all current GPIO tables set "out_val" to "GPIO_OUT_0" for all alternate signals, this patch should not change any existing configurations. Signed-off-by: Larry Johnson <lrj@acm.org>
* | Introduce new eth_receive routineRafal Jaworowski2008-01-03-0/+3
|/ | | | | | | | | | | | | | The purpose of this routine is receiving a single network frame, outside of U-Boot's NetLoop(). Exporting it to standalone programs that run on top of U-Boot will let them utilise networking facilities. For sending a raw frame the already existing eth_send() can be used. The direct consumer of this routine is the newly introduced API layer for external applications (enabled with CONFIG_API). Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Don't slam #undef DEBUG in the 8641HPCN config file.Jon Loeliger2008-01-03-1/+0
| | | | | | | Doing so prevents it from being individually set and useful in other files. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Convert MPC8641HPCN to use libfdt.Jon Loeliger2008-01-03-12/+9
| | | | | | | | | Assumes the presence of the aliases node in the DTS to locate the ethernet, pci and serial nodes for fixups. Use consistent fdtaddr and fdtfile in environment variables. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Merge commit 'wd/master'Jon Loeliger2008-01-03-1825/+7904
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| * Fix compile problem introduced by "cleanup" commit 3dfd708cWolfgang Denk2008-01-02-2/+2
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * Minor coding style cleanup.Wolfgang Denk2008-01-02-2/+2
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * ppc4xx: Complete PMC440 board supportMatthias Fuchs2007-12-28-0/+522
| | | | | | | | | | | | | | This patch brings the PMC440 board configuration file. Finally it enables the PMC440 board support. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * ppc4xx: Add EEPROM write protection for PLU405 boards + misc. updatesMatthias Fuchs2007-12-28-2/+4
| | | | | | | | | | | | | | | | | | - add EEPROM write protection for esd PLU405 boards. - initialize NAND GPIOs - use correct io accessors - cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * ppc4xx: Maintenance patch for VOH405 boardsMatthias Fuchs2007-12-28-20/+11
| | | | | | | | | | | | | | | | | | | | | | - add EEPROM write protection - initialize NAND GPIOs - use correct io accessors - slow down I2C clock to 100kHz - enable ext. I2C bus - cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * Merge branch 'master' of /home/stefan/git/u-boot/u-boot into for-1.3.2-ver2Stefan Roese2007-12-27-392/+4385
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| | * Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2007-12-27-102/+162
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| | | * Some configuration updates for the TQM5200 based TB5200 board:Martin Krause2007-12-27-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - enable command line history - increase malloc space (because of bigger flash sectors) Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | | * TQM8xx: use the CFI flash driver on all TQM8xx boardsMartin Krause2007-12-27-64/+116
| | | | | | | | | | | | | | | | Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | | * TQM885D: adjust for doubled flash sector size + some minor fixesMartin Krause2007-12-27-11/+18
| | | | | | | | | | | | | | | | Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | | * TQM885D: Exchanged SDRAM timing by a more relaxed timing.Jens Gehrlein2007-12-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CAS-Latency=2, Write Recovery Time tWR=2 The max. supported bus frequency is 66 MHz. Therefore, changed threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | | * TQM885D: use calculated cpuclk instead of measuring itMartin Krause2007-12-27-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the TQM885D the measurement of cpuclk with the PIT reference timer ist not necessary. Since all module variants use the same external 10 MHz oscillator, the cpuclk only depends on the PLL configuration - which is readable by software. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | | * TQM885D: fix SDRAM refreshJens Gehrlein2007-12-27-16/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At 133 MHz the current SDRAM refresh rate is too fast (measured 4 * 1.17 us). CFG_MAMR_PTA changes from 39 to 128. This result in a refresh rate of 4 * 7.8 us at the default clock 66 MHz. At 133 MHz the value will be then 4 * 3.8 us. This is a compromise until a new method is found to adjust the refresh rate. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | | * TQM860M: Support for 10col SDRAMs, max. 128 MiBJens Gehrlein2007-12-27-2/+5
| | | | | | | | | | | | | | | | Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * | Fix coding style issues; update CHANGELOG.Wolfgang Denk2007-12-27-64/+45
| | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| | * | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2007-12-27-0/+3362
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| | | * Merge branch 'master' of git://www.denx.de/git/u-boot-shWolfgang Denk2007-12-27-0/+3362
| | | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS Signed-off-by: Wolfgang Denk <wd@denx.de>
| | | | * Merge git://www.denx.de/git/u-bootNobuhiro Iwamatsu2007-12-07-1/+1
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| | | | * \ Merge git://www.denx.de/git/u-bootNobuhiro Iwamatsu2007-12-07-95/+657
| | | | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/Makefile
| | | | * \ \ Merge git://www.denx.de/git/u-bootNobuhiro Iwamatsu2007-11-29-580/+1096
| | | | |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/Makefile
| | | | * | | | sh: Add support Renesas sh7722 processor and Hitachi MS7722SE01 boardNobuhiro Iwamatsu2007-09-23-0/+1474
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | | * | | | sh: Update MS7750SE01 platformNobuhiro Iwamatsu2007-09-23-23/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | | * | | | sh: Remove comment out code from include/asm-sh/cpu_sh4.hNobuhiro Iwamatsu2007-09-23-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | | * | | | sh: Update core code of SuperH.Nobuhiro Iwamatsu2007-09-23-211/+704
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | | * | | | Merge git://www.denx.de/git/u-bootNobuhiro Iwamatsu2007-09-23-8880/+33408
| | | | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: CREDITS
| | | | * | | | | sh: MS7750SE support.Nobuhiro Iwamatsu2007-05-13-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Hitachi MS7750SE. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | | | * | | | | sh: First support code of SuperH.Nobuhiro Iwamatsu2007-05-13-0/+1294
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| | * | | | | | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2007-12-27-0/+419
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| | | * | | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-avr32Wolfgang Denk2007-12-27-0/+419
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| | | | * | | | | | AVR32: Add support for the ATSTK1004 boardHaavard Skinnemoen2007-12-17-0/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ATSTK1004 is a daughterboard for ATSTK1000 with the AT32AP7002 CPU, which is a derivative of AT32AP7000. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | | * | | | | | AVR32: Add support for the ATSTK1003 boardHaavard Skinnemoen2007-12-17-0/+184
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ATSTK1003 is a daughterboard for ATSTK1000 with the AT32AP7001 CPU, which is a derivative of AT32AP7000. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | | * | | | | | AVR32: Make some AT32AP700x peripherals optionalHaavard Skinnemoen2007-12-17-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a chip-features file providing definitions of the form AT32AP700x_CHIP_HAS_<peripheral> to indicate the availability of the given peripheral on the currently selected chip. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | | | * | | | | | AVR32: Rename at32ap7000 -> at32ap700xHaavard Skinnemoen2007-12-17-0/+0
| | | | | |_|_|_|/ | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SoC-specific code for all the AT32AP700x CPUs is practically identical; the only difference is that some chips have less features than others. By doing this rename, we can add support for the AP7000 derivatives simply by making some features conditional. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| | * | | | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2007-12-27-289/+121
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| | | * | | | | | Handle MPC85xx PCIe reset errata (PCI-Ex 38)Kumar Gala2007-12-11-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the MPC85xx boards that have PCIe enable the PCIe errata fix. (MPC8544DS, MPC8548CDS, MPC8568MDS). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | | * | | | | | Update Freescale MPC85xx ADS/CDS/MDS board configKumar Gala2007-12-11-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Enabled CONFIG_CMD_ELF Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | | * | | | | | Handle Asynchronous DDR clock on 85xxKumar Gala2007-12-11-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MPC8572 introduces the concept of an asynchronous DDR clock with regards to the platform clock. Introduce get_ddr_freq() to report the DDR freq regardless of sync/async mode. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | | * | | | | | Update Freescale MPC85xx ADS/CDS/MDS board configKumar Gala2007-12-11-88/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Removed some misc environment setup * Enabled CONFIG_CMDLINE_EDITING Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | | * | | | | | Use standard LAWAR_TRGT_IF_* defines for LAW setup on 85xxKumar Gala2007-12-11-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already had defines for LAWAR_TRGT_IF_* that we should use rather than creating new ones. Also, added some missing defines for PCIE targets. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2024-11-07 20:31:52 +0000