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* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-04-29-5/+70
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| * ARM: zynq: move SoC sources to mach-zynqMasahiro Yamada2015-04-29-2/+2
| | | | | | | | | | | | | | Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/* Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Enable SDHCI0 optionsMichal Simek2015-04-29-0/+2
| | | | | | | | | | | | | | Enable SDHCI0 for zynqmp. Add empty gpio.h because of sdhci requirement. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Enable FS_GENERIC optionSiva Durga Prasad Paladugu2015-04-29-2/+3
| | | | | | | | | | | | | | Provide an option to write filesystem independend commands. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Add SPI driver support for ZynqMPSiva Durga Prasad Paladugu2015-04-29-0/+7
| | | | | | | | | | | | | | | | | | Added the SPI driver support for ZynqMP The controller is same as zynq SPI controller Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * zynqmp: i2c: Enable i2c driver for zynqMPSiva Durga Prasad Paladugu2015-04-29-0/+23
| | | | | | | | | | | | | | | | | | | | Enable the i2c driver for ZynqMP Also enable the eeprom for read and writes to eeprom on ZynqMP ZynqMP uses the same i2c controller as in Zynq Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Add support for R5 sw loadingMichal Simek2015-04-29-0/+2
| | | | | | | | | | | | | | Add support for loading sw for R5 with enabling for zynqmp. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * zynqmp: caches: Enable dcache for zynqmpSiva Durga Prasad Paladugu2015-04-29-1/+1
| | | | | | | | | | | | | | | | Define the mmu table till 2MB granularity enable dcaches for zynqmp. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: Add Zynq PicoZed board supportNathan Rossi2015-04-29-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PicoZed is a System-on-Module board which is marketed as part of the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000 processor. This patch adds support that covers all the variants of the PicoZed including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This patch set however only covers support for the System-on-Module and does not cover any extra components that are available on carrier boards (except those that are fanned out of the module itself). More information on this board, its variants and available carrier boards is available at: http://zedboard.org/product/picozed Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: Enable GPIO driver and GPIO commandsMichal Simek2015-04-29-0/+3
| | | | | | | | | | | | Enable GPIO driver and GPIO commands. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-socfpgaTom Rini2015-04-28-1/+7
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| * | arm: socfpga: spl: Adjust the SYS_INIT_RAM_SIZE to have room for the spl mallocDinh Nguyen2015-04-21-1/+1
| | | | | | | | | | | | | | | | | | | | | We need to adjust the SYS_INIT_RAM_SIZE to have room for the SPL_MALLOC_SIZE. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: spl: add CONFIG_SPL_STACK to socfpga_common.hDinh Nguyen2015-04-21-0/+5
| | | | | | | | | | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: spl: Add CONFIG_SPL_MAX_SIZE to be 64KBDinh Nguyen2015-04-21-0/+1
| | | | | | | | | | | | | | | | | | The Cyclone5 SoCFPGA has 64KB of OCRAM for SPL use. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-04-28-65/+326
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| * | mx6cuboxi: Load the correct 'fdtfile' variableFabio Estevam2015-04-27-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of hardcoding the 'fdtfile' variable, let's detect the SoC and board variant on the fly and change the dtb name. Based on the scheme done on am335x board. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | mx6cuboxi: Use more standard namings for fdt variablesFabio Estevam2015-04-27-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | README file suggests to use 'fdtfile' for the dtb file name and 'fdt_addr_r' for the dtb address in RAM, so do as suggested. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | nitrogen6x: allow gzipped bitmap displayEric Nelson2015-04-22-0/+3
| | | | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * | arm: mx6: tqma6: Extract baseboard configs into separate config fileStefan Roese2015-04-22-41/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extracts all baseboard specific defines into a separate config file. This makes it easier to add other baseboards that use the TQMa6 SoM. This patch will be used by the upcoming WRU-IV board support which also uses the TQMa6 SoM. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Stefano Babic <sbabic@denx.de> Acked-By: Markus Niebel <Markus.Niebel@tq-group.com>
| * | power: pfuze100: fix LDO_EN bit valueTim Harvey2015-04-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The LDO_EN is bit 4, not value 4. This is only used on the Ventana boards so we will change it in the header as the other values there are in terms of values and not bit numbers. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: update boot scripts to support ubifs boot volTim Harvey2015-04-22-17/+27
| | | | | | | | | | | | | | | | | | | | | Added support in default boot scripts to find kernel/dtbs on a boot volume separate from rootfs volume. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: add usb_pgood_delay 2sec defaultTim Harvey2015-04-22-0/+1
| | | | | | | | | | | | | | | | | | | | | We have encountered many USB storage devices that require more warm-up than the spec allows for. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: config: enable EXT4 filesystem read/write supportTim Harvey2015-04-22-0/+2
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: config: enable edid supportTim Harvey2015-04-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the 'i2c edid' command to query and display data from an attached HDMI monitor of LVDS display with an EDID device. Example: Ventana > i2c dev 2 && i2c edid 0x50 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: config: Support ramdiskTim Harvey2015-04-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Set the initrd_high env so that ramdisk range can be properly set. See commit 7e9603e and README Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: config: add USB Mass Storage (ums) supportTim Harvey2015-04-22-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the USB mass storage gadget to enable access to on-board storage. Example: Ventana > ums 0 mmc 0 # provide ums access to the uSD Ventana > ums 0 usb 0 # provide ums access to the first USB device Ventana > ums 0 sata 0 # provide ums access to an mSATA device Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: assign default ethprime dynamicallyTim Harvey2015-04-22-1/+0
| | | | | | | | | | | | | | | | | | | | | Gateworks Ventana boards don't all use IMX6 FEC, so lets define default ethprime based off the first detected device. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: add i210 supportTim Harvey2015-04-22-0/+1
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | imx: ventana: disable 4k tftp/nfs packetsTim Harvey2015-04-22-5/+0
| | | | | | | | | | | | | | | | | | | | | I've encountered issues when using 4k packets through certain switches. For now disable this and go back to using MTU size packets. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | mx6: Add initial SPL support for HummingBoard-i2eXFabio Estevam2015-04-22-0/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the initial SPL support for HummingBoard-i2eX, which is based on a MX6 Dual. For more information about HummingBoard, please check: http://www.solid-run.com/products/hummingboard/ Based on the work from Jon Nettleton and Rabeeh Khoury. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | fdt: add new fdt_fixup_display function to configure displayTim Harvey2015-04-22-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 'fdt_fixup_display' function to fixup device-tree native-mode property of display-timings node to select timings for a specific display. This is useful if a device-tree has configurations for multiple display timings for undetectable displays. see kernel Documentation/devicetree/bindings/video/display-timing.txt Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-04-28-15/+15
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| * | | dm: sf: Save flash flags to struct spi_flashBin Meng2015-04-28-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new member 'flags' in struct spi_flash to store the flash flags during spi_flash_validate_params(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | dm: spi: Correct SPI claim/release_bus() methodsSimon Glass2015-04-23-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These methods should be passed a slave device, not a bus. This matches the old SPI interface. It is important to know which device is claiming the bus so passing a bus is not that useful. Reported-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | spi flash: fix trivial problemsPavel Machek2015-04-22-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix typos and too big #ifdef. Signed-off-by: Pavel Machek <pavel@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | sf: Correct the macros as per new array fast read commandSiva Durga Prasad Paladugu2015-04-22-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the macros as per insertion of array fast read command CMD_READ_ARRAY_FAST in spi_read_cmds_array in file sf_probe.c Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-04-24-257/+4109
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| * | | | ls2085a: esdhc: Add esdhc support for ls2085aYangbo Lu2015-04-23-4/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds esdhc support for ls2085a. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | armv8/ls2085ardb: Enable NAND SPL supportScott Wood2015-04-23-5/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable NAND boot support using SPL framework. To boot from NAND, either use DIP switches on board, or "qixis_reset nand" command. Details of forming NAND image can be found in README. Signed-off-by: Scott Wood <scottwood@freescale.com> [York Sun: Remove +S from defconfig after commit 252ed872] Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | armv8/ls2085aqds: NAND boot supportScott Wood2015-04-23-5/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds NAND boot support for LS2085AQDS, using SPL framework. Details of forming NAND image can be found in README. Signed-off-by: Scott Wood <scottwood@freescale.com> [York Sun: Remove +S from defconfig after commit 252ed872] Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | driver/ifc: Add 64KB page supportJaiprakash Singh2015-04-23-28/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC has two register pages.Till IFC version 1.4 each register page is 4KB each.But IFC ver 2.0 register page size is 64KB each.IFC regiters structure is break into two viz FCM and RUNTIME.FCM(Flash control machine) registers are defined in PAGE0 and controls IFC generic functionality. RUNTIME registers are defined in PAGE1 and controls NAND and GPCM funcinality. FCM and RUNTIME structures defination is common for IFC version 1.4 and 2.0. Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | board/ls2085qds: Add support ethernetPrabhakar Kushwaha2015-04-23-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of ethernet: - eth.c: mapping lane to slot for (0x2A, 0x07) - ls2085a.c: To enable/disable dpmac and get link type Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | armv8/ls2085ardb: Add support of LS2085ARDB platformYork Sun2015-04-23-0/+266
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LS2085ARDB is a evaluation platform that supports LS2085A family SoCs. This patch add sbasic support for the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | | armv8/ls2085aqds: Add support of LS2085AQDS platformYork Sun2015-04-23-7/+315
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LS2085AQDS is an evaluatoin platform that supports the LS2085A family SoCs. This patch add basic support of the platform. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
| * | | | driver/ldpaa: Add support of WRIOP static data structurePrabhakar Kushwaha2015-04-23-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire rate IO Processor (WRIOP) provide support of receive and transmit ethernet frames from the ethernet MAC. Here Each WRIOP block supports upto 64 DPMACs. Create a house keeping data structure to support upto 16 DPMACs and store external phy related information. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | net/memac_phy: reuse driver for little endian SoCsShaohui Xie2015-04-23-0/+264
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memac for PHY management on little endian SoCs is similar on big endian SoCs, so we modify the driver by using I/O accessor function to handle the endianness, so the driver can be reused on little endian SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access is little endian, if not, the I/O access is big endian. Move fsl_memac.h out of powerpc include. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | drivers/fsl-mc: Changed MC firmware loading for new boot architectureJ. German Rivera2015-04-23-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changed MC firmware loading to comply with the new MC boot architecture. Flush D-cache hierarchy after loading MC images. Add environment variables "mcboottimeout" for MC boot timeout in milliseconds, "mcmemsize" for MC DRAM block size. Check MC boot status before calling flib functions. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | armv8: Add SerDes framework for Layerscape ArchitectureMinghuan Lian2015-04-23-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of SerDes framework for Layerscape Architecture. - Add support of 2 SerDes block - Add SerDes protocol parsing and detection - Create table of SerDes protocol supported by LS2085A Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | armv8/ls2085a: Fix generic timer clock sourceYork Sun2015-04-23-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timer clock is system clock divided by 4, not fixed 12MHz. This is common to the SoC, not board specific. Primary core is fixed when u-boot still runs in board_f. Secondary cores are fixed by reading a variable set by u-boot. Signed-off-by: York Sun <yorksun@freescale.com> CC: Mark Rutland <mark.rutland@arm.com>
| * | | | armv8/ls2085a: Update common header filePrabhakar Kushwaha2015-04-23-109/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ls2085a_common.h contains hard-coded information for NOR/NAND flash, I2C, DDR, etc. These are platform specific. Move them out of common header file and placed into respective board header files. Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector size. Enable command auto complete. Update prompt symbol. Set fdt_high to 0xa0000000 because Linux requires that the fdt be 8-byte aligned and below 512 MiB. Besides ensuring compliance with the 512 MiB limit, this avoids problems with the dtb being misaligned within the FIT image. Change the MC FW, MC DPL and Debug server NOR addresses in compliance with the NOR flash layouts for 128MB flash. Add PCIe macros. Enable "loadb" command. Disable debug server. Enable workaround for erratum A008511. Stop reset on panic for postmortem debugging. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-11-05 08:33:20 +0000