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| * | | Merge branch 'master' of git://git.denx.de/u-boot-blackfin into ↵Tom Rini2013-05-14-29/+50
| |\ \ \ | | |/ / | |/| | | | | | powerpc-eldk53-warning-fixes
| | * | bfin: Move gpio support for bf54x and bf60x into the generic driver folder.Sonic Zhang2013-05-13-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx. A lot of machine macros are used to accomodate both code in one gpio driver. This patch split the old gpio driver and move new gpio2 support to the generic gpio driver folder. - To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's config header file. - The gpio2 driver supports bf54x, bf60x and future ADI processors, while the older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561. - All blackfin specific gpio function names are replaced by the generic gpio APIs. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| | * | blackfin: Move blackfin serial driver out of blackfin arch folder.Sonic Zhang2013-05-13-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Move blackfin serial driver to the generic driver folder. - Move blackfin serial headers to blackfin arch head folder. - Update the include path to blackfin serial header in start up code. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| | * | blackfin: Move blackfin watchdog driver out of the blackfin arch folder.Sonic Zhang2013-05-13-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined. - Move blackfin hw watchdog driver to the generic driver folder. - Call hw_watchdog_init() from blackfin board init code. - Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS - Update README.watchdog accordingly Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| | * | blackfin: Enable early print via the generic serial API.Sonic Zhang2013-05-13-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove blackfin specific implementation of the generic serial API when early print macro is defined. In BFIN_BOOT_BYPASS mode, don't call generic serial_puts, because early print in bypass mode is running before code binary is relocated to the link address. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| | * | blackfin: Fit u-boot image size into limited nor flash on blackfin.Sonic Zhang2013-05-13-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Disable NAND driver on bf537-stamp. - Make MMC_SPI optional. - Disable LCD driver on bf527-ezkit. - Enlarge BF609 nor flash reserved size from 256k to 512k bytes. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
| | * | blackfin: bf609: add softswitch config commandBob Liu2013-05-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add softswitch_output command for bf609-ezkit to enable softswitches. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| | * | blackfin: run core1 from L1 code sram start address in uboot init code on core 0Sonic Zhang2013-05-13-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define core 1 L1 code sram start address. Add function to enable core 1 for BF609 and BF561. Add config macro to allow customer to run core 1 in uboot init code on core 0. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| | * | blackfin: reduce size of u-boot.ldr in bf548-ezkit default config.Bob Liu2013-05-13-14/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable VIDEO and NAND supports only when the config options is defined. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * | | x86: config: Enable LZO for coreboot, remove zlib, gzipSimon Glass2013-05-13-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | We don't use zlib and gzip but do use lzo, so enable this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | bootstage: Allow marking a particular line of codeSimon Glass2013-05-13-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function which allows a (file, function, line number) to be marked in bootstage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
| * | | x86: Enable bootstage for corebootSimon Glass2013-05-13-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a convenient way of finding out where boottime is going. Enable it for coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | bootstage: Copy bootstage strings post-relocationDoug Anderson2013-05-13-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Any pointers to name strings that were passed to bootstage_mark_name() pre-relocation should be copied post-relocation so that they don't get trashed as the original location of U-Boot is re-used for other purposes. This change introduces a new API call that should be called from board_init_r() after malloc has been initted on any board that uses bootstage. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | bootstage: Add stubs for new bootstage functionsSimon Glass2013-05-13-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some functions don't have a stub for when CONFIG_BOOTSTAGE is not defined. Add one to avoid #ifdefs in the code when this is used in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
| * | | x86: Re-enable PCAT timer 2 for beepingSimon Glass2013-05-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While we don't want PCAT timers for timing, we want timer 2 so that we can still make a beep. Re-purpose the PCAT driver for this, and enable it in coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | x86: Add TSC timerSimon Glass2013-05-13-3/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Move FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.hGerald Van Baren2013-05-10-2/+3
| | | | | | | | | | | | | | | | | | | | | The define should not have been put in fdt.h originally, libfdt_env.h is the proper place for target-specific customizations. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
| * | Added license header to dtc/libfdt/fdt.h and libfdt_env.hJustin Sobota2013-05-10-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds a license header to fdt.h and libfdt_env.h because the license was omitted. U-Boot note: the u-boot libfdt_env.h header portion was not applied to the u-boot libfdt_env.h because that file was created by Gerald Van Baren (with a license header). - gvb Ref: DTC commit 27cdc1b1 Signed-off-by: Justin Sobota <jsobota@ti.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
| * | Fix typoFrançois Revol2013-05-10-1/+1
| | | | | | | | | | | | | | | | | | Ref: DTC commit cc11e522 Signed-off-by: François Revol <revol@free.fr>
| * | Export fdt_stringlist_contains()Simon Glass2013-05-10-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | This function is useful outside libfdt, so export it. Ref: DTC commit b7aa300e Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Gibson <david@gibson.dropbear.id.au>
| * | fs/ext4: Support device block sizes != 512 bytesEgbert Eich2013-05-10-9/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The 512 byte block size was hard coded in the ext4 file systems. Large harddisks today support bigger block sizes typically 4096 bytes. This patch removes this limitation. Signed-off-by: Egbert Eich <eich@suse.com>
| * | gpio: Add support for microblaze xilinx GPIOMichal Simek2013-05-09-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze uses gpio which is connected to the system reset. Currently gpio subsystem wasn't used for it. Add gpio driver and change Microblaze reset logic to be done via gpio subsystem. There are various configurations which Microblaze can have that's why gpio_alloc/gpio_alloc_dual(for dual channel) function has been introduced and gpio can be allocated dynamically. Adding several gpios IP is also possible and supported. For listing gpio configuration please use "gpio status" command This patch also remove one compilation warning: microblaze-generic.c: In function 'do_reset': microblaze-generic.c:38:47: warning: operation on '*1073741824u' may be undefined [-Wsequence-point] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | Merge branch 'master' of git://www.denx.de/git/u-boot-mmcTom Rini2013-05-07-0/+30
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| | * | mmc: Split device init to decouple OCR-polling delayChe-Liang Chiou2013-05-06-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of time that MMC driver spends on initializing a device is polling OCR (operation conditions register). To decouple this polling loop, device init is split into two parts: The first part fires the OCR query command, and the second part polls the result. So the caller is now no longer bound to the OCR-polling delay; he may fire the query, go somewhere and then come back later for the result. To use this, call mmc_set_preinit() on any device which needs this. This can save significant amounts of time on boot (e.g. 200ms) by hiding the MMC init time behind other init. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | usb: common: Use a global definition for 'min3'Vivek Gautam2013-05-06-4/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can use a common global method for calculating minimum of 3 numbers. Put the same in 'common header' and let 'ehci' use it. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Tom Rini <trini@ti.com>
| * | | usb: fix: Fixing Port status and feature number constantsVivek Gautam2013-05-06-16/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the Port status bit constants and Port feature number constants as a part of USB 2.0 and USB 3.0 Hub class. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
| * | | USB: SS: Add support for Super Speed USB interfaceVivek Gautam2013-05-05-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds usb framework support for super-speed usb, which will further facilitate to add stack support for xHCI. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
| * | | USB: Some cleanup prior to USB 3.0 interface additionVivek Gautam2013-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some cleanup in usb framework, nothing much on feature side. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
| * | | usb: Add new command to set USB 2.0 port test modesJulius Werner2013-05-05-0/+13
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new 'usb test' command, that will set a port to a USB 2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes on both downstream hub ports and ordinary device's upstream ports. In addition, it supports EHCI root hub ports. Signed-off-by: Julius Werner <jwerner@chromium.org>
* | | tegra: Define CONFIG_SKIP_LOWLEVEL_INIT for SPL buildAxel Lin2013-05-28-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Then we can get rid of the #ifdef CONFIG_TEGRA guard in cpu_init_crit. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | Tegra: Remove unused/non-existent spl linker script referenceTom Warren2013-05-28-6/+0
| | | | | | | | | | | | | | | | | | | | | Tegra builds use the common u-boot-spl.lds now. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | | ARM: Add Seagate GoFlex Home supportSuriyan Ramasami2013-05-23-0/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add Seagate GoFlex Home support Start with dockstar configuration define support for RTC, DATE, SATA and EXT4FS Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
* | | ARM: vexpress: enable bootz and hush parser for all VExpress boardsAndre Przywara2013-05-23-0/+4
| | | | | | | | | | | | Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* | | ARM: vexpress: add support for Versatile Express Cortex-A15-TC2Andre Przywara2013-05-23-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Cortex-A15-TC2 core tile for the Versatile Express board by ARM. This is mostly a copy of the A5 support file, but will be extended later with A15 specific options. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* | | ARM: vexpress: create A5 specific board configRyan Harkin2013-05-23-19/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch creates a new config for the A5 dual core tile that includes the generic config for the Versatile Express platform. The generic config has been modified to provide support for the Extended Memory Map, as used on the A5 core tile. A5 does not support the legacy memory map. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* | | ARM: vexpress: refactoring of Versatile Express CA9x4 supportRyan Harkin2013-05-23-1/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current ca9x4_ct_vxp platform contains support for a Versatile Express motherboard with a quad core A9 core tile. This patch separates the Versatile Express motherboard code and the A9 specific code, to ease supporting more core tiles in the next patches. Andre: merged the first two of Ryan's original patches and did some checkpatch fixes. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* | | ARM: atmel: add sama5d3xek supportBo Shen2013-05-21-0/+245
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add sama5d3xek support with following feature - boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector - boot from SPI flash support - boot from SD card support - LCD support - EMAC support - USB OHCI support Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | at91sam9260ek: move board id setup to config headerAndreas Bießmann2013-05-12-0/+18
| | | | | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Bo Shen <voice.shen@atmel.com>
* | | mmc: atmel_mci: using IP version for different settingBo Shen2013-05-12-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Using IP version for different setting - Higher version supports 8bit mode - Higher version bus width setting is different Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm: at91: add at91sam9g20ek_mmc_config, which can save environment in mmc cardWu, Josh2013-05-12-1/+17
| | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm: at91: enable mci support for at91sam9g20ek.Wu, Josh2013-05-12-2/+14
| | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | arm: at91: add at91sam9n12ek board supportWu, Josh2013-05-12-0/+232
| |/ |/| | | | | | | | | | | | | | | | | | | | | Add support for following features: - nand boot, with PMECC 2bit ECC for 512 bytes sector - SPI flash boot - SD card boot - LCD support Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix -Wimplicit-function-declaration for at91_lcd_hw_init()] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-11-43/+394
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| * | ARM: OMAP: Add arch_cpu_init functionSRICHARAN R2013-05-10-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The boot parameters passed from SPL to UBOOT must be saved as a part of uboot's gd data as early as possible, before we will inadvertently overwrite it. So adding a arch_cpu_init for the required Socs to save it. Signed-off-by: Sricharan R <r.sricharan@ti.com> [trini: Add igep0033 hunk] Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: OMAP: Cleanup boot parameters usageSRICHARAN R2013-05-10-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The boot parameters are read from individual variables assigned for each of them. This been corrected and now they are stored as a part of the global data 'gd' structure. So read them from 'gd' instead. Signed-off-by: Sricharan R <r.sricharan@ti.com> [trini: Add igep0033 hunk] Signed-off-by: Tom Rini <trini@ti.com>
| * | davinci: handle CONFIG_SYS_CLE_MASK and CONFIG_SYS_ALE_MASKEric Benard2013-05-10-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | these variables are curently defined in several config files but the driver doesn't use them and defaults to hardcoded values in nand_defs.h It's interesting to be able to change this hardcoded valude when the hardware is not using the default adress signals to drive ALE and CLE and two configuration defines already exist for this purpose so use them. Signed-off-by: Eric Bénard <eric@eukrea.com>
| * | cm-t35: update config fileIgor Grinberg2013-05-10-13/+5
| | | | | | | | | | | | | | | | | | | | | Several minor updates to the cm-t35 config file. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
| * | ARM: Panda: Add flag to allow runtime enviroment varibale modsDan Murphy2013-05-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add the flag to allow runtime enviroment variable modifications. This is being added so that the board-name can be modified at runtime to indicate either a panda(4430) or a panda-es(4460) Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * | ARM:Panda:Fix device tree loading for the panda-esDan Murphy2013-05-10-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the device tree loading for panda(4430) and panda-es(4460) Modify the board name if a 4460 panda or panda-es is detected at run time. In the findfdt add a check for the panda-es board name and load the panda-es device tree blob. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * | ARM: OMAP5: Fix warm reset with USB cable connectedLokesh Vutla2013-05-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Warm reset on OMAP5 freezes when USB cable is connected. Fix requires PRM_RSTTIME.RSTTIME1 to be programmed with the time for which reset should be held low for the voltages and the oscillator to reach stable state. There are 3 parameters to be considered for calculating the time, which are mostly board and PMIC dependent. -1- Time taken by the Oscillator to shut + restart -2- PMIC OTP times -3- Voltage rail ramp times, which inturn depends on the PMIC slew rate and value of the voltage ramp needed. In order to keep the code in u-boot simple, have a way for boards to specify a pre computed time directly using the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC' option. If boards fail to specify the time, use a default as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead. Using the default value translates into some ~22ms and should work in all cases. However in order to avoid this large delay hiding other bugs, its recommended that all boards look at their respective data sheets and specify a pre computed and optimal value using 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC' In order to help future board additions to compute this config option value, add a README at doc/README.omap-reset-time which explains how to compute the value. Also update the toplevel README with the additional option and pointers to doc/README.omap-reset-time. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [rnayak@ti.com: Updated changelog and added the README] Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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