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* [MIPS] Update <asm/addrspace.h> headerShinya Kuribayashi2008-06-05-44/+127
| | | | | | | - Fix traditional KSEG names - Replace PHYSADDR with CPHYSADDR Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* [MIPS] lib_mips/time.c: Fix CP0 count register usage and timer routinesShinya Kuribayashi2008-06-05-7/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPS port has two problems in timer routines. One is now we assume CFG_HZ equals to CP0 counter frequency, but this is wrong. CFG_HZ has to be 1000 in the U-Boot system. The other is we don't have a proper time management counter like timestamp other ARCHs have. We need the 32-bit millisecond clock counter. This patch introduces timestamp and CYCLES_PER_JIFFY. timestamp is a 32-bit non-overflowing CFG_HZ counter, and CYCLES_PER_JIFFY is the number of calculated CP0 counter cycles in a CFG_HZ. STRATEGY: * Fix improper CFG_HZ value to have 1000 * Use CFG_MIPS_TIMER_FREQ for timer counter frequency, instead. * timer_init: initialize timestamp and set up the first timer expiration. Note that we don't need to initialize CP0 count/compare registers here as they have been already zeroed out on the system reset. Leave them as they are. * get_timer: calculate how many timestamps have been passed, then return base-relative timestamp. Make sure we can easily count missed timestamps regardless of CP0 count/compare value. * get_ticks: return the current timestamp, that is get_timer(0). Most parts are from good old Linux v2.6.16 kernel. v2: - Remove FIXME comments as they turned out to be trivial. - Use CP0 compare register as a global variable for expirelo. - Kill a global variable 'cycles_per_jiffy'. Use #define CYCLES_PER_JIFFY instead. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* Socrates: Fix PCI bus frequency reportWolfgang Denk2008-06-03-1/+2
| | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
* Add size #defines for Altera Cyclone-II EP2C8 and EP2C20.Andre Schwarz2008-06-03-0/+2
| | | | Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
* SPI Flash subsystemHaavard Skinnemoen2008-06-03-0/+70
| | | | | | | | | | This adds a new SPI flash subsystem. Currently, only AT45 DataFlash in non-power-of-two mode is supported, but some preliminary support for other flash types is in place as well. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* atmel_spi: Driver for the Atmel SPI controllerHans-Christian Egtvedt2008-06-03-0/+11
| | | | | | | | | | | | | | | This adds a driver for the SPI controller found on most AT91 and AVR32 chips, implementing the new SPI API. Changed in v4: - Update to new API - Handle zero-length transfers appropriately. The user may send a zero-length SPI transfer with SPI_XFER_END set in order to deactivate the chip select after a series of transfers with chip select active. This is useful e.g. when polling the status register of DataFlash. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* SPI API improvementsHaavard Skinnemoen2008-06-03-25/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de>
* Move definition of container_of() to common.hHaavard Skinnemoen2008-06-03-22/+11
| | | | | | | | | | | AVR32 and AT91SAM9 both have their own identical definitions of container_of() taken from the Linux kernel. Move it to common.h so that all architectures can use it. container_of() is already used by some drivers, and will be used extensively by the new and improved SPI API. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Fix warnings from gcc-4.3.0 build on a ppc hostKumar Gala2008-06-03-1/+1
| | | | | | | | | | | * The cfi_flash.c memset fix actual allows the board to boot so there is a bit more going on here than just resolving warnings associated with uninitialized variables. * include/asm/bitops.h:302: warning: '__swab32p' is static but used in inline function 'ext2_find_next_zero_bit' which is not static Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Avoid initrd and logbuffer area overlapsMarian Balakowicz2008-06-03-0/+1
| | | | | | | | | Add logbuffer to reserved LMB areas to prevent initrd allocation from overlaping with it. Make sure to use correct logbuffer base address. Signed-off-by: Marian Balakowicz <m8@semihalf.com>
* PPC: Add print_bats() to lib_ppc/bat_rw.cBecky Bruce2008-06-03-0/+1
| | | | | | | | | This function prints the values of all the BAT register pairs - I needed this for debug earlier this week; adding it to lib_ppc so others can use it (and add it to reginfo commands if so desired). Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* PPC: Change lib_ppc/bat_rw.c to use high batsBecky Bruce2008-06-03-1/+5
| | | | | | | | Currently, this code only deals with BATs 0-3, which makes it useless on systems that support BATs 4-7. Add the support for these registers. Signed-off-by: Becky Bruce <Becky.bruce@freescale.com>
* PPC: Create and use CONFIG_HIGH_BATSBecky Bruce2008-06-03-1/+78
| | | | | | | | | | | Change all code that conditionally operates on high bat registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS instead of the myriad ways this is done now. Define the option for every config for which high bats are supported (and enabled by early boot, on parts where they're not always enabled) Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* Merge remote branch 'u-boot-at91/for-1.3.4'Wolfgang Denk2008-06-03-17/+1505
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| * Merging Stelian Pop AT91 patchesJean-Christophe PLAGNIOL-VILLARD2008-05-24-17/+1505
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'testing-V2' Conflicts: board/atmel/at91cap9adk/Makefile Fixing copyright board/atmel/at91sam9260ek/Makefile Fixing copyright board/atmel/at91sam9260ek/u-boot.lds Delete no more needed ld script Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91: Cleanup unused config header file definitions.Stelian Pop2008-05-10-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_ENV_OVERWRITE is commented out in the config header files, so let's cleanup the files by removing the whole definition. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * Support AT91CAP9 revC CPUsStelian Pop2008-05-10-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AT91CAP9 revC CPU has a few differences over the previous, revB CPU which was distributed in small quantities only (revA was an internal Atmel product only). The revC silicon needs a special initialisation sequence to switch from the internal (imprecise) RC oscillator to the external 32k clock. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9RLEK: hook up the ATMEL LCD driverStelian Pop2008-05-10-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the necessary adaptations (PIO configurations and defines in config header file) to hook up the Atmel LCD driver to the AT91SAM9RLEK board. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9263EK: hook up the ATMEL LCD driverStelian Pop2008-05-10-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the necessary adaptations (PIO configurations and defines in config header file) to hook up the Atmel LCD driver to the AT91SAM9263EK board. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9261EK: hook up the ATMEL LCD driverStelian Pop2008-05-10-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the necessary adaptations (PIO configurations and defines in config header file) to hook up the Atmel LCD driver to the AT91SAM9261EK board. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91CAP9ADK: hook up the ATMEL LCD driverStelian Pop2008-05-10-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the necessary adaptations (PIO configurations and defines in config header file) to hook up the Atmel LCD driver to the AT91CAP9ADK board. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * Add ATMEL LCD driverStelian Pop2008-05-10-1/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the ATMEL LCDC driver which is used on some AT91 and AVR platforms. Is has been tested with the AT91CAP9ADK, AT91SAM9261EK, AT91SAM9263EK and AT91SAM9RLEK boards. Adaptation for AVR32 should probably be easy. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9RLEK supportStelian Pop2008-05-10-0/+377
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the AT91SAM9RL chip and the AT91SAM9RLEK board. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9263EK supportStelian Pop2008-05-10-0/+455
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the AT91SAM9263 chip and the AT91SAM9263EK board. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9261EK supportStelian Pop2008-05-10-0/+363
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK board. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9260EK: Fix dataflash offsets in CONFIG_BOOTCOMMANDStelian Pop2008-05-10-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND in order to cope with the changes in DataFlash partitionning scheme (cset c3a60cb3). Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9260EK: Normalize BOOTARGSStelian Pop2008-05-10-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from DataFlash or from NAND), and gives to Linux a fully specified mtdparts variable. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9260EK: Normalize SPI timingsStelian Pop2008-05-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch changes the SPI timings to closely match the ones used by the Linux kernel and the Atmel's own bootstrap project. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91SAM9260EK: Handle 8 or 16 bit NANDStelian Pop2008-05-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Atmel boards can handle 8 or 16 bit NAND memories. This patch makes the support configurable in the board config header file (CFG_NAND_DBW_8 or CFG_NAND_DBW_16). Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91CAP9ADK: Fix dataflash offsets in CONFIG_BOOTCOMMANDStelian Pop2008-05-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND in order to cope with the changes in DataFlash partitionning scheme (cset c3a60cb3). Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91CAP9ADK: Normalize BOOTARGSStelian Pop2008-05-10-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from DataFlash or from NAND), and gives to Linux a fully specified mtdparts variable. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91CAP9ADK: Normalize SPI timingsStelian Pop2008-05-10-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | This patch changes the SPI timings to closely match the ones used by the Linux kernel and the Atmel's own bootstrap project. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * AT91CAP9ADK: Handle 8 or 16 bit NANDStelian Pop2008-05-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Atmel boards can handle 8 or 16 bit NAND memories. This patch makes the support configurable in the board config header file (CFG_NAND_DBW_8 or CFG_NAND_DBW_16). Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * Update origin and copyright information in arch-at91sam9 header filesStelian Pop2008-05-10-152/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When doing the AT91CAP9/AT91SAM9 port, a number of header files were copied from the Linux kernel sources. This patch explicitly specifies this origin for all the copied headers, and for those missing copyright information, adds it. Additionaly, the header file 'at91sam926x_mc.h' has been superceeded in the latest kernel sources by 'at91sam9_smc.h'. The copyright information has been confirmed by the AT91 Linux kernel maintainer, Andrew Victor <avictor.za@gmail.com>. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * Fix @ -> <at> substitutionStelian Pop2008-05-08-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When applying the AT91CAP9 patches upstream, something transformed the '@' character into the ' <at> ' sequence. The patch below restores the original form in all the places where it has been modified (the AT91CAP9 files, the AT91SAM9260 files which were copied from AT91CAP9, and a couple of other files where the ' <at> ' sequence was present). Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | Merge remote branch 'u-boot-avr32/master'Wolfgang Denk2008-06-03-284/+477
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| * | | avr32: Rework SDRAM initialization codeHaavard Skinnemoen2008-05-27-44/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleans up the SDRAM initialization and related code a bit, and allows faster booting. * Add definitions for EBI and internal SRAM to asm/arch/memory-map.h * Remove memory test from sdram_init() and make caller responsible for verifying the SDRAM and determining its size. * Remove base_address member from struct sdram_config (was sdram_info) * Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT * Add support for a common STK1000 hack: 16MB SDRAM instead of 8. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | avr32: Rename pm_init() as clk_init() and make SoC-specificHaavard Skinnemoen2008-05-27-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pm_init() was always more about clock initialization than anything else. Dealing with PLLs, clock gating and such is also inherently SoC-specific, so move it into a SoC-specific directory. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | avr32: Clean up the HMATRIX codeHaavard Skinnemoen2008-05-27-232/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework the HMATRIX configuration interface so that it becomes easier to configure the HMATRIX for boards with special needs, and add new parts. The HMATRIX header file has been split into a general, chip-independent part with register definitions, etc. and a chip-specific part with SFR bitfield definitions and master/slave identifiers. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | avr32: Add support for the ATSTK1006 boardHaavard Skinnemoen2008-05-27-0/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a replacement for ATSTK1002 with 64MB SDRAM and NAND flash on board. It's currently in production and will be available soon. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | avr32: Get rid of the .flashprog sectionHaavard Skinnemoen2008-05-27-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The .flashprog section was only needed back when we were running directly from flash, and it's even more useless on NGW100 since it uses the CFI flash driver which never used this workaround in the first place. Remove it on STK1000 as well, and get rid of all the associated code and annotations. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | avr32: Use correct condition around macb clock accessorsHaavard Skinnemoen2008-05-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | get_macb_pclk_rate() and get_macb_hclk_rate() should be available when the chip has a MACB controller, not when it has a USART. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | avr32: stk1002 and ngw100 convergenceDavid Brownell2008-05-27-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make STK1002 and NGW100 boards act more alike: - STK boards can use as many arguments as NGW - STK boards don't need to manage FPGAs either - NGW commands should match STK ones Also spell U-Boot right in prompts for STK1002 and NGW100. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> [haavard.skinnemoen@atmel.com: update STK100[34] as well] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | | | Merge remote branch 'u-boot-nand-flash/master'Wolfgang Denk2008-06-03-0/+9
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| * | | | Make onenand_uboot.h self-sufficient.Scott Wood2008-05-28-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't assume types are provided by previously included headers. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | | | NAND: Provide a sane default for NAND_MAX_CHIPS.Scott Wood2008-05-28-0/+4
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | This allows the header to be included regardless of whether a board's config file provides NAND-related defininitions. Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | | Merge remote branch 'u-boot-mips/master'Wolfgang Denk2008-06-03-294/+1254
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| * | | | mips: Add an 'include/asm/errno.h', like all other architecturesJason McMullan2008-05-30-0/+143
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All other u-boot architectures have an include/asm/errno.h, so this change adds it to the mips include/asm-mips headers also. Stolen from Linux 2.6.25. Signed-off-by: Jason McMullan <mcmullan@netapp.com>
| * | | | [MIPS] <asm/mipsregs.h>: Update coprocessor register access macrosShinya Kuribayashi2008-05-30-125/+825
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
| * | | | [MIPS] <asm/mipsregs.h>: Update register / bit field definitionsShinya Kuribayashi2008-05-30-111/+225
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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