summaryrefslogtreecommitdiff
path: root/include
Commit message (Collapse)AuthorAgeLines
* NAND: Remove additional (CONFIG_SYS)_NAND_MAX_CHIPSScott Wood2012-01-26-8/+0
| | | | | | | NAND_MAX_CHIPS has been replaced by CONFIG_SYS_NAND_MAX_CHIPS, and the latter defaults to 1. Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: remove NAND_MAX_CHIPS definitionsVladimir Zapolskiy2012-01-26-31/+2
| | | | | | | | | | | This change follows the change by Wolfgang Grandegger (commit 6c869637fef), which allows to remove useless NAND_MAX_CHIPS definitions in board config files. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Wolfgang Grandegger <wg@grandegger.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_spl_simple: store ecc data on the stackStefano Babic2012-01-26-29/+1
| | | | | | | | | | | | | | | Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM which is likely to contain already loaded data. The patch saves the oob data and the ecc on the stack replacing the fixed address in RAM. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Ilya Yanok <yanok@emcraft.com> CC: Scott Wood <scottwood@freescale.com> CC: Tom Rini <tom.rini@gmail.com> CC: Simon Schwarz <simonschwarzcor@googlemail.com> CC: Wolfgang Denk <wd@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* overo: add SPL supportAndreas Müller2012-01-16-0/+52
| | | | | | | | | | * implementation based on ti beagleboard/omap3evm * timing data and i2c workaround for revision 0 boards taken from x-loader * run-tested with overo revision 0 and 1 / boot from NAND and SDcard * run-tested with x-loader Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Signed-off-by: Tom Rini <trini@ti.com>
* include/configs/omap3_overo.h: several cleanupsAndreas Müller2012-01-16-35/+31
| | | | | | | | | * remove unused macros * remove unused macro values * align tabs * remove Free Software Foundation address Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
* ARM:AM33XX: Add SPL support for AM335X EVMChandan Nath2012-01-16-3/+38
| | | | | | | | | | | This patch is added to support SPL feature on AM335X platform. In this patch, MMC1 is configured as boot device for SPL and support for other devices will be added in the next patch series. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* ARM:AM33XX: Add mmc/sd supportChandan Nath2012-01-16-0/+8
| | | | | | | | | This patch add supports for mmc/sd driver on AM335X platform. PLL and pinmux configurations for mmc/sd are configured in this patch. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* ARM:AM33XX: Fixing AM335X config parametersChandan Nath2012-01-16-8/+3
| | | | | | | | | This patch is added to correct some of the AM335X config parameters which were incorrect along with some cleanup like removing unused code. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* ARM:AM33XX: Replace CONFIG_AM335X with CONFIG_AM33XXChandan Nath2012-01-16-1/+1
| | | | | | | | | This patch is added to replace CONFIG_AM335X symbol with CONFIG_AM333XX for AM33XX platforms. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Thomas Weber <weber@corscience.de>
* cm-t35: add EEPROM module and pass Linux a serial numberNikita Kiryanov2012-01-16-0/+3
| | | | | | | | Add board specific EEPROM handling module, read the serial number from the EEPROM and pass it to Linux. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* cm-t35: cleanup the config fileNikita Kiryanov2012-01-16-39/+39
| | | | | | | | Remove values from boolean defines, fix indentation, etc.. No functional changes. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* ARMV7: Add support For Logic OMAP35x/DM37x modulesPeter Barada2012-01-16-0/+362
| | | | | | | | | | | | This patch adds basic support for OMAP35x/DM37x SOM LV/Torpedo reference boards. It assumes U-boot is loaded to SDRAM with the help of another small bootloader (x-load) running from SRAM. Signed-off-by: Peter Barada <peter.barada@logicpd.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* OMAP3: Remove unused define CONFIG_OMAP3_*_DDRThomas Weber2012-01-16-30/+0
| | | | | | | | | | | This patch removes the unused definitions: CONFIG_OMAP3_MICRON_DDR CONFIG_OMAP3_NUMONYX_DDR CONFIG_OMAP3_INFINEON_DDR Signed-off-by: Thomas Weber <weber@corscience.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Luca Ceresoli <luca.ceresoli@comelit.it>
* da850evm: Remove CONFIG_SYS_xxCACHE_OFF definesChristian Riesch2012-01-16-3/+0
| | | | | | | | | | | This patch removes the defines CONFIG_SYS_ICACHE_OFF, CONFIG_SYS_DCACHE_OFF, and CONFIG_SYS_L2CACHE_OFF from the board configuration. These defines are useless since cache is anyway disabled for the entire architecture since commit cba4b1809f043bf85c806e5a4e342f62bd5ded45. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com>
* arm, davinci: Use a common configuration file for da850evm and da850_am18xxevmChristian Riesch2012-01-16-246/+0
| | | | | | | | | | | | | | | | In commit 06194b6b65f701a9d6ef2d9b4123c4afe57d8783 a separate header file was introduced for the AM1808 EVM, include/configs/da850_am18xxevm.h. Before this commit, the da850evm.h configuration file was used for both the AM1808 and the OMAP-L138 EVMs. The only substantial difference between the da850evm and the da850_am18xxevm configuration is a single bit in the hardware revision that is passed to the Linux kernel. This patch removes include/configs/da850_am18xxevm.h. Instead the include/configs/da850evm.h configuration is used for AM18xx EVMs and CONFIG_DA850_AM18X_EVM is defined in boards.cfg. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com>
* i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite boardJason Liu2012-01-16-0/+162
| | | | | | | | Add the initial support for Freescale i.MX6Q Sabre Lite board Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Jason Liu <jason.hui@linaro.org> CC: Eric Nelson <eric.nelson@boundarydevices.com>
* M28EVK: Fix build if CONFIG_CMD_NAND not selectedMarek Vasut2012-01-16-1/+3
| | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* m28evk: Use GENERATED_GBL_DATA_SIZEFabio Estevam2012-01-16-1/+8
| | | | | | Use GENERATED_GBL_DATA_SIZE for calculating CONFIG_SYS_INIT_SP_OFFSET. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx28evk: Add initial support for MX28EVK boardFabio Estevam2012-01-16-0/+176
| | | | | | | | | | | Add initial support for Freescale MX28EVK board. Tested boot via SD card and by loading a kernel via TFTP through the FEC interface. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.mx6q: arm2: Add the enet function supportJason Liu2012-01-16-2/+10
| | | | | | | | | This enable the network function on the i.mx6q armadillo2 board(arm2), thus we can use tftp to load image from network. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jason Liu <jason.hui@linaro.org> Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
* openrisc: Add openrisc-generic example boardStefan Kristiansson2012-01-13-0/+158
| | | | Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* openrisc: Add architecture image supportStefan Kristiansson2012-01-13-0/+1
| | | | Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-01-13-36/+151
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: fsl_lbc: add printout of LCRR and LBCR to local bus regs sbc8548: Fix up local bus init to be frequency aware sbc8548: enable support for hardware SPD errata workaround sbc8548: relocate fixed ddr init code to ddr.c file sbc8548: Make enabling SPD RAM configuration work sbc8548: Fix LBC SDRAM initialization settings sbc8548: enable ability to boot from alternate flash sbc8548: relocate 64MB user flash to sane boundary Revert "SBC8548: fix address mask to allow 64M flash" MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM eXMeritus HWW-1U-1A: Minor environment variable tweaks
| * Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2012-01-13-36/+151
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: fsl_lbc: add printout of LCRR and LBCR to local bus regs sbc8548: Fix up local bus init to be frequency aware sbc8548: enable support for hardware SPD errata workaround sbc8548: relocate fixed ddr init code to ddr.c file sbc8548: Make enabling SPD RAM configuration work sbc8548: Fix LBC SDRAM initialization settings sbc8548: enable ability to boot from alternate flash sbc8548: relocate 64MB user flash to sane boundary Revert "SBC8548: fix address mask to allow 64M flash" MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM eXMeritus HWW-1U-1A: Minor environment variable tweaks
| | * sbc8548: enable support for hardware SPD errata workaroundPaul Gortmaker2012-01-11-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing boards by default have an issue where the LBC SDRAM SPD EEPROM and the DDR2 SDRAM SPD EEPROM both land at 0x51. After the hardware modification listed in the README is made, then the DDR2 SPD EEPROM appears at 0x53. So this implements a board specific get_spd() by taking advantage of the existing weak linkage, that 1st tries reading at 0x53 and then if that fails, it falls back to the old 0x51. Since the old dependency issue of "SPD implies no LBC SDRAM" gets removed with the hardware errata fix, remove that restriction in the code, so both LBC SDRAM and SPD can be selected. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * sbc8548: relocate fixed ddr init code to ddr.c filePaul Gortmaker2012-01-11-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Nothing to see here, just a relocation of the fixed ddr init sequence to live in the actual ddr.c file itself. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * sbc8548: Make enabling SPD RAM configuration workPaul Gortmaker2012-01-11-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, SPD configuration of RAM was non functional on this board. Now that the root cause is known (an i2c address conflict), there is a simple end-user workaround - remove the old slower local bus 128MB module and then SPD detection on the main DDR2 memory module works fine. We make the enablement of the LBC SDRAM support conditional on being not SPD enabled. We can revisit this dependency as the hardware workaround becomes available. Turning off LBC SDRAM support revealed a couple implict dependencies in the tlb/law code that always expected an LBC SDRAM address. This has been tested with the default 256MB module, a 512MB a 1GB and a 2GB, of varying speeds, and the SPD autoconfiguration worked fine in all cases. The default configuration remains to go with the hard coded DDR config, so the default build will continue to work on boards where people don't bother to read the docs. But the advantage of going to the SPD config is that even the small default module gets configured for CL3 instead of CL4. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * sbc8548: Fix LBC SDRAM initialization settingsPaul Gortmaker2012-01-11-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These were cloned from the mpc8548cds platform which has a different memory layout (1/2 the size). Set the values by comparing to the register file for the board used during JTAG init sequence: LSDMR1 0x2863B727 /* PCHALL */ LSDMR2 0x0863B727 /* NORMAL */ LSDMR3 0x1863B727 /* MRW */ LSDMR4 0x4063B727 /* RFEN */ This differs from what was there already in that the RFEN is not bundled in all four steps implicitly, but issued once as the final step. The other difference seen when comparing vs. the register file init, is that since the memory is split across /CS3 and /CS4, the dummy writes need to go to 0xf000_0000 _and_ to 0xf400_0000. We also rewrite the final LBC SDRAM inits as macros, as there is no real need for them to be a local variable that is modified on the fly at runtime. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * sbc8548: enable ability to boot from alternate flashPaul Gortmaker2012-01-11-22/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has an 8MB soldered on flash, and a 64MB SODIMM flash module. Normally the board boots from the 8MB flash, but the hardware can be configured for booting from the 64MB flash as well by swapping CS0 and CS6. This can be handy for recovery purposes, or for supporting u-boot and VxBoot at the same time. To support this in u-boot, we need to have different BR0/OR0 and BR6/OR6 settings in place for when the board is configured in this way, and a different TEXT_BASE needs to be used due to the larger sector size of the 64MB flash module. We introduce the suffix _8M and _64M for the BR0/BR6 and the OR0/OR6 values so it is clear which is being used to map what specific device. The larger sector size (512k) of the alternate flash needs a larger malloc pool, otherwise you'll get failures when running saveenv, so bump it up accordingly. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * sbc8548: relocate 64MB user flash to sane boundaryPaul Gortmaker2012-01-11-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current situation has the 64MB user flash at an awkward alignment; shifted back from 0xfc00_0000 by 8M, to leave an 8MB hole for the soldered on boot flash @ EOM. But to switch to optionally supporting booting off the 64MB flash, the 64MB will then be mapped at the sane address of 0xfc00_0000. This leads to awkward things when programming the 64MB flash prior to transitioning to it -- i.e. even though the chip spans from 0xfb80_0000 to 0xff7f_ffff, you would have to program a u-boot image into the two sectors from 0xfbf0_0000 --> 0xfbff_ffff so that it was in the right place when JP12/SW2.8 were switched to make the 64MB on /CS0. (i.e. the chip is only looking at the bits in mask 0x3ff_ffff) We also have to have three TLB entries responsible for dealing with mapping the 64MB flash due to this 8MB of misalignment. In the end, there is address space from 0xec00_0000 to 0xefff_ffff where we can map it, and then the transition from booting from one config to the other will be a simple 0xec --> 0xfc mapping. Plus we can toss out a TLB entry. Note that TLB0 is kept at 64MB and not shrunk down to the 8MB boot flash; this means we won't have to change it when the alternate config uses the full 64MB for booting, in TLB0. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * Revert "SBC8548: fix address mask to allow 64M flash"Paul Gortmaker2012-01-11-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit ccf1ad535ae1c0dc2d466235c668adbdfe3a55b7. The commit "SBC8548: fix address mask to allow 64M flash" essentially made this change: * OR6: - * Addr Mask = 64M = OR6[0:16] = 1111 1100 0000 0000 0 + * Addr Mask = 64M = OR6[0:16] = 1111 1000 0000 0000 0 But this makes no sense, as section 13.3.1.2.1 in the MPC8548ERM v2 clearly indicates the masks: 1111_1111_1000_0000_0 8 Mbytes 1111_1100_0000_0000_0 64 Mbytes 1111_1000_0000_0000_0 128 Mbytes So the original value was correct, and the commit was invalid, causing a 128MB mapping for a 64MB flash device. The problem rears its head when trying to configure u-boot to have access to both flash, since the default memory map is: FB80_0000 – FF7F_FFFF 32-bits 64MB FLASH SODIMM FF80_0000 – FFFF_FFFF 8-bits 8MB FLASH By extending the mapping of the 64MB flash to 128MB, it now conflicts with the normal 8MB boot flash, causing issues. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROMKyle Moffett2012-01-11-2/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This EEPROM is hardware-write-protected and used to persist key information such as the serial number and MAC addresses even if the primary environment sector in NOR FLASH is overwritten. During manufacturing, the environment is initialized from Linux and then the key parameters copied to the EEPROM via U-Boot: env export -c -s 0x2000 $loadaddr serial# macaddr mac1addr mac2addr eeprom write $loadaddr 0x0000 0x2000 The chip is then locked via hardware for delivery. When doing a field U-Boot upgrade, the environment is erased and reset to the defaults to avoid problems with "hwconfig" changes, etc. After loading the new U-Boot image, the hardware data is reloaded: i2c dev 0 eeprom read $loadaddr 0x0000 0x2000 env import -c $loadaddr 0x2000 saveenv The first three commands are saved in the "restore_eeprom" variable for user convenience. (EG: "run restore_eeprom && saveenv") Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * eXMeritus HWW-1U-1A: Minor environment variable tweaksKyle Moffett2012-01-11-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the ethernet connections are internal links with specialized hardware and are not useful for "dhcp" or general-purpose networking; U-Boot should not be cycling through them. Force the primary external network interface in "ethprime" and disable the interface cycling with "ethrotate=no". Additionally, the environment variable "preboot" has its own config option and means something entirely different from what the HWW-1U-1A variable was intended for. Rename the board variable to "setbootargs" to avoid potential confusion. Finally, fix an incorrect address for the kernel in FLASH memory. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-01-13-1/+1
|\ \ \ | |/ / | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: fix: error ATMEL_FIO_BASE undeclared, if use I2C_Soft on AT91
| * | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2012-01-13-1/+1
| |\ \ | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: fix: error ATMEL_FIO_BASE undeclared, if use I2C_Soft on AT91
| | * | fix: error ATMEL_FIO_BASE undeclared, if use I2C_Soft on AT91esw@bus-elektronik.de2012-01-11-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | * Since AT91 name schema was changed to ATMEL_BASE_xxx, I2C_SOFT on AT91 devices fails with 'error: ATMEL_FIO_BASE undeclared' * change ATMEL_PIO_BASE to ATMEL_BASE_PIOA will fix this Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-01-13-13/+36
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: board/mpl/pati: use the CFI driver for the PATI board board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board board/mpl/pip405: use the CFI driver for the PIP405 board board/mpl/common: remove the old legacy flash ppc4xx: Setup HICB on Io64
| * | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2012-01-13-13/+36
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-ppc4xx: board/mpl/pati: use the CFI driver for the PATI board board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board board/mpl/pip405: use the CFI driver for the PIP405 board board/mpl/common: remove the old legacy flash ppc4xx: Setup HICB on Io64
| | * | board/mpl/pati: use the CFI driver for the PATI boardDavid Müller2012-01-09-4/+9
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | board/mpl/mip405: use the CFI driver for the MIP405/MIP405T boardDavid Müller2012-01-09-4/+11
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | board/mpl/pip405: use the CFI driver for the PIP405 boardDavid Müller2012-01-09-4/+12
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | ppc4xx: Setup HICB on Io64Dirk Eibach2012-01-09-1/+4
| | |/ | | | | | | | | | | | | | | | | | | The FPGA High-Speed Interconnect Bus (HICB) is now setup by u-boot. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-01-13-162/+80
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: mpc8313erdb: fix mtdparts address powerpc/83xx/km: add support for 8321 based tuge1 board powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1 powerpc/83xx/km: remove obsolete defines for tuda1 powerpc/83xx/km: update SDRAM parameters for km8321 boards mpc8313erdb: Enable GPIO support on the MPC8313E RDB mpc83xx: Add a GPIO driver for the MPC83XX family gpio: Replace ARM gpio.h with the common API in include/asm-generic gpio: Modify common gpio.h to more closely match Linux
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2012-01-13-162/+80
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: mpc8313erdb: fix mtdparts address powerpc/83xx/km: add support for 8321 based tuge1 board powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1 powerpc/83xx/km: remove obsolete defines for tuda1 powerpc/83xx/km: update SDRAM parameters for km8321 boards mpc8313erdb: Enable GPIO support on the MPC8313E RDB mpc83xx: Add a GPIO driver for the MPC83XX family gpio: Replace ARM gpio.h with the common API in include/asm-generic gpio: Modify common gpio.h to more closely match Linux
| | * | mpc8313erdb: fix mtdparts addressScott Wood2012-01-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a copy-and-paste error when adapting mpc8315erdb mtdparts to mpc8313erdb. mtdids was already using the proper address on mpc8313erdb. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc/83xx/km: add support for 8321 based tuge1 boardHolger Brunck2012-01-09-5/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board is similar to our tuxx1 target. But on this board there is only one application specific chip select configured. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1Holger Brunck2012-01-09-134/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These boards are from a u-boot point of view identical. So collect the two headerfiles to one, to decrease maintenance. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc/83xx/km: remove obsolete defines for tuda1Holger Brunck2012-01-09-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_LCRR is unused and CONFIG_SYS_LBC_LBCR is already defined in the common header file, so remove them. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc/83xx/km: update SDRAM parameters for km8321 boardsMarco Schmid2012-01-09-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Measurements during HW basic test showed, that the SDRAM timing has to be optimized. This patch adapted these timings accordingly. Signed-off-by: Marco Schmid <marco.schmid@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | mpc8313erdb: Enable GPIO support on the MPC8313E RDBJoe Hershberger2012-01-09-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
generated by cgit v1.1 at 2024-11-09 19:01:54 +0000