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* Blackfin: bf537-minotaur/bf537-srv1: undefine nfs when net is disabledMike Frysinger2011-04-08-0/+2
| | | | | | Fixes a build error due to new partial linking logic. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf525-ucr2: new board portChong Huang2011-04-08-0/+102
| | | | | | Signed-off-by: Chong Huang <chuang@ucrobotics.com> Signed-off-by: Haitao Zhang <minipanda@linuxrobot.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: dnp5370: new board portAndreas Schallenberg2011-04-08-0/+128
| | | | | | | | Info about the hardware can be found here: http://www.dilnetpc.com/dnp0086.htm Signed-off-by: Andreas Schallenberg <Andreas.Schallenberg@3alitydigital.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: move CONFIG_BFIN_CPU back to board config.hMike Frysinger2011-04-08-3/+31
| | | | | | This is a revert of 821ad16fa9900c as Wolfgang doesn't like the new code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-04-05-53/+236
|\ | | | | | | | | | | | | Conflicts: drivers/usb/host/ehci-pci.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * powerpc: clean up DIU macro definitions for Freescale reference boardsTimur Tabi2011-04-04-16/+9
| | | | | | | | | | | | | | | | | | | | | | | | Clean up the macro defintions used to enable DIU (video) support on the MPC8610HPCD and the MPC5121ADS so that they look more like the P1022DS, which is newer. Add software cursor support to all three boards. Also document the CONFIG_FSL_DIU_FB in the README. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Enable eSDHC boot support on P2020 DSJerry Huang2011-04-04-0/+25
| | | | | | | | | | | | | | | | | | | | | | We implement our own mmc_get_env_addr since the environment variables are written to just after the u-boot image on SDCard, so we must read the MBR to get the start address and code length of the u-boot image, then calculate the address of the env. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statementsKyle Moffett2011-04-04-9/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The numeric constants in the switch statements are replaced by #defines added to the common ddr_spd.h header. This dramatically improves the readability of the switch statments. In addition, a few of the longer lines were cleaned up, and the DDR2 type for an SO-RDIMM module was added to the DDR2 switch statement. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Kim Phillips <kim.phillips@freescale.com> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add 36-bit address map support to P1022DSJiang Yutang2011-04-04-1/+45
| | | | | | | | | | Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support for ULI1575 PCI EHCI module on MPC8572DSZhao Chenhui2011-04-04-0/+14
| | | | | | | | | | | | | | | | MPC8572DS provides 2 USB ports with ULI1575. We enable USB storage device support using PCI EHCI module. Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Disable ECC in considering performance on MPC8572DSZhao Chenhui2011-04-04-1/+1
| | | | | | | | | | Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Replace memctl_intlv_ctl with hwconfig on MPC8572DSZhao Chenhui2011-04-04-1/+1
| | | | | | | | | | Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDBPoonam Aggrwal2011-04-04-3/+64
| | | | | | | | | | | | | | | | Add support for 36-bit address map for NOR, SD, and SPI boot cfgs. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Read board switch settings on p1_p2_rdbPriyanka Jain2011-04-04-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCA9557 is parallel I/O expansion device on I2C bus which stores various board switch settings like NOR Flash-Bank selection, SD Data width. On board: switch SW5[6] is to select width for eSDHC ON - 4-bit [Enable eSPI] OFF - 8-bit [Disable eSPI] switch SW4[8] is to select NOR Flash Bank for Booting OFF - Primary Bank ON - Secondary Bank Read board switch settings on p1_p2_rdb and configure corresponding eSDHC width. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdbPriyanka Jain2011-04-04-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash boot loaders because: - P1_P2_RDB boards have soldered DDR so no need for SPD - Also P102x has 256K L2 cache size so becomes a limiting factor for size of image that could be loaded in SRAM mode and would require three stage boot loader (TPL). Changes done: 1. CONFIG_SYS_TEXT_BASE to 0x11000000 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDBPoonam Aggrwal2011-04-04-2/+3
| | | | | | | | | | Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Refactor Qman/Portal support to be shared between SoCsHaiying Wang2011-04-04-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are some differences between CoreNet (P2040, P3041, P5020, P4080) and and non-CoreNet (P1017, P1023) based SoCs in what features exist and the memory maps. * Rename various immap defines to remove _CORENET_ if they are shared * Added P1023/P1017 specific memory offsets * Only setup LIODNs or LIODN related code on CORENET based SoCs (features doesn't exist on P1023/P1017) Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from boardKumar Gala2011-04-04-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards pretty much do the same thing. The only variations are in how many controllers or DIMMs per controller exist. To make this work we standardize on the names of the SPD_EEPROM_ADDRESS defines based on the use case of the board. We allow boards to override get_spd to either do board specific fixups to the SPD data or deal with any unique behavior of how the SPD eeproms are wired up. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()Kumar Gala2011-04-04-0/+4
| | | | | | | | | | | | | | | | | | | | Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq() and every 86xx board uses get_bus_freq(). If implement get_ddr_freq() as a static inline to call get_bus_freq() we can remove fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq() directly. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Remove config.mk for nand linker scriptKumar Gala2011-04-04-0/+4
| | | | | | | | | | | | | | Move the include of mpc85xx/u-boot-nand.lds to utilize CONFIG_SYS_LDSCRIPT rather than having an explicit config.mk Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Update P2020DS default env settingsLi Yang2011-04-04-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Read MAC address from EEPROM. Add hwconfig settings. Modified the default othbootargs to include the cache-sram-size parameter. This parameter is needed as the L2 as SRAM is ON by default in the P2020RDB kernel and used by the Gianfar driver. Also cleanup some of the boot commands. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add eSDHC support on P2020DSJerry Huang2011-04-04-1/+24
| | | | | | | | | | | | | | | | | | | | | | We enable SDHC_CD and SDHC_WP signals (pin muxed with GPIO8 & GPIO9 respectively). We enable EXT2, FAT, and parition support for both MMC & USB configs. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | MIPS: Purple: Remove Purple supportDaniel Schwierzeck2011-04-02-173/+0
|/ | | | | | | | The Purple SoC and eval board are not actively maintained since years. This patch removes the support completely as aggreed with Wolfgang Denk. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* NAND: add support for reading ONFI page tableFlorian Fainelli2011-04-01-0/+69
| | | | | | | | | | | | This patch adds support for reading an ONFI page parameter from a NAND device supporting it. If this is the case, struct nand_chip onfi_version member contains the supported ONFI version, 0 otherwise. This allows NAND drivers past nand_scan_ident to set the best timings for the NAND chip. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCsPrabhakar Kushwaha2011-03-29-0/+1
| | | | | | | | | | The P1011, P1012, P1015, P1016, P1020, P1021, P1024, & P1025 SoCs require that we initialize the SERDES registers if the lanes are configured for PCIe. Additionally these devices PCIe controller do not support ASPM and we have to explicitly disable it. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable various errata on P1022/P1013 SoCsJiang Yutang2011-03-28-0/+1
| | | | | | | | | | Enable workaround for errata ELBC A001, ESDHC 111 & SATA A001 on P1022/P1013 SoCs. Also updated P1022DS config to properly enable CONFIG_FSL_SATA_V2. Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-03-27-1/+46
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| * arm: Tegra2: Change mach-type to MACH_TYPE_SEABOARD due to mach-types.h updateTom Warren2011-03-27-1/+1
| | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
| * S5P: universal: Enable the pwm driverMinkyu Kang2011-03-27-0/+3
| | | | | | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * S5P: goni: Enable the pwm driverMinkyu Kang2011-03-27-0/+3
| | | | | | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * S5P: smdkc100: Enable the pwm driverMinkyu Kang2011-03-27-0/+3
| | | | | | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * ARM: S5P: pwm driver supportDonghwa Lee2011-03-27-0/+31
| | | | | | | | | | | | | | | | This is common pwm driver of S5P. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SMDK6400: Fix CONFIG_SYS_INIT_SP_ADDR undefinedseedshope2011-03-27-0/+5
| | | | | | | | | | | | | | Fix CONFIG_SYS_INIT_SP_ADDR undefined issue. Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | powerpc/85xx: Fix PCI memory map setup on P1_P2_RDBPrabhakar Kushwaha2011-03-24-12/+12
|/ | | | | | | | | Update the PCIe address map to match standard FSL memory map. Additionally, fix the TLBs so the cover the PCIe address space properly so cards plugged in like an e1000 work correctly. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* strmhz: Make hz unsigned to support greater than 2146 MHz clockEd Swarthout2011-03-22-1/+1
| | | | | | | | | For example, an input of 0x80000000 should print: 2147.484 instead of -2147.-483. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc52xx, digsy_mtc_rev5: Fix Linux crash, if no Flash in bank 2Heiko Schocher2011-03-21-2/+2
| | | | | | | | | | | | | | | | If no Flash is connected to cs1, Linux crashes, because reg entries are not correct adapted. Following fix is needed: - swap base addresses in CONFIG_SYS_FLASH_BANKS_LIST, as flash bank 1 is on chipselect 0 and flash bank 2 on chipselect 1 - call fdt_fixup_nor_flash_size() from ft_board_setup() Signed-off-by: Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <hs@denx.de> cc: Werner Pfister <Pfister_Werner@intercontrol.de> cc: Detlev Zundel <dzu@denx.de>
* powerpc/85xx: Fix pixis_reset altbank mask on MPC8536DSMatthew McClintock2011-03-06-1/+1
| | | | | | | | Currently, pixis_reset altbank does not work properly. This patch uses the correct mask to boot into the alternate bank. Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Pantheon: Add Board Support for Marvell dkb boardLei Wen2011-02-21-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | DKB is a Development Board for PANTHEON TD/TTC(pxa920/pxa910) with * Processor upto 806Mhz * LPDDR1/2 * x8/x16 SLC/MLC NAND * Footprints for eMMC & MMC x8 card With Peripherals: * Parallel LCD I/F * Audio codecs (88PM8607) * MIPI CSI-2 camera * Marvell 88W8787 802.11n/BT module * Marvell 2G/3G RF * Dual analog mics & speakers, headset jack, LED, ambient * USB2.0 HS host, OTG (mini AB) * GPIO, GPIO expander with DIP switches for easier selection * UART serial over USB, CIR This patch adds basic board support with DRAM and UART functionality Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* mv: seperate kirkwood and armada from common settingLei Wen2011-02-21-126/+29
| | | | | | | | | | | | | Since there are lots of difference between kirkwood and armada series, it is better to seperate them but still keep the most common file shared by all marvell platform in the mv-common configure file. This patch move the kirkwood only driver definitoin in mv-common to the <soc_name>/config.h. This patch is tested with compilation for armada100 and guruplug. Signed-off-by: Lei Wen <leiwen@marvell.com>
* arm: Tegra2: Add support for NVIDIA Seaboard boardTom Warren2011-02-21-0/+43
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Tegra2: Add support for NVIDIA Harmony boardTom Warren2011-02-21-0/+209
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* serial: Add Tegra2 serial port supportTom Warren2011-02-21-1/+2
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* mx31pdk: Make the full boot log visibleFabio Estevam2011-02-21-0/+1
| | | | | | Use board_early_init_f so that the full boot log output can be displayed. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx31pdk: Use the new relocation schemeFabio Estevam2011-02-21-0/+6
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* USB: Add USB RNDIS gadget protocolVitaly Kuzmichev2011-02-19-1/+5
| | | | | | | Port USB gadget RNDIS protocol support from linux-2.6.26 (.27 gadget stack actually has composite drivers). Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
* USB-CDC: Port struct net_device_statsVitaly Kuzmichev2011-02-19-0/+65
| | | | | | | Port struct net_device_stats and statistics collecting needed for RNDIS protocol. Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
* Add support for ASIX AX88772 USB 2.0 10/100Mbit Ethernet AdaptorSimon Glass2011-02-19-0/+7
| | | | | | | Driver originally written by NVIDIA Corporation, modified to handle odd-length packets. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add USB host ethernet adapter supportSimon Glass2011-02-19-1/+69
| | | | | | | | | | | | This adds support for using USB Ethernet dongles in host mode. This is just the framework - drivers will come later. A new config option called CONFIG_USB_HOST_ETHER can be defined in board config files to switch this on. The was originally written by NVIDIA and was cleaned up for release by the Chromium authors. Signed-off-by: Simon Glass <sjg@chromium.org>
* Fix EHCI usb submit timeout and unify with OHCISimon Glass2011-02-19-0/+6
| | | | | | | | | | | | Changed both to use a common timeout for URB submission, since they were using different values and EHCI's was too short. Also fixed EHCI to actually check if urb submission succeeded, rather than silently continuing into the weeds. Change-Id: I7f71499ffaa05187d8e5618db2419e1606007b82 Signed-off-by: Simon Glass <sjg@chromium.org>
* add checking the CONFIG_ENV_IS_IN_SPI_FLASH in Enbedded envYoshihiro Shimoda2011-02-15-1/+2
| | | | | | | | Fix the problem which cannot build the U-boot, if we only set the CONFIG_ENV_IS_IN_SPI_FLASH. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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