| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
|
|
|
|
| |
Since the QSPI needs to rework on this board, at default the QSPI is disabled.
So bind the M4 QSPI boot with QSPI enabled u-boot image, set default
M4 boot to TCM. Need to use TCM m4 image at default.
Additional, on SDB there is only one QSPI flash. Considering the A7 QSPI boot
case, we have to move M4 image to 1M offset to give enough space for u-boot
and env.
Signed-off-by: Ye Li <ye.li@nxp.com>
|
|
|
|
|
|
| |
Modify the picosom to be suit for Brillo configurations.
Signed-off-by: Haoran Wang <Haoran.Wang@freescale.com>
|
|
|
|
|
|
|
|
| |
Imported the picosom boot codes and board
configs from technexion.
Signed-off-by: Tapani Utriainen <tapani@technexion.com>
Signed-off-by: Haoran Wang <Haoran.Wang@freescale.com>
|
|
|
|
|
|
|
| |
Define CONFIG_SYS_VSNPRINTF to use snprintf, but not sprintf.
Coverity ID: 17926.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
|
|
|
|
|
|
|
| |
Currently there is no API to uninitialize mdio. Add two APIs for this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
(cherry picked from commit cb6baca77bca0ef999203a7ed73bd123e7da062e)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Introudce wp_enable. If want to check WPSPL, then in board code,
need to set wp_enable to 1.
Take i.MX6UL for example, to some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.
Suggested-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Since i.MX7D SDB revB board has some HW changes, we have modify the BSP file to support new pinmux.
1. OTG2 PWR pin is changed to GPIO1_IO07.
2. A enet2_en pin is added for isolating enet2 signals with EPDC, we also add support for enet2.
3. pin6 of 74LV output is changed for CSI PWDN. Set output to high to power down it.
This patch also tries to get the board id and apply changes according with it. Since current
RevB board does not burn GP1 fuse for board id, we have to check the TO rev instead even it is not very
exact. Will update this if any new way implemented.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
| |
change the imx7d arm2 nand rootfs partition index from 3 to 4 since the
weim nor was enabled by default and took the first mtd partition.
Signed-off-by: Han Xu <b45815@freescale.com>
|
|
|
|
|
|
|
|
| |
uboot will fail when loader zImage which is larger than 9M.
Increasing CONFIG_SYS_BOOTM_LEN from 8 MB to 16 MB is necessary to
support uncompressing images larger than 8 MB.
Signed-off-by: Zhang Sanshan <b51434@freescale.com>
|
|
|
|
|
|
|
|
|
|
| |
birllo use gcc-4.9 to compile kernel, zImage is large then 8M.
set CONFIG_SYS_BOOTM_LEN to 16M
Signed-off-by: fang hui <b31070@freescale.com>
Conflicts:
include/configs/mx6ul_14x14_evk_brillo.h
|
|
|
|
|
|
|
|
|
|
|
|
| |
update will fail"
This reverts commit 24356fe059abbc9eae1b192f7af8a46f204a36f4.
Conflicts:
common/image-android.c
Conflicts:
common/image-android.c
|
|
|
|
|
|
|
|
|
| |
Windows DeviceIoControl SCSI_PASSTHROUGH is not stable when report media is
not ready.
Use dummy fat file to workaround this issue and avoid windows popup
format dialog.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
will fail
The ota update script will set selinux label with set_metadata when do nand ota update.
The root cause is set_metadata will fail if disable selinux in recovery mode.
This patch is a workaround which will enable selinux in recovery mode,
even if have disable selinux in commandline.
Signed-off-by: zhang sanshan <b51434@freescale.com>
|
|
|
|
|
|
|
|
| |
The current 36M offset will conflict with NAND FCB firmware2 when the
nand chip block is 1MB size. This patch change it to 36M + 1M offset,
so the redundant u-boot at firmware2 will not be broken.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Same issue as ENGR00321137, commit 3695635.
GIS module need total 3M+3M+1.5M+1.5M=9M video memory.
and sys reserved 16M memory for malloc.
When gis module enabled, malloc may failed to allocate memory
for other modules, that may cause system hang.
Expand malloc pool to 32M.
Signed-off-by: Sandor Yu <R01008@freescale.com>
|
|
|
|
|
|
|
|
| |
The previous 8M address for NAND env might conflict with other boot
parameters as the NAND block size increasing, change it to 36M to avoid
it.
Signed-off-by: Han Xu <b45815@freescale.com>
|
|
|
|
|
|
|
| |
enlarge the maximum nand page size and oob size to
16k byte and 1280byte.
Signed-off-by: Han Xu <b45815@freescale.com>
|
|
|
|
|
|
|
| |
The actual memory size is 256MB not 512MB, otherwise it has a wrap
problem in memory and will cause memtester failed.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
| |
Since the mx6ul 9x9 evk has different DDR size with 14x14 evk, change
to use the half of PHYS_SDRAM_SIZE for mtest end.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
| |
Add i.MX6QP SabreSD board support.
Signed-off-by: Anson Huang <b20788@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Need to check fuse bit 25 of bank 0 word 4 before initialize bee.
The bit: 0 means bee enabled, 1 means bee disabled.
If disabled, continuing initialize bee will cause system hang, so
need to check this bit before initialize bee.
Add macro to enable BEE in header file, default disabled.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
|
| |
i.MX6UL-9x9-EVK board has PFUZE3000, so enable LDO
bypass support for this board.
Signed-off-by: Anson Huang <b20788@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In current design, if any peripheral was assigned to both A7 and M4,
it will receive ipg_stop or ipg_wait when any of the 2 platforms
enter low power mode. We will have a risk that, if A7 enter wait,
M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait
asserted same time.
There are 26 peripherals impacted by this IC issue:
SIM2(sim2/emvsim2)
SIM1(sim1/emvsim1)
UART1/UART2/UART3/UART4/UART5/UART6/UART7
SAI1/SAI2/SAI3
WDOG1/WDOG2/WDOG3/WDOG4
GPT1/GPT2/GPT3/GPT4
PWM1/PWM2/PWM3/PWM4
ENET1/ENET2
Software Workaround:
The solution is set M4 to a different domain with A core.
So the peripherals are not shared by them. This way requires
the uboot implemented the RDC driver and set the 26 IPs above to domain 0 only.
CM4 image will set the M4 to domain 1 only.
This patch enables the CONFIG_MXC_RDC for mx7d SABRESD board and ARM2 boards, and
setup the 26 IP resources to domain 0.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
| |
This mx7d 19x19 lpddr2 arm2 board is based on 19x19 lpddr3 arm2 board
with DDR changed to 512M LPDDR2. We added DDR script for LPDDR2 and
a new u-boot build target: mx7d_19x19_lpddr2_arm2_config
LPDDR2 script source: lpddr2_0_1.ds
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Since the i.MX6ul 9x9 evk board only has 256MB LPDDR2, while the
CMA size used in kernel configuration is 320MB, so we have to set
another value for the 9x9 evk board.
This patch sets the cma=96M bootargs to in uboot. So the kernel will
overwrite to use the new value.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The i.mx6ul 9x9 EVK shares the same base board with 6ul 14x14 EVK
with two main changes on CPU board:
1. Change to use pfuze 3000.
2. Use 256MB LPDDR2 memory.
This patch uses a macro CONFIG_6UL_9X9_LPDDR2 to distinguish the changes above,
basing on 14x14 EVK board level codes.
The new build target for the 9x9 EVK: mx6ul_9x9_evk_config
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
| |
As we need to support LPSR mode resume and due to hardware
design requirement, DCD can NOT put DRAM exit from retention
mode, so only plug in mode can do that to support LPSR mode,
so enabled plug in mode by default for imx7d 12x12-lpddr3-arm2
board.
Signed-off-by: Anson Huang <b20788@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Since setup_waveform_file in different boards code have same implementation,
move setup_waveform_file to board common code. Also rename it to
board_setup_waveform_file
This patch also fix a bug when using flush_cache. We should pass
'waveform_buf' to flush_cache, but not a string named 'addr'.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Support draw image on E-ink screen.
1. The image format should be PGM-P5 raw data format.
2. The image should be named epdc_logo.pgm.
3. If no epdc_logo.pgm found in the first partition(FAT), will choose
to draw black border on the screen.
4. Default configuration is to draw image at pos (0,0). If 'splashpos'
env is set, will choose the pos from 'splashpos'.
5. The image size should not be bigger than screen total pixel size.
6. Implement board_setup_logo_file in board/freescale/common/epdc_setup.c
7. Introudce function prototype for board_setup_logo_file.
Note: i.MX7D EPDC supports advanced mode and standard mode. Since current
PXP in uboot for i.MX7D not ready, only support standard mode now.
advanced and standard mode needs waveform firmware's support.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
|
|
|
| |
Enable fastboot command "fastboot flash data"
Custom may need to update data partition in fastboot mode.
This patch enable flash data partition in emmc\sd.
Signed-off-by: Zhang Sanshan <b51434@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
1. Replace the UDC driver with community's USB gadget d_dnl driver.
2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and
EFI partitions are not support by i.MX.
3. Add FDT support to community's android image.
4. Change the booti command to boota, due to the booti has been used for
ARM64 image boot.
5. Modify boota implementation to load ramdisk and fdt to their loading
addresses specified in boot.img header, while bootm won't do it for
android image.
6. Modify the android image HAB implementation. Authenticate the boot.img
on the "load_addr" for both SD and NAND.
7. Enable new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot
with relevant header file "fsl_fastboot.h". While disabling the
configuration, the community fastboot is used.
8. Use community's way to combine cmdline in boot.img and u-boot environment,
not overwrite the cmdline in boot.img
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
1. Add weimnor boot defconfig
2. move CONFIG_FSL_USDHC and CONFIG_VIDEO to board header
3. Add CONFIG_SYS_FLASH_PROTECTION for mx6ul 14x14 lpddr2 arm2
4. correct CONFIG_SYS_FLASH_SECT_SIZE and CONFIG_SYS_MAX_FLASH_SECT
5. Add comments for setup_eimnor, since ENET2_RXER pin conflicts
with ENET2. Also eimnor support will disable SD1/SD2, need ENET
to boot kernel and nfs using enet. So setup_eimnor should be
invoked after setup_fec
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
|
|
|
| |
Add MX6UL LPDDR2 ARM2 board BSP codes, supported peripherals:
SD1, eMMC(USDHC2), USB OTG1, I2C, ENET2, PMIC.
Due to a board issue, the SD1 only supports 1 bit bus width.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
| |
Create a new head file mx6ul_arm2.h, and move the common settings of
MX6UL ARM2 boards to this file.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
| |
We should use board_spi_cs_gpio and remove the GPIO from
CONFIG_SF_DEFAULT_CS.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
| |
We should not put the GPIO in CONFIG_SF_DEFAULT_CS
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
|
|
| |
Abstracted the CSF size in imximage from a hardcoded value to a config
setting CONFIG_CSF_SIZE. This configuration is only enabled for secure
boot.
Increased the size of the CSF default allocation to 0x4000. This size
covers the event the worst case of 4906-bits keys.
|
|
|
|
|
|
| |
For nand boot, the mtdpart info are needs to load kernel and rootfs.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
| |
Since the flash blocks are locked at default , need to set
"CONFIG_SYS_FLASH_PROTECTION" to unlock them before write/erase.
The patch also add the pinmux for LBA (ADV) pin and set eimnor enabled at
default.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Since there is another 9x9 package for mx6ul, modify the BSP names
of ddr3 arm2 board and evk board to add 14x14 package info.
Also modify the loaded dtb file to align with kernel.
After the change, the build target for mx6ul ddr3 arm2 board is:
mx6ul_14x14_ddr3_arm2_config
and the build target for mx6ul evk board is:
mx6ul_14x14_evk_config
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
| |
Add the default TSOP NAND support and build target.
New build target for nand boot: mx7d_19x19_lpddr3_arm2_nand_config
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
| |
Include fb.h in mxsfb.h.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
* Add mx7d_19x19_lpddr3_arm2 target board supprt
* Enable i2c, spinor, usb, usdhc, qspi, enet, uart
* Build targets
mx7d_19x19_lpddr3_arm2_defconfig
mx7d_19x19_lpddr3_arm2_eimnor_defconfig
- Set EIMNOR settings for Intel Sibley Asynchronous mode
- Set flash sector size for 256kb (erase block size)
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
| |
Use pmic framework to simplify code and make code clean.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
|
|
| |
Add android features booti, fastboot and recovery to i.MX6UL EVK board.
Since there is no user button on the board, we can't implement
the recovery by using button.
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Since the NAND has two pins conflict with SD2, when NAND is enabled, we
must disable SD2. So the CONFIG_SYS_FSL_USDHC_NUM needs configure to 1
and should be moved to under defining CONFIG_SYS_USE_NAND.
New build target for NAND boot:
mx6ul_ddr3_arm2_nand_config
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
|
|
| |
Correct the EIMNOR settings to non-mux mode and set the environment
variables configuration to FLASH when using WEIMNOR boot.
New target is added for build WEIMNOR boot u-boot:
mx6ul_ddr3_arm2_eimnor_config
Signed-off-by: Ye.Li <B37916@freescale.com>
|
|
|
|
|
|
|
|
| |
Move CONFIG_IMX_THERMAL to mx6_common.h
Make CONFIG_MXC_OCOTP only depends on CONFIG_CMD_FUSE, since when
THERMAL is not implemented, we may use fuse.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add board code for mx6ul ddr3 arm2 board.
QSPI, USDHC, ENET, USB, VIDEO, SPINOR, EIMNOR
Add sd1, qspi and spinor boot support
DDR script is 1.02 version.
Signed-off-by: Fugang Duan <b38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Add BSP codes to support modules on the board:
I2C, SD/eMMC, NAND, QSPI, FEC1/FEC2, USB, LCDIF, 74LV, Serial
DDR version: 1.0
Build target: mx6ulevk_config
mx6ulevk_qspi1_config
Signed-off-by: Ye.Li <B37916@freescale.com>
|