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* | | ARM: tegra: fix trimslice environment locationStephen Warren2016-08-15-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trimslice currently stores its environment at 512KiB into the SPI flash chip. The U-Boot binary has grown such that the size of the boot image (which includes the Tegra BCT, padding, and the U-Boot binary) is slightly larger than 512K now. Consequently, writing the boot image to flash corrupts the saved environment, and equally, writing to or erasing the environment will corrupt the bootloader, which in turn will cause the Tegra boot ROM to enter recovery mode during boot, making it look as if the system is non-operational. Note that tegra-uboot-flasher writes to the environment during the flashing process. Solve this by moving the environment as high as possible in flash. This will allow the U-Boot binary to roughly double in size before this problem is hit again, at which point there's nothing we can do anyway since the binary won't fit into flash. 99% of other Tegra boards store the environment in eMMC and use a negative value for CONFIG_ENV_OFFSET, which already automatically places the environment as near the end of boot flash as possible. The 1 remaining board hard-codes CONFIG_ENV_OFFSET to 2MiB, which allows for plenty more bloat. Reported-by: Stephen L Arnold <nerdboy@gentoo.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: enable PCIe controller on p2771-0000Stephen Warren2016-08-15-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p2771-0000 has a couple of PCIe ports; one physically x4 desktop PCI connector (which may run at x2 electrically, depending on the board version and configuration) and a x1 connection to the M.2 slot (which may not be active, depending on the board version and configuration). This change enables those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | ARM: tegra: enable I2C buses for P2771-0000Bryan Wu2016-08-15-0/+3
|/ / | | | | | | | | | | | | | | | | | | Enable I2C devices in DT and enable building tegra_i2c.c driver. Signed-off-by: Bryan Wu <pengw@nvidia.com> (swarren, commit msg rework, fixed DT node sort order) Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | misc: add "call" uclass opStephen Warren2016-08-12-0/+35
| | | | | | | | | | | | | | | | | | | | The call op requests that the callee pass a message to the underlying HW or device, wait for a response, and then pass back the response error code and message to the callee. It is useful for drivers that represent some kind of messaging or IPC channel to a remote device. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | fdt: allow fdtdec_get_addr_size_*() to translate addressesStephen Warren2016-08-12-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org>
* | fdt_support: fdt_translate_address() blob const correctnessStephen Warren2016-08-12-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The next patch will call fdt_translate_address() from somewhere with a "const void *blob" rather than a "void *blob", so fdt_translate_address() must accept a const pointer too. Constify the minimum number of function parameters to achieve this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-08-11-4/+10
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| * | ARM: uniphier: add PSCI support for UniPhier ARMv7 SoCsMasahiro Yamada2016-08-11-1/+6
| | | | | | | | | | | | | | | | | | Currently, only the CPU_ON function is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: fix CONFIG_SYS_CACHELINE_SIZE when outer cache is onMasahiro Yamada2016-08-11-0/+4
| | | | | | | | | | | | | | | | | | | | | The UniPhier outer cache (L2 cache on ARMv7 SoCs) has 128 byte line length and its tags are also managed per 128 byte line. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: uniphier: move (and rename) CONFIG_UNIPHIER_L2CACHE_ON to KconfigMasahiro Yamada2016-08-11-3/+0
| | | | | | | | | | | | | | | | | | | | | Move this option to Kconfig, renaming it into CONFIG_CACHE_UNIPHIER. The new option name makes sense enough, and the same as Linux has. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-08-11-8/+0
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| * | usb: add (move) CONFIG_USB_HOST to KconfigMasahiro Yamada2016-08-07-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The meaning of CONFIG_USB in U-Boot is different from that in Linux. As you see in drivers/usb/Kconfig of Linux, CONFIG_USB enables the USB host controller support, while CONFIG_USB_SUPPORT is used to enable the whole of the USB sub-system. When I added CONFIG_USB into Kconfig by commit 6e7e9294d321 ("usb: add basic USB configs in Kconfig"), I planned to follow the Linux's convention, i.e. CONFIG_USB to enable/disable the USB host support. Then, commit 68f7c5db2d1e ("usb: Generic USB Kconfig option, that fits both host and gadget and comments") changed the logic of the CONFIG_USB to point to the whole of the USB sub-system. As a result, currently we do not have an option for USB host. This commit adds CONFIG_USB_HOST, which will be useful to compile in the USB host support code. CONFIG_USB_HOST is not referenced at all, but strangely some boards define it in board headers. I removed them because USB_HOST will be selected in Kconfig going forward. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | spl_nor.c: Support devicetree sizes different from 16kMike Looijmans2016-08-08-0/+2
|/ / | | | | | | | | | | | | | | | | The devicetrees for various platforms already exceed 16k. Add a define CONFIG_SYS_FDT_SIZE to specify the FDT size, and set to 16k for the two boards that define this CONFIG_SYS_FDT_BASE parameter. This allows platforms with larger devicetree blobs to boot from NOR. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2016-08-06-1/+72
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| * | config: rk3399: enable dwmmc controllerKever Yang2016-08-05-0/+1
| | | | | | | | | | | | | | | | | | | | | Enable the rockchip dwmmc driver for rk3399 and its evb. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | configs: rk3399: add gpt and fs supportKever Yang2016-08-05-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | To compatible with distro boot, we need to add gpt and fs support, including gpt table and vfat, ext2, ext4 support. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * | rockchip: add usb mass storage feature support for rk3288Xu Ziyuan2016-08-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Enable ums feature for rk3288 boards, so that we can mount the mmc device to PC. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | rockchip: add basic partitions support for rk3288Xu Ziyuan2016-08-05-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For compatibility with distro boot, fastboot, and mount the mmc deivce to PC via usb mass storage feature, GPT partitions are essential. You should write the partitions to mmc device prior to use above feature. => gpt write mmc 1 $partitions GPT successfully written to block device! success! Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | rockchip: add support for rk3288 miniarm boardXu Ziyuan2016-08-05-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | Miniarm is a rockchip rk3288 based development board, which has lots of interface such as HDMI, USB, micro-SD card, Audio etc. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | rockchip: add fastboot support for rk3036 boardXu Ziyuan2016-08-05-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | Enable fastboot feature on rk3036, please refer to doc/README.rockchip for more detailed usage. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-08-05-14/+1194
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| * | | ARM: tegra: add BPMP DT bindingsStephen Warren2016-08-04-0/+1175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. These bindings dictate how to represent the BPMP in device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: adapt to latest HSP DT bindingStephen Warren2016-08-04-14/+19
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT binding for the Tegra186 HSP module apparently wasn't quite final when I posted initial U-Boot support for it. Add the final DT binding doc and adapt all code and DT files to match it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2016-08-05-17/+4
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| * | | mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bitJaehoon Chung2016-08-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to DesignWare TRM, FIFO_COUNT is bit[29:17]. If get the correct fifo_count value, it has to use the FIFO_MASK as 0x1FFF, not 0x1FF. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Ziyuan Xu <xzy.xu@rock-chips.com>
| * | | mmc: sdhci: remove the unnecessary arguments for sdhci_setup_cfgJaehoon Chung2016-08-05-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some arguments don't need to pass to sdhci_setup_cfg. Generic variable can be used in sdhci_setup_cfg, and some arguments are already included in sdhci_host struct. It's enough that just pass the board specific things to sdhci_setup_cfg(). After removing the unnecessary arguments, it's more simpler than before. It doesn't consider "Version" and "Capabilities" anymore in each SoC driver. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | mmc: sdhci: remove the unused argument for sdhci_setup_cfgJaehoon Chung2016-08-05-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | buswidth isn't used anywhere in sdhci_setup_cfg. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | mmc: use the generic error numberJaehoon Chung2016-08-05-6/+0
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* | | configs: Fix mmc rescan misusesKarl Beldan2016-08-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This follows 9fd383724cf4 ("mmc: don't allow extra cmdline arguments"), and affects omapl138_lcdk and omap3_evm_quick_mmc. Signed-off-by: Karl Beldan <kbeldan@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | omap3: Drop omap3_evm_quick_* targetsTom Rini2016-08-05-468/+270
| | | | | | | | | | | | | | | | | | | | | | | | | | | These config targets were added well before the Kconfig migration began as a way to demonstrate how to make these platforms work with cut down features. At this point in time they no longer serve a good purpose so remove them. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | treewide: move CONFIG_PHYS_64BIT to KconfigMasahiro Yamada2016-08-05-50/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to ensure that CONFIG_PHYS_64BIT is configured via Kconfig so that it is always available to the build system. Otherwise we can run into cases where we have inconsistent sizes of certain attributes. Ravi Babu reported offset mismatch of struct dwc3 across files since commit 95ebc253e6d4 ("types.h: move and redefine resource_size_t"). Since the commit, resource_addr_t points to phys_addr_t, whose size is dependent on CONFIG_PHYS_64BIT for ARM architecture. I tried my best to use "select" where possible (for example, ARMv8 architecture) because I think this kind of option is generally user- unconfigurable. However, I see some of PowerPC boards have 36BIT defconfigs as well as 32BIT ones. I moved CONFIG_PHYS_64BIT to the defconfigs for such boards. CONFIG_36BIT is no longer referenced, so all of the defines were removed from CONFIG_SYS_EXTRA_OPTIONS. Fixes: 95ebc253e6d4 ("types.h: move and redefine resource_size_t") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Ravi Babu <ravibabu@ti.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | ext4: Refuse to mount filesystems with 64bit feature setTom Rini2016-08-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With e2fsprogs after 1.43 the 64bit and metadata_csum features are enabled by default. The metadata_csum feature changes how ext4_group_desc->bg_checksum is calculated, which would break write support. The 64bit feature however introduces changes such that it cannot be read by implementations that do not support it. Since we do not support this, we must not mount it. Cc: Stephen Warren <swarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Stefan Roese <sr@denx.de> Reported-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* | | arc: Rename AXS101 board to more generic AXS10xAlexey Brodkin2016-08-05-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of now we have 2 flavors of ARC SDP boards: 1) AXS101 - with ARC770 in ASIC 2) AXS103 - with ARC HS38 in FPGA Both options share exactly the same base-board and only differ with CPU-tiles in use. That means all peripherals are the same (they are implemented in FPGA on the base-board) and so generic board could be used for both. While at it: * Recreated defconfigs with savedefconfig * In include/configs/axs10x.h numerical sizes replaced with defines from linux/sizes.h for better readability. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | arc: Rename ARCangel4 board to nSIMAlexey Brodkin2016-08-05-9/+11
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARCangel was one of the main development boards back in the day but now it's gone and replaced by other boards like ARC SDP. But we also used to have simulation platform very similar to ARCangel4 in terms of CPU settings as well as basic IO like UART. Even though ARCangel4 is long gone now we have a replacement for simulation which is a plain or stand-alone nSIM and Free nSIM. Note Free nSIM is available for download here: https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi And while at it: * Finally switch hex numerical values in nsim.h to defines from include/linux/sizes.h * Add defconfigs with ARC HS38 cores * Recreated all defconfigs with savedefconfig Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | powerpc/86xx: Increase boot map size to 256 MiBScott Wood2016-08-03-10/+12
| | | | | | | | | | | | | | | | | | | | This is what Linux maps on classic PPC during boot, and modern kernel images don't fit within the current 8 MiB uncompressed limit. Adjust image load addresses to be above this limit to avoid conflicts. Signed-off-by: Scott Wood <oss@buserror.net> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-08-02-6/+8
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| * | ARMv8/fsl-ppa: Consolidate PPA image stored-media flag for XIPHou Zhiqiang2016-08-02-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PPA binary may be stored on QSPI flash instead of NOR. So, deprecated CONFIG_SYS_LS_PPA_FW_IN_NOR in favour of CONFIG_SYS_LS_PPA_FW_IN_XIP to prevent fragmentation of code by addition of a new QSPI specific flag. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1043a: enable pxe commandsWenbin Song2016-08-02-0/+2
| | | | | | | | | | | | | | | | | | | | | Enable pxe command for ls1043ardb and ls1043aqds. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1012a: Update Refresh cycle for DDRPrabhakar Kushwaha2016-08-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refresh cycle value must be selected based on the frequency of DDR. tREFI = 7.8 us as per JEDEC. The value for MDREF[REF_CNT] should be based on round up (tREFI/tCK) formula. For 500MHz, mdref value should be 0x0f3c8000. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1012a: Enable DDR row-bank-column decodingPrabhakar Kushwaha2016-08-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable DDR row-bank-column decoding to decode DDR address as row-bank-column instead of bank-row-column for improving performance of serial data transfers. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | board: ls1012aqds: Update LBMAP_MASK and RST_CTL_RESETPrabhakar Kushwaha2016-08-02-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | qixis_reset altbank usagge ~QIXIS_LBMAP_MASK in code. So define inverse value QIXIS_LBMAP_MASK. Also, update QIXIS_RST_CTL_RESET value to keep RST_CTL[REQ_MOD] as 0b11 i.e. PORESET during qixis_reset Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | ARM64: zynqmp: Fix stack pointer initializationSoren Brinkmann2016-08-02-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This partly reverts commit: "ARM64: zynqmp: Add SPL support support" (sha1: e6a9ed04e78cf87ec97e306fa4e7a1669ef98df6) Stack can rewrite ATF code. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | ARM64: zynqmp: Define config USB_STORAGE through defconfigMichal Simek2016-08-02-1/+0
|/ / | | | | | | | | | | | | Define config USB_STORAGE through defconfig for all Xilinx ZynqMP boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | rockchip: add support for rk3288 PopMetal boardjk.kernel@gmail.com2016-07-31-0/+26
| | | | | | | | | | | | | | | | | | PopMetal is a rockchip rk3288 based board made by ChipSpark, which has many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and Gigabit Ethernet. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: add basic support for fennec-rk3288 boardjk.kernel@gmail.com2016-07-31-0/+26
| | | | | | | | | | | | | | | | | | | | Fennec is a RK3288-based development board with 2 USB ports, HDMI, micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access to display pins, I2C, SPI, UART and GPIOs. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: rk3288: move evb board to rockchip folderjk.kernel@gmail.com2016-07-31-0/+0
| | | | | | | | | | | | | | | | The 'evb-rk3288' is not a vendor name, change it to 'rockchip' which is the real vendor name. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: rk3288: revise CONFIG_FASTBOOT_BUF_ADDRjk.kernel@gmail.com2016-07-31-3/+1
| | | | | | | | | | | | | | | | CONFIG_SYS_LOAD_ADDR is absolutely safe to store image for fastboot. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: remove the duplicated macro configjk.kernel@gmail.com2016-07-31-4/+0
| | | | | | | | | | | | | | | | CONFIG_DOS_PARTITION and CONFIG_EFI_PARTITION are already included in config_distro_defaults.h, and we don't need them in SPL stage. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: rk3288: disable fastboot in SPL stagejk.kernel@gmail.com2016-07-31-1/+1
| | | | | | | | | | | | | | Reduce compilation time for SPL. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | configs: rockchip: remove no use MACROKever Yang2016-07-31-5/+0
| | | | | | | | | | | | | | | | The CONFIG_ROCKCHIP_COMMON and CONFIG_SPL_ROCKCHIP_COMMON are no use now, remove them. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-06 16:26:17 +0000