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* 85xx: fix the wrong DDR settings for MPC8572DSDave Liu2008-12-04-13/+13
| | | | | | | | The default DDR freq is 400MHz or 800M data rate, the old settings is pure wrong for the default case. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* FSL: Moved BR_PHYS_ADDR for localbus to common headerKumar Gala2008-12-04-9/+8
| | | | | | | | | | | The BR_PHYS_ADDR macro is useful on all machines that have local bus which is pretty much all 83xx/85xx/86xx chips. Additionally most 85xx & 86xx will need it if they want to support 36-bit physical addresses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
* 85xx: Add PORDEVSR_PCI1 definePeter Tyser2008-12-04-2/+1
| | | | | | | | | Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Removed unused CONFIG_L1_INIT_RAM symbol.Jon Loeliger2008-12-03-30/+0
| | | | | | | | Prevent further viral propogation of the unused symbol CONFIG_L1_INIT_RAM by just removing it. Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* 85xx: remove the unused ddr_enable_ecc in the board fileDave Liu2008-12-03-4/+5
| | | | | | | | | | The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2008-11-25-102/+94
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| * ppc4xx: Remove unused featuresMatthias Fuchs2008-11-25-50/+7
| | | | | | | | | | | | | | | | This patch disables some unused features from the PCI405 configuration to keep U-Boot image size below 192k. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: katmai: Change default configYuri Tikhonov2008-11-21-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables support for EXT2, and increases the CONFIG_SYS_BOOTMAPSZ size for the default configuration of the katmai boards to use them as the RAID-reference AMCC setups. EXT2 enabling allows one to boot kernels from the EXT2 formatted Compact Flash cards. CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the Linux kernels, which use PAGE_SIZE of 256KB. Otherwise, the memory area with DTB file (which is placed at the end of the bootmap area) will turn out to be overlapped with the BSS segment of the 256KB kernel, and zeroed in early_init() of Linux. Actually, increasing of the bootmap size could be done via setting of the bootm_size U-Boot variable, but it looks like the current U-Boot implementation have some bootm_size- related functionality lost. In many places through the U-Boot code the CONFIG_SYS_BOOTMAPSZ definition is used directly (instead of trying to read the corresponding value from the environment). The same is truth for the boot_jump_linux() function in lib_ppc/bootm.c, where U-Boot transfers control to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size) value to the booting kernel. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initializationDave Mitchell2008-11-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Expanded OCM TLB to allow access to 64K OCM as well as 256K of internal SRAM. Adjusted internal SRAM initialization to match updated user manual recommendation. OCM & ISRAM are now mapped as follows: physical virtual size ISRAM 0x4_0000_0000 0xE300_0000 256k OCM 0x4_0004_0000 0xE304_0000 64k A single TLB was used for this mapping. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRsDave Mitchell2008-11-21-39/+75
| | | | | | | | | | | | | | | | | | | | | | Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and L2 cache DCRs from ppc440.h to this new header. Also converted these DCR defines from lowercase to uppercase and modified referencing modules to use them. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.hSteven A. Falco2008-11-21-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed. The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, and are unused, so they can be removed too. A definition for SDR0_DDRCFG is added. Signed-off-by: Steven A. Falco <sfalco@harris.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2008-11-25-7/+9
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| * | powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* definesHeiko Schocher2008-11-19-1/+3
| | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: Improve the performance of DDR memoryHoward Gregory2008-11-19-6/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | modify the CAS timings. my understanding is that these settings decrease various wait times in the DDR interface. Because these wait times are in clock cycles, and the DDR clock on the 8315 RDB runs slower than on some other 83xx platforms, we can dial down these values without a problem, thereby decreasing the latency of memory a little. Signed-off-by: Howard Gregory <Greg.Howard@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2008-11-25-387/+718
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| * | ARM: Add Apollon UBI supportKyungmin Park2008-11-19-17/+57
| | | | | | | | | | | | | | | | | | | | | | | | To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI macro. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | UBI: Add basic UBI support to U-Boot (Part 8/8)Kyungmin Park2008-11-19-521/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic UBI (Unsorted Block Image) support to U-Boot. It's based on the Linux UBI version and basically has a "OS" translation wrapper that defines most Linux specific calls (spin_lock() etc.) into no-ops. Some source code parts have been uncommented by "#ifdef UBI_LINUX". This makes it easier to compare this version with the Linux version and simplifies future UBI ports/bug-fixes from the Linux version. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | UBI: Add basic UBI support to U-Boot (Part 7/8)Kyungmin Park2008-11-19-0/+454
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic UBI (Unsorted Block Image) support to U-Boot. It's based on the Linux UBI version and basically has a "OS" translation wrapper that defines most Linux specific calls (spin_lock() etc.) into no-ops. Some source code parts have been uncommented by "#ifdef UBI_LINUX". This makes it easier to compare this version with the Linux version and simplifies future UBI ports/bug-fixes from the Linux version. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | UBI: Add basic UBI support to U-Boot (Part 6/8)Kyungmin Park2008-11-19-0/+358
| |/ | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic UBI (Unsorted Block Image) support to U-Boot. It's based on the Linux UBI version and basically has a "OS" translation wrapper that defines most Linux specific calls (spin_lock() etc.) into no-ops. Some source code parts have been uncommented by "#ifdef UBI_LINUX". This makes it easier to compare this version with the Linux version and simplifies future UBI ports/bug-fixes from the Linux version. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-cfi-flashWolfgang Denk2008-11-25-0/+12
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| * | cfi-mtd: Add cfi-mtd driver.Piotr Ziecik2008-11-24-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cfi-mtd driver, which exports CFI flash to MTD layer. This allows CFI flash devices to be used from MTD layer. Building of the new driver is controlled by CONFIG_FLASH_CFI_MTD option. Initialization is done by calling cfi_mtd_init() from flash_init(). Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | cfi_flash: Add interface for flash verbosity controlPiotr Ziecik2008-11-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add interface for flash verbosity control. It allows to disable output from low-level flash API. It is useful when calling these low-level functions from context other than flash commands (for example the MTD/CFI interface implmentation). Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | cfi_flash: Export flash_sector_size() function.Piotr Ziecik2008-11-24-0/+3
| |/ | | | | | | | | | | | | | | Export flash_sector_size() function from drivers/mtd/cfi_flash.c, so that it can be used in the upcoming cfi-mtd driver. Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | at91rm9200: fix broken boot from nor flashJens Scharsig2008-11-24-0/+10
| | | | | | | | | | | | | | This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if CONFIG_AT91RM9200 is defined and nor preloader is used. Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
* | AT91: Enable PLLB for USBStelian Pop2008-11-21-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly. This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs: - AT91CAP9 - AT91SAM9260 - AT91SAM9263 This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 atmel boards. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | AT91: Use AT91_CPU_CLOCK in displaysStelian Pop2008-11-21-15/+21
|/ | | | | | | | | | Introduce AT91_CPU_CLOCK and use it for displaying the CPU speed in the LCD driver. Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the corresponding board clocks. Signed-off-by: Stelian Pop <stelian@popies.net>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc86xxWolfgang Denk2008-11-18-94/+251
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| * mpc8641: Try to detect old .dts filesBecky Bruce2008-11-10-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Since we've changed the memory map of the board, be nice and add some checking to try to catch out-of-date .dts files. We do this by checking the CCSRBAR location in the .dts and comparing it to the CCSRBAR location in u-boot. If they don't match, a warning msg is printed. This isn't foolproof, but it's simple and will catch most of the cases where an out-of-date .dts is present, including all of the cases where a new u-boot is used with an old standard MPC8641 .dts file as supplied with Linux. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: Support 36-bit physical addressingBecky Bruce2008-11-10-36/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch creates a memory map with all the devices in 36-bit physical space, in addition to the 32-bit map. The CCSR relocation is moved (again, sorry) to allow for the physical address to be 36 bits - this requires translation to be enabled. With 36-bit physical addressing enabled, we are no longer running with VA=PA translations. This means we have to distinguish between the two in the config file. The existing region name is used to indicate the virtual address, and a _PHYS variety is created to represent the physical address. Large physical addressing is not enabled by default. Set CONFIG_PHYS_64BIT in the config file to turn this on. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: Change 32-bit memory mapBecky Bruce2008-11-10-37/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory map on the 8641hpcn is modified to look more like the 85xx boards; this is a step towards a more standardized layout going forward. As part of this change, we now relocate the flash. The regions for some of the mappings were far larger than they needed to be. I have reduced the mappings to match the actual sizes supported by the hardware. In addition I have removed the comments at the head of the BAT blocks in the config file, rather than updating them. These get horribly out of date, and it's a simple matter to look at the defines to see what they are set to since everything is right here in the same file. Documentation has been changed to reflect the new map, as this change is user visible, and affects the OS which runs post-uboot. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLYBecky Bruce2008-11-10-1/+29
| | | | | | | | | | | | | | | | | | | | | | We define CONFIG_MONITOR_BASE_EARLY to define the initial location of the bootpage in flash. Use this to create an early mapping definition for the FLASH, and change the early_bats code to use this. This change facilitates the relocation of the flash since the early mappings are no longer tied to the final location of the flash. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: make DIAG_ADDR == FLASH_BASEBecky Bruce2008-11-10-1/+1
| | | | | | | | | | | | Currently, that's what it is, but it's hardcoded. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: Drop imaginary second flash bank, map 8MBBecky Bruce2008-11-10-27/+14
| | | | | | | | | | | | | | | | | | There's a lot of setup and foo for the second flash bank. The problem is, this board doesn't actually have one. Clean this up. Also, the flash is 8M in size. Get rid of the confusing aliased overmapping, and just map 8M. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: only define CONFIG_ENV_SIZE onceBecky Bruce2008-11-10-2/+1
| | | | | | | | | | | | | | | | It's currently defined twice inside in an if/else block, but both halves set the same value. Move the define outside the if. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: Remove extra "0" from BR2 defineBecky Bruce2008-11-10-1/+1
| | | | | | | | Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * Merge commit 'wd/master'Jon Loeliger2008-11-10-2699/+2982
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| * | powerpc: change 86xx SMP boot methodBecky Bruce2008-11-04-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | We put the bootpg for the secondary cpus into memory and use BPTR to get to it. This is a step towards converting to the ePAPR boot methodology. Also, the code is written to deal properly with more than 4GB of RAM. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * | 8641HPCN: Config file cleanupBecky Bruce2008-11-03-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several items in the config file that were hardcoded but that should really be based on other config options, since the regions are contiguous and depend on being so. This cleans that up a bit. Also, add BR_PHYS_ADDR() macro to convert addresses into the proper format for BR registers. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * | powerpc 86xx: Handle CCSR relocation earlierBecky Bruce2008-11-03-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the CCSR gets relocated while translation is enabled, meaning we need 2 BAT translations to get to both the old location and the new location. Also, the DEFAULT CCSR location has a dependency on the BAT that maps the FLASH region. Moving the relocation removes this unnecessary dependency. This makes it easier and more intutive to modify the board's memory map. Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same BAT for CCSR space. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * | mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI buildBecky Bruce2008-11-03-9/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | You can't actually have both, and with some coming changes to change the memory map for the board and support 36-bit physical, we need the extra BAT that is being consumed by having both. I also make non-PCI configs build cleanly, for the sake of sanity. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * | mpc8641: Stop supporting non-PCI_PNP configsBecky Bruce2008-11-03-6/+0
| | | | | | | | | | | | | | | | | | | | | We don't actually ever do this, remove the code so we can stop maintaining it. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* | | Moved initialization of PPC4xx EMAC to cpu_eth_init()Ben Warren2008-11-09-0/+1
| | | | | | | | | | | | | | | | | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
* | | Changed PPC4xx EMAC driver to require CONFIG_PPC4xx_EMACBen Warren2008-11-09-0/+50
| | | | | | | | | | | | | | | | | | | | | All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
* | | Moved initialization of MPC8XX SCC to cpu_eth_init()Ben Warren2008-11-09-0/+1
| | | | | | | | | | | | | | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Moved initialization of MPC8220 FEC to cpu_eth_init()Ben Warren2008-11-09-0/+1
| | | | | | | | | | | | | | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Moved initialization of QE Ethernet controller to cpu_eth_init()Ben Warren2008-11-09-0/+1
| | | | | | | | | | | | | | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Moved initialization of FCC Ethernet controller to cpu_eth_initBen Warren2008-11-09-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Affected boards: Several MPC8xx boards Several MPC8260/MPC8272 boards Several MPC85xx boards Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | net: Move initialization of Au1x00 SoC ethernet MAC to cpu_eth_initShinya Kuribayashi2008-11-09-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch will move au1x00_eth_initialize from net/eth.c to cpu_eth_init as a part of ongoing eth_initialize cleanup work. The function ret value is also fixed as it should be negative on fail. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Moved initialization of IXP4XX_NPE Ethernet controller to cpu_eth_init()Ben Warren2008-11-09-0/+1
| |/ |/| | | | | | | | | Also, removed the driver initialization from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2008-11-09-3/+169
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