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* Rename getenv_r() into getenv_f()Wolfgang Denk2010-08-04-1/+1
| | | | | | | | | | | | | | | | | | | While running from flash, i. e. before relocation, we have only a limited C runtime environment without writable data segment. In this phase, some configurations (for example with environment in EEPROM) must not use the normal getenv(), but a special function. This function had been called getenv_r(), with the idea that the "_r" suffix would mean the same as in the _r_eentrant versions of some of the C library functions (for example getdate vs. getdate_r, getgrent vs. getgrent_r, etc.). Unfortunately this was a misleading name, as in U-Boot the "_r" generally means "running from RAM", i. e. _after_ relocation. To avoid confusion, rename into getenv_f() [as "running from flash"] Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-08-04-11/+757
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| * powerpc/85xx: configure autocompletion supportKim Phillips2010-08-01-11/+30
| | | | | | | | | | | | | | because it's convenient. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/p4080: Add support for the P4080DS boardKumar Gala2010-08-01-0/+692
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the P4080DS board, with the following features: * 36-bit only * Boots from NOR flash * FMAN drivers NOT supported * SPD DDR initialization Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Lan Chunhe-B25806 <b25806@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/p2020ds: Integrated with P2020DS DDR change and enabled hwconfigyork2010-07-26-0/+6
| | | | | | | | | | | | | | | | Enabled SPD Enabled DDR2 Enabled hwconfig Signed-off-by: York Sun <yorksun@freescale.com>
| * powerpc/8xxx: Enable DDR3 RDIMM supportyork2010-07-26-0/+14
| | | | | | | | | | | | | | | | | | Enabled registered DIMMs using data from SPD. RDIMMs have registers which need to be configured before using. The register configuration words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software should read those RCWs and put into DDR controller before initialization. Signed-off-by: York Sun <yorksun@freescale.com>
| * powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4york2010-07-26-0/+2
| | | | | | | | | | | | | | | | | | Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual rank with 512MB each rank. Also check dimm size and rank size for memory controller interleaving Signed-off-by: York Sun <yorksun@freescale.com>
| * fdt: Add function to alloc phandle valuesKumar Gala2010-07-26-0/+1
| | | | | | | | | | | | | | | | | | | | If we are creating reference (handles) to nodes in a device tree we need to first create a new phandle in node and this needs a new phandle value. So we search through the whole dtb to find the max phandle value and return the next greater value for a new phandle allocation. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
| * powerpc/p2020: Move INIT_RAM_ADDR physical address higher for 36-bit for P2020DSyork2010-07-26-0/+12
| | | | | | | | | | | | | | If 36-bit is enabled, move INIT_RAM_ADDR physical address higher to free lowest 4GB address space. Signed-off-by: York Sun <yorksun@freescale.com>
* | Blackfin: bf533/bf561 boards: convert to new soft gpio i2c codeMike Frysinger2010-07-25-175/+11
|/ | | | | | | | Use the new common gpio framework to simplify and unify the soft i2c configuration settings. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
* fs/fat: Big code cleanup.Wolfgang Denk2010-07-24-34/+29
| | | | | | | | - reformat - throw out macros like FAT_DPRINT and FAT_DPRINT - remove dead code Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-07-24-14/+23
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| * ppc4xx: Enable "ecctest" command on t3corpStefan Roese2010-07-23-0/+1
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Enable "ecctest" command on katmaiStefan Roese2010-07-23-0/+1
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: T3CORP fixes and updatesStefan Roese2010-07-23-14/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes some problems for the T3CORP board. Here the list of the changes: - Add 600-67 and 677 CPU frequency setting to chip_config command - Define CONFIG_DDR_RFDC_FIXED on t3corp: While using the "normal" auto calibration code, sometimes values for RFDC were picked (>= T3) that resulted in a non-working U-Boot (hang upon relocation, while running from SDRAM). With this optimized RFDC value we can force this register and use the auto-calibration code to setup the remaining calibration registers. - Increase sizes of FPGA chips selects - EBC timing updated OEN=3 for 66 MHz EBC speed - Change ext. IRQ2 setup to level-low active - Enable CONFIG_SYS_CFI_FLASH_STATUS_POLL By defining CONFIG_SYS_CFI_FLASH_STATUS_POLL, DQ7 is polled to detect the chip busy status. This is now used instead of the data toggle method which is used historically by default in the common CFI driver. With this change a problem with not written data is solved on this board, where a 32 byte block of data is still erased instead of filled with the correct content after these commands: => erase 0xfc100000 +0x1000000 .................................................................... done Erased 128 sectors => cp.b 0x100000 0xfc100000 0x1000000 Copy to Flash... done => cmp.b 0x100000 0xfc100000 0x1000000 byte at 0x00d0d6c0 (0x00) != byte at 0xfcd0d6c0 (0xff) Total of 12637888 bytes were the same Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx/Canyonlands added USB board callbacksRupjyoti Sarmah2010-07-23-0/+8
| | | | | | | | | | | | | | | | | | | | Functions added to support board callbacks for USB init. This isolates USB manipulations such that it is only touched if USB is used by U-Boot. Signed-off-by: Dave Mitchell <dmitchell@appliedmicro.com> Signed-off-by: Rupjyoti Sarmah <rsarmah@appliedmicro.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | powerpc/85xx: Rework P1022 SERDES is_serdes_configured supportKumar Gala2010-07-21-0/+1
| | | | | | | | | | | | | | | | | | | | Move serdes init until after we are in ram so we can keep track of a global static protocal map for the particular serdes config we are in. This makes is_serdes_configured() much simplier and not constantly reading registers to determine if a given device is enabled based on the protocol. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured supportKumar Gala2010-07-21-0/+1
| | | | | | | | | | | | | | | | | | | | Move serdes init until after we are in ram so we can keep track of a global static protocal map for the particular serdes config we are in. This makes is_serdes_configured() much simplier and not constantly reading registers to determine if a given device is enabled based on the protocol. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fdt: Add fdt_node_offset_by_compat_reg helperKumar Gala2010-07-20-0/+2
| | | | | | | | | | | | | | | | | | | | | | Given a compatible string and physical address try and find a node that matches. This is useful when we want to find a specific device node to update (for example if we have multiple PCI nodes we can use the physical address to distinguish them when trying to update the device tree). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* | fdt: Add fdt_translate_address to convert reg node to cpu phys addrKumar Gala2010-07-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This code is extracted out of the Linux Kernel code from arch/powerpc/kernel/prom_parse.c. We maintain some of the same structure to support multiple bus types even though we only have one in the current code. In the future we might want to translate across a PCI bus and thus it will be easier to add that functionality back in. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* | powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641Kumar Gala2010-07-20-66/+64
| | | | | | | | | | | | | | | | The MPC8641 boards actually only have PCIE not PCI. Rename so we are uniform with regards to names so we can replace this code with templated code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.hKumar Gala2010-07-20-12/+0
| | | | | | | | | | | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on MPC8641 boards since its really PCIE controllers and not PCI. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Move PCI/PCIe address defines into common immap_85xx.hKumar Gala2010-07-20-49/+0
|/ | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-videoWolfgang Denk2010-07-17-1/+1
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| * video: cleanup comments in cfb_console.c and video_fb.hAnatolij Gustschin2010-07-17-1/+1
| | | | | | | | Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Drop support for GTH boardWolfgang Denk2010-07-17-421/+0
|/ | | | | | | | | | | | | | | The board maintainer states: The GTH board is obsolete and has not been manufactured for several years. To my knowledge, no recent U-Boot build has been tested on that card. So drop support for this board. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Thomas Lange <thomas@corelatus.se> Acked-by: Thomas Lange<thomas@corelatus.se>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-07-16-32/+518
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| * ppc/85xx: Convert MPC8536DS to using board common ICS307 codeKumar Gala2010-07-16-9/+5
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * ppc/85xx: Convert MPC8572DS to using board common ICS307 codeKumar Gala2010-07-16-9/+5
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add command to report errata workaroundsKumar Gala2010-07-16-3/+3
| | | | | | | | | | | | | | | | | | Add 'errata' command to report what errata we workaround. Report workaround for erratum SATA-A001 on P1022/P1013. Also sorted the CONFIG_CMD_* list. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc: add support for the Freescale P1022DS reference boardTimur Tabi2010-07-16-0/+470
| | | | | | | | | | | | | | | | | | | | | | | | | | Specifics: 1) 36-bit only 2) Booting from NOR flash only 3) Environment stored in NOR flash only 4) No SPI support 5) No DIU support Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx/p1_p2_rdb: PCIe E1000 card support added.Poonam Aggrwal2010-07-16-0/+1
| | | | | | | | | | | | | | | | Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter configuration support for P1/P2 RDB. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc85xx: Add reginfo commandBecky Bruce2010-07-16-0/+23
| | | | | | | | | | | | | | | | The new command dumps the TLBCAM, the LAWs, and the BR/OR regs. Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 83xx/85xx/86xx: LBC register cleanupBecky Bruce2010-07-16-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc: Update configs to properly set FSL_ELBCBecky Bruce2010-07-16-0/+6
| | | | | | | | | | | | | | | | | | | | | | Some parts that have an Enhanced Local Bus Controller weren't setting CONFIG_FSL_ELBC. Fix this so we can use this define properly going forward (currently it's only used if PHYS_64BIT is set, which meant not all platforms needed to have it set correctly). Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx/p1_p2_rdb: enable hwconfigPoonam Aggrwal2010-07-16-0/+2
| | | | | | | | | | Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Move ICS CLK chip frequency calculation code into a common board libraryKumar Gala2010-07-16-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it. Convert the P2020DS board as the first to use the new common ICS307 code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Timur Tabi <timur@freescale.com>
| * powerpc/8xxx: Distinguish between incompatible SEC h/w typesKim Phillips2010-07-16-1/+1
| | | | | | | | | | | | | | | | | | CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x. Parts with newer SEC h/w versions will increment the number to accomodate incompatible code changes. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-pxaWolfgang Denk2010-07-15-1/+861
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| * | PXA: ZipitZ2 supportMarek Vasut2010-07-14-0/+259
| | | | | | | | | | | | | | | | | | This patch adds support for Aeronix Zipit Z2 handheld. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Toradex Colibri PXA270 supportMarek Vasut2010-07-14-0/+278
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Voipac PXA270 SupportMarek Vasut2010-07-14-0/+323
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Voipac PXA270 board. The support includes: - Ethernet - USB - MMC - NOR Booting - OneNAND Booting - LCD - HDD Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Scott Wood <scottwood@freescale.com>
| * | Enable PXAFB for PXA27X and PXA3XXMarek Vasut2010-07-14-1/+1
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* | Merge branch 'master' of ../masterWolfgang Denk2010-07-15-755/+1356
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| * Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2010-07-14-628/+0
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| | * nios2: remove EP1C20, EP1S10, EP1S40 boardsThomas Chou2010-07-12-628/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The example configuration files of nios2-generic board can generated binary to run on the EP1C20, EP1S10, and EP1S40 boards. So the three boards can be removed. With nios2-generic approach, the fpga parameter header file can be generated from hardware designs using tools. Porting u-boot for nios2 boards is simplified. Vendors can supply their fpga parameter file or patches to add a new nios2-generic board instance. There is no need to include other boards support for nios2 in the u-boot mainline. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-07-14-8/+1090
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| | * | 83xx: add support for ve8313 boardHeiko Schocher2010-07-09-0/+511
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the ve8313 board based on Freescale MPC8313 CPU. - serial console on UART 1 - 128 MB DDR RAM - 32 MB NOR Flash - 16 MB NAND Flash - Ethernet MII Mode over on TSEC0 - micrel ksz804 phy - Hardware WDT MAX824 changes since v1 - Environment size = sector size - use red. environment - add comments from Kim Phillips - add MAKEALL, MAINTAINERS entry - Codingstyle issues fixed - inserted original Copyrights - PCI subsys vendor ID changed from 0x1057 (Motorola) to 0x1957 (Freescale) changes since v2 - add comments from Wolfgang Denk - fix Codingstyle and some comments - reworked WDT reset (just toggling the WD_TRIG pin) - Environment size now 16KiB - fixed RAMBOOT version - fixed CONFIG_SYS_LOAD_ADDR - renamed CONFIG_TSEC1_NAME to TSEC1 Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | MPC8308RDB: minimal support for devboard from FreescaleIlya Yanok2010-07-09-0/+560
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support for MPC8308RDB development board from Freescale with a minimal set of features: Dual UART is supported NOR flash is supported Both TSEC Ethernet controllers are supported PCI Express initialization is supported The following features are enabled in configuration but not fully tested: I2C (used to get the board revision) I2C-connected RTC VSC7385 switch There is one (hopefully) minor issue: on soft reset the board sometimes resets twice. I've not managed to find the fix for this problem yet. As a workaround instruction cache can be disabled. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | mpc8308: support for Freescale MPC8308 cpuIlya Yanok2010-07-09-8/+19
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for Freescale MPC8308 CPU. Serial ports, NOR flash and integrated Ethernet controllers are supported. PCI Express is also supported. eSDHC, NAND and USB may work but aren't tested (using ULPI PHY requires additional patch). Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
generated by cgit v1.1 at 2024-12-30 20:37:19 +0000