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* xpedite5370: Enable multi-core supportPeter Tyser2009-10-27-0/+8
| | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: MP Boot Page Translation updatePeter Tyser2009-10-27-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change has 3 goals: - Have secondary cores be released into spin loops at their 'true' address in SDRAM. Previously, secondary cores were put into spin loops in the 0xfffffxxx address range which required that boot page translation was always enabled while cores were in their spin loops. - Allow the TLB window that the primary core uses to access the secondary cores boot page to be placed at any address. Previously, a TLB window at 0xfffff000 was always used to access the seconary cores' boot page. This TLB address requirement overlapped with other peripherals on some boards (eg XPedite5370). By default, the boot page TLB will still use the 0xfffffxxx address range, but this can be overridden on a board-by-board basis by defining a custom CONFIG_BPTR_VIRT_ADDR. Note that the TLB used to map the boot page remains in use while U-Boot executes. Previously it was only temporarily used, then restored to its initial value. - Allow Boot Page Translation to be disabled on bootup. Previously, Boot Page Translation was always left enabled after secondary cores were brought out of reset. This caused the 0xfffffxxx address range to somewhat "magically" be translated to an address in SDRAM. Some boards may not want this oddity in their memory map, so defining CONFIG_MPC8xxx_DISABLE_BPTR will turn off Boot Page Translation after the secondary cores are initialized. These changes are only applicable to 85xx boards with CONFIG_MP defined. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx/pci: fsl_pci_init: pcie agent mode supportVivek Mahajan2009-10-27-1/+2
| | | | | | | | | | | | | | | Originally written by Jason Jin and Mingkai Hu for mpc8536. When QorIQ based board is configured as a PCIe agent, then unlock/enable inbound PCI configuration cycles and init a 4K inbound memory window; so that a PCIe host can access the PCIe agents SDRAM at address 0x0 * Supported in fsl_pci_init_port() after adding pcie_ep as a param * Revamped copyright in drivers/pci/fsl_pci_init.c * Mods in 85xx based board specific pci init after this change Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master-sync' of git://git.denx.de/u-boot-armWolfgang Denk2009-10-24-1215/+1763
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| * s5pc1xx: SMDKC100: fix compile warningsMinkyu Kang2009-10-24-112/+112
| | | | | | | | | | | | | | fix the following compile warnings warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * TI OMAP3 SDP3430: Initial SupportTom Rix2009-10-24-0/+369
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start of support of Texas Instruments Software Development Platform(SDP) for OMAP3430 - SDP3430 Highlights of this platform are: Flash Memory devices: Sibley NOR, Micron 8bit NAND and OneNAND Connectivity: 3 UARTs and expanded 4 UART ports + IrDA Ethernet, USB Other peripherals: TWL5030 PMIC+Audio+Keypad VGA display Expansion ports: Memory devices plugin boards (PISMO) Connectivity board for GPS,WLAN etc. Completely configurable boot sequence and device mapping etc. Support default jumpering and: - UART1/ttyS0 console(legacy sdp3430 u-boot) - UART3/ttyS2 console (matching other boards, and SDP HW docs) - Ethernet - mmc0 - NOR boot Currently the UART1 is enabled by default. for compatibility with other OMAP3 u-boot platforms, enable the #define of CONSOLE_J9. Conflicts: Makefile Fixed the conflict with smdkc100_config by moving omap_sdp3430_config to it is alphabetically sorted location above zoom1. Signed-off-by: David Brownell <david-b@pacbell.net> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * TI DaVinci: Adding Copyright for DM365 EVMSandeep Paulraj2009-10-24-0/+1
| | | | | | | | | | | | | | Forgot to add Copyright while submitting the patch. This patch adds the copyright. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci: Fix DM6467 EVM Compilation WarningSandeep Paulraj2009-10-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | Due to new TI boards being added to U-Boot, the hardware.h is getting very messy. The warning being fixed is due to the EMIF addresses being redefined. The long term solution(after 2009.11) to this is to have SOC specific header files. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI OMAP3: make gpmc_config as constNishanth Menon2009-10-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | gpmc_config should not be a variant as it is board specific hence make it a const parameter Fixes issues identified by Dirk: - build issue for zoom2 - warnings for all other OMAP3 platforms using nand/onenand etc Signed-off-by: Nishanth Menon <nm@ti.com>
| * OMAP3: export enable_gpmc_cs_config to board filesNishanth Menon2009-10-18-0/+2
| | | | | | | | | | | | | | | | | | Export enable_gpmc_cs_config into common header to prevent warning: warning: implicit declaration of function 'enable_gpmc_cs_config' Signed-off-by: Nishanth Menon <nm@ti.com>
| * TI DaVinci Sonata: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF fot the DM644x based Sonata Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DVEVM: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF in the DVEVM config. Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DM365: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM365 EVM config. Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DM355: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM355 EVM config. Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI: OMAP3: Remove SZ_xx referencesSandeep Paulraj2009-10-18-56/+49
| | | | | | | | | | | | | | This patch removes dependency on the sizes.h header file and removes all references to SZ_xx. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * OMAP3: Update Overo and Beagle environmentSteve Sakoman2009-10-18-16/+38
| | | | | | | | | | | | | | | | Update default environment to support new kernel DSS2 subsystem and simplify rootfs type and location changes. Signed-off-by: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
| * TI: DaVinci: DM355 Leopard board supportSandeep Paulraj2009-10-18-0/+162
| | | | | | | | | | | | | | This patch adds support for the leopard board which is based on the DM355 SOC. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * TI DaVinci DM646x: Adding initial support for DM6467 EVMSandeep Paulraj2009-10-18-0/+132
| | | | | | | | | | | | | | This patch adds the initial support for DM6467 EVM. Other features like NET and NAND support will be added as follow up patches. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * AT91 CPUAT91 Fix compiler warningEric Benard2009-10-18-2/+2
| | | | | | | | | | | | | | | | | | | | This change fixes the compiler warning main.c: In function 'abortboot': main.c:122: warning: too few arguments for format Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * AT91 CPU9260 CPU9G20 Fix compile warningsEric Benard2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | This change fixes the compiler warning nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output! Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| * Clean-up of s3c24x0 header fileskevin.morfitt@fearnside-systems.co.uk2009-10-13-1121/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch re-formats the arm920t s3c24x0 header files in preparation for changes to add support for the Embest SBC2440-II Board. The changes are as follows: - re-indent the code using Lindent - make sure register layouts are defined using a C struct - replace the upper-case typedef'ed C struct names with lower case non-typedef'ed ones - make sure registers are accessed using the proper accessor functions - run checkpatch.pl and fix any error reports It assumes the following patch has been applied first: - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009 - patch 1/4 of this series Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400, smdk2410 and trab configs to use the mtd nand driver (which isn't used by any board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or errors were found. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boardskevin.morfitt@fearnside-systems.co.uk2009-10-13-20/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and s3c2410 cpu's which fixes various problems such as the timeouts in tftp being too short. Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no new warnings or errors were found. It was originally submitted on 21/06/2009 but didn't get into the 2009.08 release, and Jean-Pierre made one comment on the original patch (see http://lists.denx.de/pipermail/u-boot/2009-July/055470.html). I've made two changes to the original patch: - it's been re-based to the current release - I've re-named get_timer_raw() to get_ticks() in response to Jean-Pierre's comment This affects the sbc2410, smdk2400, smdk2410 and trab boards. I've copied it directly to the maintainers of all except the sbc2410 which doesn't have an entry in MAINTAINERS. Signed-off-by: Kevin Morfitt <kmorfitt@aselaptop-1.localdomain> Tested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * s5pc1xx: add support SMDKC100 boardMinkyu Kang2009-10-13-0/+242
| | | | | | | | | | | | | | Adds new board SMDKC100 that uses s5pc100 SoC Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
| * s5pc1xx: support serial driverMinkyu Kang2009-10-13-0/+7
| | | | | | | | | | | | | | | | This patch includes the serial driver for s5pc1xx. s5pc1xx uart driver needs own register setting and clock configuration. So, need to special driver. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * s5pc1xx: support onenand driverMinkyu Kang2009-10-13-0/+136
| | | | | | | | | | | | | | This patch includes the onenand driver for s5pc100 Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * s5pc1xx: support Samsung s5pc1xx SoCMinkyu Kang2009-10-13-0/+475
| | | | | | | | | | | | | | | | This patch adds support for the Samsung s5pc100 and s5pc110 SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2009-10-24-1/+18
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| * | ppc4xx: Sequoia: Add chip_config commandStefan Roese2009-10-23-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the Sequoia "bootstrap" command and replaces it with the now common command "chip_config". Please note that the patches with the dynamic PCI sync clock configuration have to be applied, before this one should go in. This is because Sequoia has 2 different bootstrap EEPROMs, and the old bootstrap command configured different values depending on the detected PCI async clock (33 vs. 66MHz). With the PCI sync clock patches, this is not necessary anymore. The PCI sync clock will be configured correctly on-the-fly now. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Add function to check and dynamically change PCI sync clockStefan Roese2009-10-23-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PPC440EP(x)/PPC440GR(x): In asynchronous PCI mode, the synchronous PCI clock must meet certain requirements. The following equation describes the relationship that must be maintained between the asynchronous PCI clock and synchronous PCI clock. Select an appropriate PCI:PLB ratio to maintain the relationship: AsyncPCIClk - 1MHz <= SyncPCIclock <= (2 * AsyncPCIClk) - 1MHz This patch now adds a function to check and reconfigure the sync PCI clock to meet this requirement. This is in preparation for some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this function to not violate the PCI clocking rules. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Update flash size in reg property of the NOR flash nodeStefan Roese2009-10-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Till now only the ranges in the ebc node are updated with the values currently configured in the PPC4xx EBC controller. With this patch now the NOR flash size is updated in the device tree blob as well. This is done by scanning the compatible nodes "cfi-flash" and "jedec-flash" for the correct chip select number. This size fixup is enabled for all AMCC eval board right now. Other 4xx boards may want to enable it as well, if this problem with multiple NOR FLASH sizes exists. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
| * | fdt: Add fdt_fixup_nor_flash_size() to fixup NOR FLASH size in dtbStefan Roese2009-10-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function can be used to update the size in the "reg" property of the NOR FLASH device nodes. This is necessary for boards with non-fixed NOR FLASH sizes. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Wolfgang Denk <wd@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2009-10-24-2/+2
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| * | mpc83xx: cosmetic comment update relating to SPD EEPROMPaul Gortmaker2009-10-09-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | commit 6d0f6bcf337c5261c08fabe12982178c2c489d76 did the big rename of CFG_ macros to CONFIG_SYS macros. But it missed a couple of instances within comments. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | mcc200: fix build errorWolfgang Denk2009-10-19-1/+1
| | | | | | | | | | | | | | | | | | | | | Fix compile error: include/configs/mcc200.h:401:6: error: #elif with no expression Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | mpc512x: fix System Clock Control constants for USB1 & USB2Martha Stan2009-10-18-2/+2
| | | | | | | | | | | | Signer-off-by: Martha Stan <mmarx@silicontkx.com>
* | | env: only build env_embedded and envcrc when neededMike Frysinger2009-10-18-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The env code is protected by the ENV_IS_EMBEDDED define, so attempting to compile the code when this isn't defined is pointless. Now that the env headers have unified around CONFIG_ENV_IS_EMBEDDED, convert the build system to only build the env objects when this is enabled. And now that the env code is conditionally compiled, we can drop the source code checks. For people who want to extract the environment manually, add a new option CONFIG_BUILD_ENVCRC that only enables the envcrc utility. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | galaxy5200: change cs1 configurationEric Millbrandt2009-10-18-1/+1
| | | | | | | | | | | | | | | | | | Correct the chip select configuration for the nand flash chip select. Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
* | | mpc86xx: delete unused MPC86xx_DDR_SDRAM_CLK_CNTL definePaul Gortmaker2009-10-16-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | This is an orphaned legacy leftover that is just polluting the config file namespace. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | ppc/P1_P2_RDB: On-chip BootROM supportDipen Dudhat2009-10-16-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | On Chip BootROM support for P1 and P2 series RDB platforms. This patch is derived from latest On Chip BootROM support on MPC8536DS Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | ppc/P1_P2_RDB: NAND Boot SupportDipen Dudhat2009-10-16-7/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | NAND Boot support for P1 and P2 series RDB platforms. This patch is derived from NAND Boot support on MPC8536DS. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-10-15-1/+3
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| * | Blackfin: Remove relocation fixupsMike Frysinger2009-10-13-1/+3
| | | | | | | | | | | | | | | | | | Blackfin pieces like commit 0630535e2d062dd73c1ceca5c6125c86d1127a49. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | at91: Update MEESC board supportDaniel Gorsulowski2009-10-13-17/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements several updates: -disable CONFIG_ENV_OVERWRITE -add new hardware style variants and set the arch numbers appropriate -pass the serial# and hardware revision to the kernel -removed unused macros from include/configs/meesc.h -fixed multiline comment style Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
* | | TI: OMAP3: Overo Tobi ethernet supportOlof Johansson2009-10-13-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded over tftp. This also refactors the smc911x driver to allow for detecting when the chip is missing. I.e. the detect_chip() function is called earlier and will abort gracefully when the Chip ID read returns all 1's. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Dirk Behme <dirk.behme@googlemail.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
* | | TI OMAP3 Use arm init sequence to initialize i2cTom Rix2009-10-13-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This changes fixes an early i2c error. It appears that I2C is working because once a read or write error is detected, the omap24xx_i2c driver calls i2c_init inside its error handling check. While it is ok to attempt error handling this way, the boards must not depend on this side effect to initialize it's i2c. Instead of explicitly calling i2c_init for every board, use the generic arm initialization in lib_arm/board.c. By defining the config variable CONFIG_HARD_I2C, the omap3 i2c initialization is included in the init_sequence table. Run tested on Beagle. Compile tested on the omap3's Signed-off-by: Tom Rix <Tom.Rix@windriver.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* | | TI: DaVinci: GPIO header file and definitionsSandeep Paulraj2009-10-13-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some DaVinci SOC's use GPIOs to enable EMAC and DM9000. This patch adds some definitions for GPIO registers and also adds structures for GPIO. A separate header file is being added so that in future we can have a DaVinci GPIO driver similer to OMAP. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Tom Rix <Tom.Rix@windriver.com>
* | | TI: DaVinci DM646x: Update flag used to represent DM646x SOC'sSandeep Paulraj2009-10-13-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the DaVinci specific code, we use both CONFIG_SOC_DM646X and CONFIG_SOC_DM646x to represent DM646x specific code. This patch changes occurrences of CONFIG_SOC_DM646x to CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use the flag CONFIG_SOC_DM644X. We want some uniformity. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Tom Rix <Tom.Rix@windriver.com>
* | | OMAP3 MMC: Fix warning dereferencing type-punned pointerDirk Behme2009-10-13-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix warning Dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> CC: Steve Sakoman <sakoman@gmail.com> Acked-by: Tom Rix <Tom.Rix@windriver.com>
* | | Support for the OpenRD base boardSimon Kagstrom2009-10-13-0/+220
| | | | | | | | | | | | | | | | | | | | | The implementation is borrowed from the sheevaplug board and the Marvell 1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
* | | Add support for Eukrea CPU9260/CPU9G20 SBCTom Rix2009-10-13-0/+453
| | | | | | | | | | | | | | | | | | | | | | | | | | | these boards are built around Atmel's AT91SAM9260/9G20 and have up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND and include a 10/100 Ethernet PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
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