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* [PATCH][NAND] Define the Vendor Id for Micron NAND FlashUlf Samuelsson2007-05-24-0/+1
| | | | | | Signed-off-by: Ulf Samuelsson <ulf@atmel.com> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Stefan Roese <sr@denx.de>
* Minor Coding Style cleanup, update CHANGELOG.Wolfgang Denk2007-05-16-24/+16
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xxWolfgang Denk2007-05-16-24/+885
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| * Fix memory initialization on MPC8349E-mITXTimur Tabi2007-05-01-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP. This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary on some ITX boards, notably those with a revision 3.1 CPU. Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Michael Benedict <MBenedict@twacs.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: replace elaborate boottime verbosity with 'clocks' commandKim Phillips2007-05-01-2/+0
| | | | | | | | | | | | and fix CPU: to align with Board: display text. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: minor fixups for 8313rdb introductionKim Phillips2007-04-25-2/+2
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| * mpc83xx: Add MPC8313ERDB support.Scott Wood2007-04-23-0/+569
| | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mpc83xx: Add generic PCI setup code.Scott Wood2007-04-23-0/+5
| | | | | | | | | | | | | | | | Board code can now request the generic setup code rather than having to copy-and-paste it for themselves. Boards should be converted to use this once they're tested with it. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mpc83xx: Add 831x support to global_data.hScott Wood2007-04-23-2/+4
| | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mpc83xx: Change PVR_83xx to PVR_E300C1-3, and update checkcpu().Scott Wood2007-04-23-13/+3
| | | | | | | | | | | | | | | | | | Rather than misleadingly define PVR_83xx as the specific type of 83xx being built for, the PVR of each core revision is defined. checkcpu() now prints the core that it detects, rather than aborting if it doesn't find what it thinks it wants. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mpc83xx: Add register definitions for MPC831x.Scott Wood2007-04-23-7/+301
| | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Coding Style Cleanup, new CHANGELOGWolfgang Denk2007-05-16-2/+2
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* | Merge with /home/wd/git/u-boot/custodian/u-boot-microblazeWolfgang Denk2007-05-16-17/+168
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| * | add: reading special purpose registersMichal Simek2007-05-08-11/+6
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| * | add: Microblaze V5 exception handlingMichal Simek2007-05-08-0/+9
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| * | add: FSL control read and writeMichal Simek2007-05-08-0/+15
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| * | Merge git://www.denx.de/git/u-bootMichal Simek2007-05-08-4497/+17826
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: include/asm-microblaze/microblaze_intc.h include/linux/stat.h
| * | | new: USE_MSR_INTR supportMichal Simek2007-05-07-0/+37
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| * | | new: fsl interrupt supportMichal Simek2007-05-07-0/+4
| | | | | | | | | | | | | | | | FSL_Has_data is connected to INTC.
| * | | fix: interrupt handler for multiple sourcesMichal Simek2007-05-07-0/+2
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| * | | new: add writing to msr registerMichal Simek2007-05-07-3/+9
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| * | | new: FSL and MSR support #2Michal Simek2007-05-05-0/+5
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| * | | new: FSL and MSR supportMichal Simek2007-05-05-0/+37
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| * | | [PATCH] MTD partition support, JFFS2 supportMichal Simek2007-04-24-3/+29
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| * | | [PATCH] SystemACE support for MicroblazeMichal Simek2007-04-21-15/+25
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| * | | 16bit read/write little endianMichal Simek2007-04-21-0/+4
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* | | | Merge with /home/wd/git/u-boot/masterWolfgang Denk2007-05-15-20/+96
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| * \ \ \ Merge with /home/tur/git/u-boot#motionproWolfgang Denk2007-05-15-20/+96
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| | * | | [Motion-PRO] Add MTD and JFFS2 support, also add default partitionPiotr Kruszynski2007-05-10-0/+9
| | | | | | | | | | | | | | | | | | | | definition.
| | * | | [Motion-PRO] Add support for I2C, EEPROM and RTC.Piotr Kruszynski2007-05-08-1/+29
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| | * | | [Motion-PRO] Add ATA support. Add CF-booting commands to the defaultBartlomiej Sieka2007-05-08-2/+23
| | | | | | | | | | | | | | | | | | | | environment.
| | * | | [Motion-PRO] Change IPB clock frequency from 50MHz to 100MHz. ThisBartlomiej Sieka2007-05-08-0/+7
| | | | | | | | | | | | | | | | | | | | eliminates networking problems in Linux (timeouts).
| | * | | [Motion-PRO] Enable Flat Device Tree support and modify default environmentBartlomiej Sieka2007-05-08-19/+30
| | | | | | | | | | | | | | | | | | | | to allow booting of FDT-expecting kernels.
* | | | | Get rid of duplicated file (see include/configs/sbc8560.h instead)Wolfgang Denk2007-05-07-410/+0
|/ / / / | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot messageGrzegorz Wianecki2007-05-05-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up message. Use PVR to distinguish between the two variants, and print proper CPU information. Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | | Coding stylke cleanup; update CHANGELOG.Wolfgang Denk2007-05-05-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-05-05-62/+23
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| * \ \ \ Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-05-05-0/+465
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| * | | | | ppc4xx: Detect if the sysclk on Sequoia is 33 or 33.333 MHzJeffrey Mann2007-05-05-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AMCC Secquoia board has been changed in a new revision from using a 33.000 MHz clock to a 33.333 MHz system clock. A bit in the CPLD indicates the difference. This patch reads that bit and uses the correct clock speed for the board. This code is backward compatable will all prior boards. All prior boards will be read as 33.000. Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | Merge with git://www.denx.de/git/u-boot.gitStefan Roese2007-04-29-1397/+1541
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| * | | | | ppc4xx: Bamboo: Use current NAND driver and *not* the legacy driverStefan Roese2007-04-29-60/+7
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | ppc4xx: Fix chip select timing for SysACE access on AMCC KatmaiStefan Roese2007-04-19-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous versions used full wait states for the chip select #1 which is connected to the Xilinix SystemACE controller on the AMCC Katmai evaluation board. This leads to really slow access and therefore low performance. This patch now sets up the chip select a lot faster resulting in much better read/write performance of the Linux driver. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xxWolfgang Denk2007-05-05-21/+1137
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| * | | | | | Cleaned up some 85xx PCI bugsAndy Fleming2007-05-02-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Cleaned up the CDS PCI Config Tables and added NULL entries to the end * Fixed PCIe LAWBAR assignemt to use the cpu-relative address * Fixed 85xx PCI code to assign powar region sizes based on the config values (rather than hard-coding them) * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | Add support for the 8568 MDS boardAndy Fleming2007-05-02-0/+506
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This included some changes to common files: * Add 8568 processor SVR to various places * Add support for setting the qe bus-frequency value in the dts * Add the 8568MDS target to the Makefile Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | Enable 8544 supportAndy Fleming2007-04-23-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add support to the Makefile * Add 8544 configuration support to the tsec driver * Add 8544 SVR numbers to processor.h Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * | | | | | Changed BOOKE_PAGESZ_nGB to BOOKE_PAGESZ_nGAndy Fleming2007-04-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The other pagesz constants use one letter to specify order of magnitude. Also change the one reference to it in mpc8548cds/init.S Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | | Add MPC8544DS main configuration file.Jon Loeliger2007-04-23-0/+591
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * | | | | | Fix PCI I/O space mapping on Freescale MPC85x0ADSSergei Shtylyov2007-04-23-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI I/O space mapping for Freescale MPC8540ADS board was broken by commit 52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc which failed to update the #define's describing the local address window used for the PCI I/O space accesses -- fix this and carry over the necessary changes into the MPC8560ADS code since the PCI I/O space mapping was also broken for this board (by the earlier commit 087454609e47295443af793a282cddcd91a5f49c). Add the comments clarifying how the PCI I/O space must be mapped to all the MPC85xx board config. headers. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> board/mpc8540ads/init.S | 4 ++-- board/mpc8560ads/init.S | 4 ++-- include/configs/MPC8540ADS.h | 5 ++--- include/configs/MPC8541CDS.h | 2 +- include/configs/MPC8548CDS.h | 2 +- include/configs/MPC8560ADS.h | 8 ++++---- 6 files changed, 12 insertions(+), 13 deletions(-)
| * | | | | | u-boot: Disables MPC8548CDS 2T_TIMING for DDR by defaultebony.zhu@freescale.com2007-04-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch disables MPC8548CDS 2T_TIMING for DDR by default. Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
generated by cgit v1.1 at 2024-12-23 04:40:55 +0000