| Commit message (Collapse) | Author | Age | Lines |
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Edition) with GRLIB template design. See www.gaisler.com for information.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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See www.gaisler.com for information.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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design. See www.gaisler.com for board information.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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can print available cores (type: AHB Master, AHB Slave, APB Slave), their address ranges, IRQ number and version.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
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Support for booting from internal DataFlash, external DataFlash card
or NAND flash is available.
Signed-off-by: Stelian Pop <stelian@popies.net>
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Adapt the existing AT91CAP9 code to the new headers and APIs.
Signed-off-by: Stelian Pop <stelian@popies.net>
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Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.
This is part 2 of the replacement: more header imports and edits.
Signed-off-by: Stelian Pop <stelian@popies.net>
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Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.
This is part 1 of the replacement: pristine header files import.
Signed-off-by: Stelian Pop <stelian@popies.net>
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AT91CAP9 and AT91SAM9 SoCs are very close hardware wise, so a
common infrastructure can be used. Let this infrastructure be
named after the AT91SAM9 family, and move the existing AT91CAP9
files to the new place.
Signed-off-by: Stelian Pop <stelian@popies.net>
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DataFlash partition information has become a mess. This patch
defines a single partition scheme for Atmel DataFlashes. This partition
scheme will be used by all AT91CAP9 and AT91SAM9 boards.
Signed-off-by: Stelian Pop <stelian@popies.net>
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This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2. This
makes code use the register name from chip datasheets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Add 82541ER device with latest integrated IGP2 PHY.
Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
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This board never went into production
Signed-off-by: Zachary P. Landau <zachary.landau@labxtechnologies.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
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Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
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Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
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Signed-off-by: Matt Wadel <Matt.Waddel@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
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All of the duplicated code for Blackfin processors and boot modes have been
unified. After all, the core is the same for all processors, just the
peripheral set differs (which gets handled in the drivers).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This patch adds support for the MX31ADS evaluation board from Freescale,
initialization code is copied from RedBoot sources, also provided by Freescale.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
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This patch adds support for the Phytec Phycore-i.MX31 board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
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This patch adds support for the mx31 litekit board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
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This patch adds the core support for Freescale mx31
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
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Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
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Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
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Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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R2D plus is SH reference board used with SH7751R.
This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface,
one PCI bus, VGA, and two Ethernet controller.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add support SH4 cache control and flash_cache function
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Renesas Solutions R7780MP is a reference board on SH7780.
This board has serial, 10/100 base Ethernet deivice, CF slot
and VGA devices. This board can set extension board.
Extension board has 10/100/1000 base Ethernet device, PCI slot,
S-ATA, iDVR slot.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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This patch add support PCI of SuperH base code and SH7780 specific code.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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SH7780 is CPU of Renesas Technology.
This CPU has
- CPU clock 400MHz
- PCI support
- DDR-SDRAM controller
- etc ...
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Migo-R is a board based on SH7722 and has may devices.
In this patch, supported SCIF, NOR flash and Ethernet.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Conflicts:
lib_ppc/board.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
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This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.
It also makes the board take MAC addresses, if found, from EEPROM.
User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr. Any unused addresses should be zero. This group of
four six-byte values should have it's CRC at the end. crc32 and
eeprom commands can be used to accomplish this.
If CRC fails, MAC addresses come from the environment. If CRC
succeeds, the environment is overwritten at startup.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB
controller on the PCI bus in Linux on the MPC8323ERDB.
This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's
config file.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display. Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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