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* versatile: config coding style cleanupJean-Christophe PLAGNIOL-VILLARD2009-07-06-60/+58
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Peter Pearse <peter.pearse@arm.com>
* arm: Kirkwood: Basic SOCs supportPrafulla Wadaskar2009-07-06-0/+605
| | | | | | | | | | | | | | | | | | | | | | Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core. SOC versions supported:- 1) 88F6281-A0 define CONFIG_KW88F6281_A0 2) 88F6192-A0 define CONFIG_KW88F6192_A0 Other supported features:- 1) get_random_hex() fucntion 2) PCI Express port initialization 3) NS16550 driver support Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* arm: generic cache.h for ARM architecturesPrafulla Wadaskar2009-07-06-0/+41
| | | | | | | This patch is required for Kirkwood SoC support may be used by other ARM architectures Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* OMAP3EVM: fix typo. replace CS6 by CS5, no functionality changeMatthias Ludwig2009-07-06-2/+3
| | | | Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
* spi: Add Marvell Kirkwood SPI driverPrafulla Wadaskar2009-06-26-0/+56
| | | | | | This patch adds a SPI driver for the Marvell Kirkwood SoC's. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* integratorap/cp: use cfi driverJean-Christophe PLAGNIOL-VILLARD2009-06-23-5/+7
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Peter Pearse <peter.pearse@arm.com>
* serial_mx31: allow it to work with mx27 too and rename to serial_mxcIlya Yanok2009-06-21-4/+4
| | | | | | | UART hardware on i.MX27 is the same as on the i.MX31 so we just need to provide the driver with correct address of the registers. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* mx27: basic cpu supportIlya Yanok2009-06-21-0/+564
| | | | | | This patch adds generic code to support Freescale's i.MX27 SoCs. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* i.MX31: Create a common device file.Magnus Lilja2009-06-21-0/+3
| | | | Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
* ARM: Add macros.h to be used in assembler file.Jean-Christophe PLAGNIOL-VILLARD2009-06-21-0/+74
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* MX31: Add NAND SPL for i.MX31.Magnus Lilja2009-06-21-0/+114
| | | | | | | | | | | | | | | | | | This patch adds the NAND SPL framework needed to boot i.MX31 boards from NAND. It has been tested on a i.MX31 PDK board with large page NAND. Small page NANDs should work as well, but this has not been tested. Note: The i.MX31 NFC uses a non-standard layout for large page NANDs, whether this is compatible with a particular setup depends on how the NAND device is programmed by the flash programmer (e.g. JTAG debugger). The patch is based on the work by Maxim Artamonov. Signed-off-by: Maxim Artamonov <scn1874@yandex.ru> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
* at91: unify nor boot supportJean-Christophe PLAGNIOL-VILLARD2009-06-21-0/+28
| | | | | | the lowlevel init sequence is the same so unify it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91sam9263ek: add nor flash supportJean-Christophe PLAGNIOL-VILLARD2009-06-21-6/+136
| | | | | | this will allow you to store use it for the env and to boot directly U-Boot from Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* at91: add support for the PM9261 board of Ronetix GmbHIlko Iliev2009-06-21-0/+382
| | | | | | | | | | The PM9261 board is based on the AT91SAM9261-EK board. Here is the page on Ronetix website: http://www.ronetix.at/starter_kit_9261.html Signed-off-by: Ilko Iliev <iliev@ronetix.at> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* pm9263: use macro instead of hardcode value for the lowlevel_initJean-Christophe PLAGNIOL-VILLARD2009-06-21-28/+82
| | | | | | | optimize a few the RAM init Signed-off-by: Ilko Iliev <iliev@ronetix.at> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* pm9263: lowlevel init updateJean-Christophe PLAGNIOL-VILLARD2009-06-21-9/+1
| | | | | | | move PSRAM init to pm9263.c this will allow us after to make the nor lowlevel_init generic Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Blackfin: fix SPI flash speed define nameMike Frysinger2009-06-15-11/+11
| | | | | | | The SPI flash define is named CONFIG_SF_DEFAULT_SPEED, not CONFIG_SF_DEFAULT_HZ, so fix the typos in the Blackfin boards. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf548-ezkit: bump up monitor sizeMike Frysinger2009-06-15-1/+1
| | | | | | | The latest version of U-Boot got a bit fatter in the BSS section which caused overflows in the RAM region, so increase the monitor size. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf533-stamp/bf537-stamp: fix env settings for SPI flashVivi Li2009-06-15-4/+4
| | | | | | | | | The SPI flash layer is much stricter about sector usage than the eeprom layer we used to use, so update the env settings to better match the sector alignment of the flashes we use. Signed-off-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2009-06-15-1/+91
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| * Convert DM9000 driver for CONFIG_NET_MULTIRemy Bohmer2009-06-15-0/+5
| | | | | | | | | | | | | | | | | | All drivers need to be converted to CONFIG_NET_MULTI. This patch converts the dm9000 driver. Signed-off-by: Thomas Smits <ts.smits@gmail.com> Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * net: Add Marvell Kirkwood gigabit ethernet driverPrafulla Wadaskar2009-06-15-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a egiga driver for the Marvell Kirkwood SoC's. Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed-by: Ronen Shitrit <rshitrit@marvell.com> Acked-by: Stefan Rose <sr@denx.de> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * DaVinci Network Driver Updatess-paulraj@ti.com2009-06-15-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Different flavours of DaVinci SOC's have differences in their EMAC IP This patch does the following 1) Updates base addresses for DM365 2) Updates MDIO frequencies for DM365 and DM646x 3) Update EMAC wrapper registers for DM365 and DM646x Patch applies to u-boot-net git. the EMAC driver itself will be updated shortly to add support for DM365 and DM646x Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * Switched davinci_emac Ethernet driver to use newer APIBen Warren2009-06-15-0/+5
| | | | | | | | | | | | | | | | Added CONFIG_NET_MULTI to all Davinci boards Removed all calls to Davinci network driver from board code Added cpu_eth_init() to cpu/arm926ejs/cpu.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * Marvell MV88E61XX Switch Driver supportPrafulla Wadaskar2009-06-15-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chips supported:- 1. 88E6161 6 port gbe swtich with 5 integrated PHYs 2. 88E6165 6 port gbe swtich with 5 integrated PHYs 2. 88E6132 3 port gbe swtich with 2 integrated PHYs Platform specific configuration supported for:- default or router port vlan configuration led_init configuration mdip/n polarity reversal configuration Note: This driver is supported and tested against kirkwood egiga interface Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * tsec: Add support for BCM5482S PHYZach LeRoy2009-06-15-0/+2
| | | | | | | | | | | | Signed-off-by: Zach LeRoy <zleroy@xes-inc.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Blackfin: unify u-boot linker scriptsMike Frysinger2009-06-14-0/+124
| | | | | | | | | | | | | | | | | | | | | | All the Blackfin linker scripts were duplicated across the board dirs with no difference save from the semi-often used ENV_IS_EMBEDDED option. So unify all of them in the lib_blackfin/ dir and for the few boards that need to embedded the environment directly, add a LDS_BOARD_TEXT define for them to customize via their board config file. This is much simpler than forcing them to duplicate the rest of the linker script. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: bf518f-ezbrd: enable SST SPI flash driverMike Frysinger2009-06-14-0/+1
| | | | | | | | | | | | | | The BF51xF parts have an internal SST SPI flash, so make sure the driver is enabled by default so we can access it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: convert specific pre/post config headers to common methodMike Frysinger2009-06-14-231/+166
| | | | | | | | | | | | | | | | | | | | The Blackfin port was using asm/blackfin-config-{pre,post}.h to setup common Blackfin board defines. The common method now is to use config.h, so convert blackfin-config-post.h to that. Rename the still Blackfin specific blackfin-config-pre.h to config-pre.h so the naming conventions at least line up. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: enable LZMA for all ADI boardsMike Frysinger2009-06-14-0/+5
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: make default ADI env more flexibleMike Frysinger2009-06-14-5/+25
| | | | | | | | | | | | | | | | Allow boards to easily override the root= and default bootcmd, allow people to tweak the file used in default bootcmds at runtime via one env var, and add a stock nandboot command. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: ibf-dsp561: new board portHoan Hoang2009-06-14-0/+130
| | | | | | | | | | Signed-off-by: Hoan Hoang <hnhoan@i-syst.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: blackstamp: new board portMike Frysinger2009-06-14-0/+275
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: bf537-srv1: new board portMike Frysinger2009-06-14-0/+204
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: bf537-minotaur: new board portMike Frysinger2009-06-14-0/+204
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: bf537-pnav: new board portMike Frysinger2009-06-14-0/+172
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: cm-bf527: new board portMike Frysinger2009-06-14-0/+137
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: cm-bf548: new board portMike Frysinger2009-06-14-0/+141
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: tcm-bf537: new board portMike Frysinger2009-06-14-0/+125
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: cm-bf561: new board portMike Frysinger2009-06-14-0/+104
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: cm-bf537e: new board portMike Frysinger2009-06-14-0/+124
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: cm-bf533: new board portMike Frysinger2009-06-14-0/+104
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: new spibootldr commandMike Frysinger2009-06-14-0/+28
|/ | | | | | | Newer Blackfin parts can an on-chip ROM that can boot LDRs over SPI flashes, so add a new 'spibootldr' command to take advantage of it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* 85xx: Add PORBMSR and PORDEVSR shift definesPeter Tyser2009-06-12-0/+2
| | | | | | | | | Add defines similar to those already used for the the 86xx architecture. This will ease sharing of PCI code between the 85xx and 86xx architectures. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl/85xx, 86xx: Sync up DMA codePeter Tyser2009-06-12-0/+2
| | | | | | | | | | | | | | | | | | | | | The following changes were made to sync up the DMA code between the 85xx and 86xx architectures which will make it easier to break out common 8xxx DMA code: 85xx: - Don't set STRANSINT and SPCIORDER fields in SATR register. These bits only have an affect when the SBPATMU bit is set. - Write 0xffffffff instead of 0xfffffff to clear errors in the DMA status register. We may as well clear all 32 bits of the register... 86xx: - Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers - Add clearing of errors in the DMA status register when initializing the controller - Clear the channel start bit in the DMA mode register after a transfer Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: Create common fsl_dma.h for 85xx and 86xx cpusPeter Tyser2009-06-12-146/+57
| | | | | | | | Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to reduce a large amount of code duplication Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add UEC6 and UEC8 at SGMII mode for MPC8569MDSHaiying Wang2009-06-12-0/+25
| | | | | | | | | On MPC8569MDS board, UCC6 and UCC8 can be configured to work at SGMII mode via UEM on PB board. Since MPC8569 supports up to 4 Gigabit Ethernet ports, we disable UEC6 and UEC8 by default. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add RMII support for MPC8569MDSHaiying Wang2009-06-12-4/+34
| | | | | | | | | This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to enalbe_mpc8569mds_qe_uec which is more accurate. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add UEC3 and UEC4 support for MPC8569MDSHaiying Wang2009-06-12-0/+23
| | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/qe: Add more SNUM number for QEHaiying Wang2009-06-12-1/+4
| | | | | | | | | Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII- 1000 mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2024-12-16 06:48:47 +0000