| Commit message (Collapse) | Author | Age | Lines |
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The commit 04a9e1180ac76a7bacc15a6fcd95ad839d65bddb
cause the 83xx immap broken, so the DMA and PCI will
be failed.
The patch fix the struct spi8xxx and rm struct spi83xx.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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..and rm unused CONFIG_FSL_SPI define
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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This patch implements the fsl_spi driver on the MPC8349EMDS evaluation board.
This board has an ST M25P40 4Mbit EEPROM on its SPI bus
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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This patch adds support for the SPI controller found on Freescale PowerPC
processors such as the MCP834x family. Additionally, a new config option,
CONFIG_HARD_SPI, is added for general purpose SPI controller use.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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The commit 9e89647889cd4b5ada5b5e7cad6cbe55737a08d7
will cause the mpc8315erdb board can't boot up.
The patch fix that bug, and remove the duplicated #ifdef
CFG_SPCR_TSECEP code and clean the SCCR_TSEC2 for
MPC8313E processor.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Previous setting cause ips clock to be out of spec. This bug was found by John
Rigby from Freescale.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
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SH7710/SH7712 of SH3 CPU are supported.
SH771X is called SH-Ether, and has the Ether controller in CPU.
The driver of Ether is not included in this patch.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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This patch add the support of map_physmem() and unmap_physmem()
used with Common Flash Interface(CFI) driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Convert the board/freescale/common/Makefile to use
CONFIG_* options to select which files to conditionally
compile into the board/freescale/common library rather
than conditionally compiling entire files.
Now handles::
CONFIG_FSL_PIXIS
CONFIG_FSL_DIU_FB
CONFIG_PQ_MDS_PIB
CONFIG_ID_EEPROM is introduced until CFG_ID_EEPROM is gone.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Use driver/net/uli526x.c as MPC8610HPCD default Ethernet driver.
Remove unused ethernet CONFIG_ options.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
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MPC837xERDB board support includes:
* DDR2 330MHz hardcoded (soldered on the board)
* Local Bus NOR Flash
* I2C, UART and RTC
* eTSEC RGMII (TSEC0 - RTL8211B with MII;
* TSEC1 - VSC7385 local bus, hardcoded, requires seperate firmware
* load)
Signed-off-by: Kevin Lam <kevin.lam@freescale.com>
Signed-off-by: Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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System registers that are modified are the Arbiter Configuration
Register (ACR), the System Priority Control Register (SPCR), and the
System Clock Configuration Register (SCCR).
Signed-off by: Michael F. Reiss <Michael.F.Reiss@freescale.com>
Signed-off by: Joe D'Abbraccio <ljd015@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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continuation of commit b96c83d4ae475a70ef2635cd0e748174c44c8601
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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These changes were identified by HighSmith Bill ,Mazzyar and Joseph for
DDR configuration in u-boot code. Some are related to performance, some
affect stability and some correct few basic errors in the current
configuration.
The changes have been tested and found to give better memory latency
figures on MPC8313eRDB.LMBench figures prove it.
The changes are:
- CS0_CONFIG[ AP_n_EN] is changed from 1 to 0
(this may improve performance for application with many read
or write to open pages).
- CS0_CONFIG[ODT_WR_CFG] is currently changed from 100 to
001 (activating all the CS when only one is used may cause
unwanted noise on the system)
- TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 8clks (based on
Tras=45ns)
- TIMING_CFG_1[REFREC] changed from 21 clks to 18clks.
- TIMING_CFG_2[AL] value changed from 0 setting to 1 clk to
comply with the 3 ODT clk requirements)
- TIMING_CFG_2[CPO] was set to a reserved value, changed to RL+3/4.
- TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 6clks.
- DDR_SDRAM_MODE[AL]changed from 0 to 1.
- DDR_SDRAM_MODE[WRREC] changed from 1 clk to 3 clks.
- DDR_SDRAM_INTERVAL[REFINT] is changed from 0x0320 to 0x0510.
- DDR_SDRAM_INTERVAL[BSTOPRE] is changed from 0x64 to 0x0500.
The patch is based of git://www.denx.de/git/u-boot-mpc83xx.git
The last commit on this tree was 6775c68683a53c7abc778774641aac6f833a2cbf
Signed-off-by: Poonam Aggrwal-b10812 <b10812@freescale.com>
Cc: Bill HighSmith <Bill.Highsmith@freescale.com>
Cc: Razzaz Mazyar <MRazzaz@freescale.com>
Cc: Josep P J <PJ.Joseph@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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The isdram command prints out decoded information the "serial presence
detect" (SPD) chip on the SDRAM SIMMs. This can be very helpful when
debugging memory configuration problems.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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The features list:
- Boot from NOR Flash
- DDR2 266MHz hardcoded configuration
- Local bus NOR Flash R/W operation
- I2C, UART, MII and RTC
- eTSEC0/1 support
- PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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The MPC8360ERDK board support patch is added before
the commit 2c5b48fc205c3e2752910da8f39209ed075929e5
so, miss clean up it.
The patch clean up the miss cache config.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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adjust default environment;
disable SCC ethernet (not used on this board).
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: John Rigby <jrigby@freescale.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
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Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
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Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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(1) Remove unused symbol "CFG_EEPROM_PAGE_WRITE_ENABLE".
(2) Use conditional Makefile.o.
Signed-off-by: Larry Johnson <lrj@acm.org>
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The TK885D board uses a TQM885D module from TQ, this port adds an
own configuration file and adds a last_stage_init() method to
configure the two PHYs, depending on the phy_auto_nego environment
variable.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
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Rework Lime support for lwmon5 using new video driver
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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vxWorks expects in
TLB 0 a entry for the Machine Check interrupt
TLB 1 a entry for the RAM
TLB 2 a entry for the EBC
TLB 3 a entry for the boot flash
After changing the baudrate to 9600 I had no problems to boot the
vxWorks image as distributed by WindRiver (Revision 2.0/1 from
June 18, 2007)
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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Format the code, make it more readable
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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