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* ppc4xx: Dynamic configuration of 4xx PCIe mode as root or endpoint modeStefan Roese2007-10-31-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for dynamic configuration of PCIe ports for the AMCC PPC4xx boards equipped with PCIe interfaces. These are the PPC440SPe boards Yucca & Katmai and the 405EX board Kilauea. This dynamic configuration is done via the "pcie_mode" environement variable. This variable can be set to "EP" or "RP" for endpoint or rootpoint mode. Multiple values can be joined via the ":" delimiter. Here an example: pcie_mode=RP:EP:EP This way, PCIe port 0 will be configured as rootpoint, PCIe port 1 and 2 as endpoint. Per default Yucca will be configured as: pcie_mode=RP:EP:EP Per default Katmai will be configured as: pcie_mode=RP:RP:REP Per default Kilauea will be configured as: pcie_mode=RP:RP Signed-off-by: Tirumala R Marri <tmarri@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable device tree support (fdt) on Kilauea per defaultStefan Roese2007-10-31-43/+3
| | | | | | | | | | | | | This patch enables the fdt support on the AMCC Kilauea eval board. Additionally now EBC ranges fdt fixup is included to support NOR FLASH mapping via the Linux physmap_of driver. This Kilauea port now support booting arch/ppc and arch/powerpc Linux kernels. The default environment "net_nfs" is for arch/ppc and "net_nfs_fdt" is for arch/powerpc. In the long run, arch/ppc support will be removed. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix small merge problems with CPCI440 and Acadia boardsStefan Roese2007-10-31-256/+0
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add initial AMCC Kilauea 405EX supportStefan Roese2007-10-31-0/+486
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add PPC405EX supportStefan Roese2007-10-31-43/+669
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* DTT: Prepare DS1775 driver for use of different I2C addressesStefan Roese2007-10-31-0/+1
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: 4xx_pcie: More general cleanup and 405EX PCIe support addedStefan Roese2007-10-31-12/+25
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: 4xx_pcie: Change CFG_PCIE_MEMSIZE to 128MB on Yucca & KatmaiStefan Roese2007-10-31-2/+2
| | | | | | | | | | | | | | | | | 128MB seems to be the smallest possible value for the memory size for on PCIe port. With this change now the BAR's of the PCIe cards are accessible under U-Boot. One big note: This only works for PCIe port 0 & 1. For port 2 this currently doesn't work, since the base address is now 0xc0000000 (0xb0000000 + 2 * 0x08000000), and this is already occupied by CFG_PCIE0_CFGBASE. But solving this issue for port 2 would mean to change the base addresses completely and this change would have too much impact right now. This patch adds debug output to the 4xx pcie driver too. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Rename 405gp_pci to 4xx_pci since its used on all 4xx platformsStefan Roese2007-10-31-0/+0
| | | | | | | | These files were introduced with the IBM 405GP but are currently used on all 4xx PPC platforms. So the name doesn't match the content anymore. This patch renames the files to 4xx_pci.c/h. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (3)Stefan Roese2007-10-31-2/+99
| | | | | | | | | | | | | | | (3) This patch introduces macros like SDRN_PESDR_DLPSET(port) to access the SDR registers of the PCIe ports. This makes the overall design clearer, since it removed a lot of switch statements which are not needed anymore. Also, the functions ppc4xx_init_pcie_rootport() and ppc4xx_init_pcie_entport() are merged into a single function ppc4xx_init_pcie_port(), since most of the code was duplicated. This makes maintainance and porting to other 4xx platforms easier. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (2)Stefan Roese2007-10-31-9/+8
| | | | | | | | | | | This patch is the first patch of a series to make the 440SPe PCIe code usable on different 4xx PPC platforms. In preperation for the new 405EX which is also equipped with PCIe interfaces. (2) This patch renames the functions from 440spe_ to 4xx_ with a little additional cleanup Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (1)Stefan Roese2007-10-31-0/+174
| | | | | | | | | | This patch is the first patch of a series to make the 440SPe PCIe code usable on different 4xx PPC platforms. In preperation for the new 405EX which is also equipped with PCIe interfaces. (1) This patch renames the files from 440spe_pcie to 4xx_pcie Signed-off-by: Stefan Roese <sr@denx.de>
* Merge git://www.denx.de/git/u-bootStefan Roese2007-10-27-86/+95
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| * TQM5200: increase kernel_addr_r and fdt_addr_r (hinted by Wolfgang Denk).Bartlomiej Sieka2007-10-25-2/+2
| | | | | | | | Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| * Merge branch 'motionpro_ng' of /home/tur/git/u-bootWolfgang Denk2007-10-24-14/+15
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| | * Motion-PRO: Update configuration to accomodate next generation board.Bartlomiej Sieka2007-10-23-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New board has faster oscillator and a different Flash chip. This affects: - CFG_MPC5XXX_CLKIN - SDRAM timings - Flash CS configuration (timings) - Flash sector size, and thus MTD partition layout - malloc() arena size (due to bigger Flash sectors) - smaller memory test range (due to bigger malloc() arena) This patch also enables more extensive memory testing via "mtest". Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| * | TQM5200: fix spurious characters on second serial interfaceMartin Krause2007-10-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | With this patch PSC3 is configured as UART. This is done, because if the pins of PSC3 are not configured at all (-> all pins are GPI), due to crosstalk, spurious characters may be send over the RX232_2_TXD signal line. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| * | Mips: Fix string functions differ prototype declarationJean-Christophe PLAGNIOL-VILLARD2007-10-24-5/+5
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | delta: Fix OHCI_REGS_BASE undeclared and wait_ms implicit declarationJean-Christophe PLAGNIOL-VILLARD2007-10-24-0/+2
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | xsengine: Fix no partition type specified, use DOS as defaultJean-Christophe PLAGNIOL-VILLARD2007-10-24-0/+1
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | lubbock: Fix no partition type specified, use DOS as defaultJean-Christophe PLAGNIOL-VILLARD2007-10-24-0/+1
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | fix pxa255_idp boardMarcel Ziswiler2007-10-23-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pxa255_idp being an old unmaintained board showed several issues: 1. CONFIG_INIT_CRITICAL was still defined. 2. Neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION was defined. 3. Symbol flash_addr was undeclared. 4. The boards lowlevel_init function was still called memsetup. 5. The TEXT_BASE was still 0xa3000000 rather than 0xa3080000. 6. Using -march=armv5 instead of -march=armv5te resulted in lots of 'target CPU does not support interworking' warnings on recent compilers. 7. The PXA's serial driver redefined FFUART, BTUART and STUART used as indexes rather than the register definitions from the pxa-regs header file. Renamed them to FFUART_INDEX, BTUART_INDEX and STUART_INDEX to avoid any ambiguities. 8. There were several redefinition warnings concerning ICMR, OSMR3, OSCR, OWER, OIER, RCSR and CCCR in the PXA's assembly start file. 9. The board configuration file was rather outdated. 10. The part header file defined the vendor, product and revision arrays as unsigned chars instead of just chars in the block_dev_desc_t structure. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
| * | Make MPC8266ADS command selection more robustRune Torgersen2007-10-23-33/+20
| | | | | | | | | | | | | | | | | | Fix MPC8266 command line definition so it won't break when new commands are added to u-boot. Signed-off-by Rune Torgersen <runet@innovsys.com>
| * | Merge branch 'master' of git://www.denx.de/git/u-boot-tq-groupWolfgang Denk2007-10-21-24/+38
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| | * | TQM860M: adjust for doubled flash sector size.Martin Krause2007-10-15-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * | TQM866M: fix SDRAM refreshMartin Krause2007-10-15-16/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At 133 MHz the current SDRAM refresh rate is too fast (measured 4 * 1.17 us). CFG_MAMR_PTA changes from 39 to 97. This result in a refresh rate of 4 * 7.8 us at the default clock 50 MHz. At 133 MHz the value will be then 4 * 2.9 us. This is a compromise until a new method is found to adjust the refresh rate. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * | TQM866M: adjust for doubled flash sector size.Martin Krause2007-10-15-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| * | | Merge branch 'master' of /home/git/u-boot/Wolfgang Denk2007-10-21-0/+4
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| * | | Make MPC8266ADS board compile again.runet@innovsys.com2007-10-16-0/+2
| | |/ | |/| | | | | | | Signed-off-by: Runet Torgersen <runet@innovsys.com>
* | | ppc4xx: lwmon5: Some further GPIO config changesStefan Roese2007-10-23-2/+2
| |/ |/| | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & YosemiteStefan Roese2007-10-15-0/+4
|/ | | | | | | | | | | The BCSR status bit for the 66MHz PCI operation was correctly addressed (MSB/LSB problem). Now the correct currently setup PCI frequency is displayed upon bootup. This patch also fixes this problem on Rainier & Yellowstone, since these boards use the same souce code as Sequoia & Yosemite do. Signed-off-by: Stefan Roese <sr@denx.de>
* [FIX] XUPV2P change command handlingMichal Simek2007-10-14-19/+17
| | | | and remove code violation
* Merge branch 'master' of git://www.denx.de/git/u-boot-avr32Wolfgang Denk2007-10-13-13/+27
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| * Fix memtest breakageHaavard Skinnemoen2007-10-02-6/+2
| | | | | | | | | | | | | | | | CFG_MEMTEST_START uses weird magic involving gd, which fails to compile. Use hardcoded values instead (we actually know how much RAM we have on board.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * Merge commit 'origin/master'Haavard Skinnemoen2007-10-02-2203/+14644
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| * | Update atstk1002 bootargs.Eirik Aanonsen2007-09-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates to atstk1002 U-Boot header file: - Changed bootargs: * Set the bootargs for at1002 to point to the SD-card partition instead * ... of the boot flash. * Removing the rootfstype since that argument are not needed. Signed-off-by: Eirik Aanonsen <eaa@wprmedical.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * | Add some comments to clocks in atstk1002.hEirik Aanonsen2007-09-18-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | This patch applies some clarifying comments to how the different clocks are setup according to atstk1002.h Some of the previous comments where stating wrongful information. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * | Reduce BOOTDELAY variable to 1 second by default for STK1002Hans-Christian Egtvedt2007-08-30-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * | Remove double quotation marks around MAC address for STK1002Hans-Christian Egtvedt2007-08-30-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * | AVR32: Change prototype of memsetSemih Hazar2007-08-27-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Semih Hazar <semih.hazar@indefia.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | Merge branch 'merge' of git://www.denx.de/git/u-boot-microblazeWolfgang Denk2007-10-13-38/+37
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| * | | [FIX] change command handling and removing code violationMichal Simek2007-09-24-26/+24
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| * | | [FIX] change sets of commandsMichal Simek2007-09-24-10/+8
| | | | | | | | | | | | | | | | | | | | because changing of command handling brings compilation problems
| * | | [FIX] Email reparation & CopyrightMichal Simek2007-09-24-3/+3
| | | | | | | | | | | | | | | | | | | | Both codes are written by myself without any support from CTU
| * | | [PATCH] Change macro name for UartLiteMichal Simek2007-09-24-0/+3
| | | | | | | | | | | | | | | | because PowerPC 405 can use UartLite as console
| * | | synchronizition with mainlineMichal Simek2007-09-24-73/+58
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| * | | Merge ../u-bootMichal Simek2007-09-24-65/+171
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| * | | | [FIX] Microblaze ML401 - repare FLASH handlingMichal Simek2007-09-11-10/+16
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| * | | | Merge git://www.denx.de/git/u-bootMichal Simek2007-09-11-1871/+11361
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| * \ \ \ \ Merge git://www.denx.de/git/u-boot into mergeMichal Simek2007-08-15-388/+5749
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