| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
| |
SCPU doesn't use redundant environment in flash.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
| |
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
| |
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
| |
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
| |
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |
|
| |
|
|\
| |
| |
| | |
Some code cleanup.
|
| |
| |
| |
| | |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|\ \ |
|
| | |
| | |
| | |
| | | |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|\ \ \ |
|
| | | | |
|
| |\ \ \ |
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
- use CFI driver (replaces custom flash driver) for main 'cam5200' target
- add second build target 'cam5200_niosflash' which still uses custom driver
|
| | | | | |
|
| | | | | |
|
| | | | | |
|
| | | | |
| | | | |
| | | | |
| | | | | |
generation of hardware
|
| | | | | |
|
| | | | | |
|
| | | | | |
|
| | | | | |
|
| | | | | |
|
| |/ / / |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Now the board revision and the current PCI bus speed are printed after
the board message.
Also the EBC initialising is now done via defines in the board config
file.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|/ / /
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Now the board revision and the current PCI bus speed are printed after
the board message.
Also the EBC initialising is now done via defines in the board config
file.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This update brings the ALPR board support to the newest version.
It also fixes a problem with the NAND driver.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|\ \ \ |
|
| |\ \ \
| | |_|/
| |/| | |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
- fix a typo in V38B config file
- move watchdog initialisation earlier in the boot process
- add "wdt=off" to default kernel command line (disables kernel watchdog)
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
This fix will make the MAL burst disabling patch for the Linux
EMAC driver obsolete.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|/ / /
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This code will optimize the DDR2 controller setup on a board specific
basis.
Note: This code doesn't work right now on the NAND booting image for the
Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | |
|
|\ \ \ |
|
| | | |
| | | |
| | | |
| | | | |
offset to go into CFI mode)
|
|\ \ \ \
| |/ / /
|/| | | |
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Heiko Schocher <hs@denx.de>
|
| |_|/
|/| | |
|
| | | |
|
| | | |
|
|\ \ \ |
|
| | | |
| | | |
| | | |
| | | | |
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| |\ \ \ |
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete
cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
Added multiple I2C bus support to fsl_i2c.c.
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
tree matches the other 8xxx trees.
Signed-off-by: Timur Tabi <timur@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
The 834x rev1.x silicon has one CPU5 errata.
The issue is when the data cache locked with
HID0[DLOCK], the dcbz instruction looks like no-op inst.
The right behavior of the data cache is when the data cache
Locked with HID0[DLOCK], the dcbz instruction allocates
new tags in cache.
The 834x rev3.0 and later and 8360 have not this bug inside.
So, when 834x rev3.0/8360 are working with ECC, the dcbz
instruction will corrupt the stack in cache, the processor will
checkstop reset.
However, the 834x rev1.x can work with ECC with these code,
because the sillicon has this cache bug. The dcbz will not
corrupt the stack in cache.
Really, it is the fault code running on fault sillicon.
This patch fix the incorrect dcbz operation. Instead of
CPU FP writing to initialise the ECC.
CHANGELOG:
* Fix the incorrect dcbz operation instead of CPU FP
writing to initialise the ECC memory. Otherwise, it
will corrupt the stack in cache, The processor will checkstop
reset.
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
add ft_pci_setup, OF_CPU, OF_SOC, OF_TBCLK, and
STDOUT_PATH configuration bits to mpc8349emds,
mpc8349itx, and mpc8360emds board code.
redo environment to use bootm with the fdtaddr
for booting ARCH=powerpc kernels by default,
and provide default fdtaddr values.
|
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
MPC8360EMDS
This patch also adds an improved I2C set_speed(), which handles all clock
frequencies.
Signed-off-by: Timur Tabi <timur@freescale.com>
|