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* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxTom Rini2012-10-22-7/+982
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| * phylib: Enable SMSC LAN87xx PHY supportMingkai Hu2012-10-22-0/+1
| | | | | | | | | | | | | | LAN8720 PHY is used on Freescale C2X0QDS board. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * poweprc/85xx: add QMan frequency info and fdt fixup.Haiying Wang2012-10-22-0/+3
| | | | | | | | | | | | | | | | Starting from QMan3.0, the QMan clock cycle needs be exposed so that the kernel driver can use it to calculate the shaper prescaler and rate. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/t4qds: Add T4QDS boardYork Sun2012-10-22-0/+910
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The T4240QDS is a high-performance computing evaluation, development and test platform supporting the T4240 QorIQ Power Architecture™ processor. SERDES Connections 32 lanes grouped into four 8-lane banks Two “front side” banks dedicated to Ethernet Two “back side” banks dedicated to other protocols DDR Controllers Three independant 64-bit DDR3 controllers Supports rates up to 2133 MHz data-rate Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller QIXIS System Logic FPGA Each DDR controller has two DIMM slots. The first slot of each controller has up to 4 chip selects to support single-, dual- and quad-rank DIMMs. The second slot has only 2 chip selects to support single- and dual-rank DIMMs. At any given time, up to total 4 chip selects can be used. Detail information can be found in doc/README.t4qds Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * fm/mEMAC: add mEMAC frame workRoy Zang2012-10-22-3/+48
| | | | | | | | | | | | | | | | | | | | | | The multirate ethernet media access controller (mEMAC) interfaces to 10Gbps and below Ethernet/IEEE 802.3 networks via either RGMII/RMII interfaces or XAUI/XFI/SGMII/QSGMII using the high-speed SerDes interface. Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: Add T4240 SoCYork Sun2012-10-22-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Freescale T4240 SoC. Feature of T4240 are (incomplete list): 12 dual-threaded e6500 cores built on Power Architecture® technology Arranged as clusters of four cores sharing a 2 MB L2 cache. Up to 1.8 GHz at 1.0 V with 64-bit ISA support (Power Architecture v2.06-compliant) Three levels of instruction: user, supervisor, and hypervisor 1.5 MB CoreNet Platform Cache (CPC) Hierarchical interconnect fabric CoreNet fabric supporting coherent and non-coherent transactions with prioritization and bandwidth allocation amongst CoreNet end-points 1.6 Tbps coherent read bandwidth Queue Manager (QMan) fabric supporting packet-level queue management and quality of service scheduling Three 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support Memory prefetch engine (PMan) Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: Packet parsing, classification, and distribution (Frame Manager 1.1) Queue management for scheduling, packet sequencing, and congestion management (Queue Manager 1.1) Hardware buffer management for buffer allocation and de-allocation (BMan 1.1) Cryptography acceleration (SEC 5.0) at up to 40 Gbps RegEx Pattern Matching Acceleration (PME 2.1) at up to 10 Gbps Decompression/Compression Acceleration (DCE 1.0) at up to 20 Gbps DPAA chip-to-chip interconnect via RapidIO Message Manager (RMAN 1.0) 32 SerDes lanes at up to 10.3125 GHz Ethernet interfaces Up to four 10 Gbps Ethernet MACs Up to sixteen 1 Gbps Ethernet MACs Maximum configuration of 4 x 10 GE + 8 x 1 GE High-speed peripheral interfaces Four PCI Express 2.0/3.0 controllers Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz with Type 11 messaging and Type 9 data streaming support Interlaken look-aside interface for serial TCAM connection Additional peripheral interfaces Two serial ATA (SATA 2.0) controllers Two high-speed USB 2.0 controllers with integrated PHY Enhanced secure digital host controller (SD/MMC/eMMC) Enhanced serial peripheral interface (eSPI) Four I2C controllers Four 2-pin or two 4-pin UARTs Integrated Flash controller supporting NAND and NOR flash Two eight-channel DMA engines Support for hardware virtualization and partitioning enforcement QorIQ Platform's Trust Architecture 1.1 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/85xx: move SRIO configuration out of corenet_ds.hTimur Tabi2012-10-22-4/+12
| | | | | | | | | | | | | | | | The P5040 does not have SRIO, so don't put the SRIO definitions in corenet_ds.h. They belong in the board-specific header files. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mmcTom Rini2012-10-22-7/+290
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| * | mmc: dw-mmc: support DesignWare MMC ControllerJaehoon Chung2012-10-22-0/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | Support the DesginWare MMC Controller. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | mmc: pxa: Flip over the remaining boards to pxa_mmc_genericMarek Vasut2012-10-22-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the boards still used the old PXA_MMC driver instead of the new generic one. Use the new one instead so the old can be removed and the generic MMC framework can be properly used. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | mmc: sdhci: Add a quirk to add delay during completion of sdhci_send_cmdTushar Behera2012-10-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMC host controller requires a delay between every sdhci_send_cmd() execution. In s5p_mmc driver (s5p_sdhci replaces this driver), a delay of 1000us was provided after every mmc_send_cmd() call. Adding a quirk in current sdhci driver to replicate the behaviour. Without this delay, MMC initialization on Origen board fails with following error messages. Timeout for status update! mmc fail to send stop cmd Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | MMC: MXS: Toggle the generic bounce buffer on the boardsMarek Vasut2012-10-22-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Flip the boards to use the generic bounce buffer instead of the MMC one. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <festevam@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | COMMON: Implement common bounce bufferMarek Vasut2012-10-22-0/+87
| |/ | | | | | | | | | | | | | | | | | | Implement common bounce buffer to be used on a less capable hardware. That includes hardware that can not do DMA from any address or such. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Andy Fleming <afleming@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | config: Enable CBFS, ext4 for corebootSimon Glass2012-10-22-0/+3
| | | | | | | | | | | | Enable Coreboot and EXT4 Filesystems on the coreboot board. Signed-off-by: Simon Glass <sjg@chromium.org>
* | fs: Add a Coreboot Filesystem (CBFS) driver and commandsGabe Black2012-10-22-0/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds CBFS support and some commands to use it to u-boot. These commands are: cbfsinit - Initialize CBFS support and pull all metadata into RAM. The end of the ROM is an optional parameter which defaults to the standard 0xffffffff and can be used to support multiple CBFSes in a system. The last one set up with cbfsinit is the one that will be used. cbfsinfo - Print information from the CBFS header. cbfsls - Print out the size, type, and name of all the files in the current CBFS. Recognized types are translated into symbolic names. cbfsload - Load a file from CBFS into memory. Like the similar command for fat filesystems, you can optionally provide a maximum size. Support for CBFS is compiled in when the CONFIG_CMD_CBFS option is specified. The CBFS driver can also be used programmatically from within u-boot. If u-boot needs something out of CBFS very early before the heap is configured, it won't be able to use the normal CBFS support which caches some information in memory it allocates from the heap. The cbfs_file_find_uncached function searches a CBFS instance without touching the heap. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* | ide: Add printf format string for CONFIG_SYS_64BIT_LBA optionGabe Black2012-10-22-0/+2
| | | | | | | | | | | | | | | | | | The size of an LBA type changes depending on this option. We need to use a different printf() string in each case, so create a define for this. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* | common: Discard the __u_boot_cmd sectionMarek Vasut2012-10-22-2/+0
| | | | | | | | | | | | | | | | | | | | | | The command declaration now uses the new LG-array method to generate list of commands. Thus the __u_boot_cmd section is now superseded and redundant and therefore can be removed. Also, remove externed symbols associated with this section from include/command.h . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
* | common: Convert the U-Boot commands to LG-arraysMarek Vasut2012-10-22-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts the old method of creating a list of command onto the new LG-arrays code. The old u_boot_cmd section is converted to new u_boot_list_cmd subsection and LG-array macros used as needed. Minor adjustments had to be made to the common code to work with the LG-array macros, mostly the fixup_cmdtable() calls are now passed the ll_entry_start and ll_entry_count instead of linker-generated symbols. The command.c had to be adjusted as well so it would use the newly introduced LG-array API instead of directly using linker-generated symbols. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
* | common: Implement support for linker-generated arraysMarek Vasut2012-10-22-0/+148
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for linker-generated array. These arrays are a generalization of the U-Boot command declaration approach. Basically, the idea is to generate an array, where elements of the array are statically initialized at compile time and each element is declared separatelly at different place. Such array is assembled together into continuous piece of memory by linker and a pointer to it's first entry can then be retrieved via accessor. The actual implementation relies on placing any variable that is to represent an element of LG-array into particular subsection of the .u_boot_list linker section . The subsection is determined by user options. Once compiled, it is possible to dump all symbols placed in .u_boot_list section and the subsections in which they should be and generate appropriate bounds for each requested subsection of the .u_boot_list section. Each such subsection thus contains __start and __end entries at the begining and end respecitively. This allows for simple run-time traversing of the array, since the symbols are properly defined. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-10-19-632/+163
|\ | | | | | | | | | | | | Conflicts: drivers/serial/serial_lh7a40x.c Signed-off-by: Tom Rini <trini@ti.com>
| * versatile: board configs: Use buffered writes on flash402jagan@gmail.com2012-10-18-0/+3
| | | | | | | | | | | | | | | | | | This patch provides a support to use buffered writes on flash for versatile and vexpress boards. This will certainly increase the flash writes. Signed-off-by: Jagannadha Sutradharudu Teki <402jagan@gmail.com>
| * dm: Move s3c24xx USB driver to a proper placeMarek Vasut2012-10-18-0/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: David Müller <d.mueller@elsoft.ch> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de>
| * dm: wdt: arm: Move tnetv107x into drivers/watchdog/Marek Vasut2012-10-18-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Oliver Brown <obrown@adventnetworks.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de>
| * Remove lh7a40x cpu and serial driverAlbert ARIBAUD2012-10-16-632/+0
| | | | | | | | | | | | | | Since commit 957731ed (ARM: remove broken "lpd7a40x" boards), lh7a40x cpu and serial driver have become unused. Remove them. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * h2200: Add support for iPAQ h2200 palmtopŁukasz Dałek2012-10-16-0/+157
| | | | | | | | | | | | | | | | | | Add basic support for HP iPAQ h2200 palmtop. h2200 palmtop was targeted to general consumers. It has 64 MB of RAM, 32 MB flash. No intergrated Wi-Fi nor Ethernet. Based on Intel PXA255 processor. It was shipped with Windows CE 4.2 operating system. Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
* | input: Add ANSI 3.64 escape sequence generation.Hung-Te Lin2012-10-19-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To support Non-ASCII keys (ex, Fn, PgUp/Dn, arrow keys, ...), we need to translate key code into escape sequence. (Updated by sjg@chromium.org to move away from a function to store keycodes, so we can easily record how many were sent. We now need to return this from input_send_keycodes() so we know whether keys were generated.) Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
* | input: i8042: Provide feature to disable keyboard before booting kernelLouis Yung-Chieh Lo2012-10-19-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BIOS leaves the keyboard enabled during boot time so that any keystroke would interfere kernel driver initialization. Add a way to disable the keyboard to make sure no scancode will be generated during the boot time. Note that the keyboard will be re-enabled again after the kernel driver is up. This code can be called from the board functions. Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
* | input: Use finer grain udelays while waitng for the i8042 keyboard buffer to ↵Gabe Black2012-10-19-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | empty On x86, the i8042 keyboard controller driver frequently waits for the keyboard input buffer to be empty to make sure the controller has had a chance to process the data it was given. The way the delay loop was structured, if the controller hadn't cleared the corresponding status bit immediately, it would wait 1ms before checking again. If the keyboard responded quickly but not instantly, the driver would still wait a full 1ms when perhaps 1us would have been sufficient. Because udelay is a busy wait anyway, this change decreases the delay between checks to 1us. Also, this change gets rid of a hardcoded 250ms delay. On Stumpy, this saves 100-150ms during boot. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
* | env: cosmetic: Consilidate the default env definitionJoe Hershberger2012-10-19-0/+135
| | | | | | | | | | | | | | There used to be a huge structure duplicated 3 times in the source. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@ti.com>
* | powerpc: delete Wind River SBC8560/8540 supportPaul Gortmaker2012-10-17-887/+0
| | | | | | | | | | | | | | | | The sbc8548/60 (both similar, just variations in UART hardware) support has been removed from the linux kernel as of v3.6-rc1~132 so lets also now remove it from the u-boot tree as well. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2012-10-17-2/+6
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| * | i2c: sh_i2c.c: support I2C2, I2C3 and I2C4Tetsuyuki Kobayashi2012-10-16-1/+4
| | | | | | | | | | | | | | | | | | | | | sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4. Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
| * | i2c: sh_i2c.c: adjust for SH73A0Tetsuyuki Kobayashi2012-10-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0. After this patch, "i2c md" and "i2c mw" command on U-Boot work properly on KZM-A9-GT board. Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
| * | i2c: sh_i2c.c: support iccl and icch extensionTetsuyuki Kobayashi2012-10-16-0/+1
| |/ | | | | | | | | | | | | | | R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and icch. This patch add support for the extentin bits. Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2012-10-17-28/+202
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| * | MIPS: qemu_mips.h: cleanup coding style and checkpatch.pl issuesDaniel Schwierzeck2012-10-16-28/+26
| | | | | | | | | | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: add board qemu-mips64 supportZhi-zhou Zhang2012-10-16-0/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both big-endian and little-endian are tested with below commands: Rom version: (Default, Now we config it as rom version) qemu-system-mips64el -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic qemu-system-mips64 -M mips -bios u-boot.bin -cpu MIPS64R2-generic -nographic Ram version: qemu-system-mips64el -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic qemu-system-mips64 -M mips -cpu MIPS64R2-generic -kernel u-boot -nographic Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: qemu_mips: move CONFIG_SYS_TEXT_BASE to qemu-mips.hZhi-zhou Zhang2012-10-16-0/+1
| |/ | | | | | | | | | | | | We define CONFIG_SYS_TEXT_BASE in board's specified header file. So config.mk is useless, then remove it. Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
* | change all versions of input_data() and output_data() to global weak aliasesPavel Herrmann2012-10-17-0/+11
| | | | | | | | | | | | | | | | | | | | This changes input_data() and friends from static function to global symbols under weak alias, to enable board specific overrides (and therefore get rid of board-specific code in cmd_ide.c) Also declare ide_bus_offset in the header file, so other files can use ATA_CURR_BASE as well. Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
* | split mpc8xx hooks from cmd_ide.cPavel Herrmann2012-10-17-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | move most of mpc8xx hooks from cmd_ide.c into ide_preinit() and newly created ide_init_postreset() (invoked after calling ide_reset after ide_preinit), some cleanup to make checkpatch happy, enable IDE init hooks in configs of affected boards. confusingly, these hooks are used by more than just mpc8xx-based boards, and therefore are placed in arch/ppc/lib/ note: checkpatch still emits warnings about using volatile Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
* | serial: Implement default_serial_puts()Marek Vasut2012-10-17-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot contains a lot of duplicit implementations of serial_puts() call which just pipes single characters into the port in loop. Implement function that does this behavior into common code, so others can make easy use of it. This function is called default_serial_puts() and it's sole purpose is to call putc() in loop on the whole string passed to it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com>
* | mpc82xx: Remove BMW board portStefan Roese2012-10-17-302/+0
|/ | | | | | | | | | | As the board seems to be unmaintained for some time, lets remove the support in mainline completely. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: James F. Dougherty <jfd@broadcom.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* Merge branch 'agust@denx.de-next' of git://git.denx.de/u-boot-stagingTom Rini2012-10-15-0/+85
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| * bootstage: Add new bootstage IDs for board, LCDSimon Glass2012-10-03-0/+5
| | | | | | | | | | | | Add bootstage IDs for board init and LCD. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bootstage: Add feature to stash/unstash bootstage infoSimon Glass2012-10-03-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to write the bootstage information to memory for use by a later utility, or the Linux kernel. Provide a function to do this as well as a function to read bootstage information back and incorporate it into the current table. This also makes it possible for U-Boot to chain to another U-Boot and pass on its bootstage information. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bootstage: Store boot timings in device treeSimon Glass2012-10-02-0/+7
| | | | | | | | | | | | | | | | Add an option, CONFIG_BOOTSTAGE_FDT to pass boot timings to the kernel in the device tree, if available. To use this, you must have CONFIG_OF_LIBFDT defined. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bootstage: Add time accumulation featureSimon Glass2012-10-02-0/+27
| | | | | | | | | | | | | | | | | | | | | | Sometimes we want to add up the amount of time spent in a particular activity when it is happening in a number of discrete chunks. Add bootstage_start() to mark the start of an acitivity and bootstage_accum() to accumulate the time since the last start. Calling these function in pairs results in the accumulated time being collected. Signed-off-by: Simon Glass <sjg@chromium.org>
| * bootstage: Export bootstage_add_record() functionSimon Glass2012-10-02-0/+17
| | | | | | | | | | | | | | This function is not static, but not exported either. Add a prototype in the header file and move the required enum to the header also. Signed-off-by: Simon Glass <sjg@chromium.org>
* | configs: mx6qsabre_common.h: Use default clock definitionsFabio Estevam2012-10-15-2/+0
| | | | | | | | | | | | | | Since commit 50d4a707f0 (mx5/6: Define default SoC input clock frequencies) we can use the default clock values. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mx31: Fix PDR0_CSI_PODFBenoît Thébaudeau2012-10-15-5/+5
| | | | | | | | | | | | | | | | | | | | The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0 register is actually composed of two bit-fields: one pre-divider and one post-divider. This patch fixes the CCM access macros and the code using them accordingly. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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