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* Merge git://git.denx.de/u-boot-arcTom Rini2015-12-21-0/+6
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| * axs103: add support of generic OHCI USB 1.1 controllerAlexey Brodkin2015-12-21-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support of USB 1.1 storage media on AXS103 board. For some yet unknown reason USB 2.0 doesn't work on AXS103 board issuing messages like this: ------------------------>8------------------- AXS# usb start starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... EHCI timed out on TD - token=0x80008c80 unable to get device descriptor (error=-1) 1 USB Device(s) found ------------------------>8------------------- As a work-around we're falling back to USB 1.1. Indeed it is much slower but at least USB storage devices are usable on AXS103. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* | sunxi: Enable a second mmc socket as boot target in the environmentKarsten Merker2015-12-21-0/+7
|/ | | | | | | | | | | | | | | Some sunxi-based boards (such as the Olimex A20-SOM-EVB) have a second MMC socket. This socket is not bootable hardware-wise, i.e. u-boot itself cannot be loaded from it, but once u-boot has started, the second socket can be used in the boot process provided by config_distro_bootcmd.h. If a second MMC socket is present, place it in the boot order after the first MMC socket. Signed-off-by: Karsten Merker <merker@debian.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-socfpgaTom Rini2015-12-19-101/+9
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| * arm: socfpga: fix trivial header preprocessor for socfpga_common.hDinh Nguyen2015-12-20-3/+3
| | | | | | | | | | | | | | Replace__CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ with __CONFIG_SOCFPGA_COMMON_H__ as the file is now called socfpga_common.h Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDRDinh Nguyen2015-12-20-7/+0
| | | | | | | | | | | | | | Now that the USB DWC2 probing is done from OF, remove this note to add CONFIG_USB_DWC2_REG_ADDR. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Switch CONFIG_HOSTNAME to CONFIG_SYS_BOARDMarek Vasut2015-12-20-15/+4
| | | | | | | | | | | | | | | | | | | | We already have the CONFIG_SYS_BOARD variable, which defines the name of the board. The value in CONFIG_HOSTNAME is exactly the same and is thus just a duplicity, so switch it to reuse CONFIG_SYS_BOARD . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Switch CONFIG_G_DNL_MANUFACTURER to CONFIG_SYS_VENDORMarek Vasut2015-12-20-19/+1
| | | | | | | | | | | | | | | | | | | | We already have the CONFIG_SYS_VENDOR variable, which defines the manufacturer of the board. The value in CONFIG_G_DNL_MANUFACTURER is just a duplicity, so switch it to reuse CONFIG_SYS_VENDOR . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: sockit: Zap VIRTUAL_TARGETMarek Vasut2015-12-20-4/+0
| | | | | | | | | | | | | | | | There is no VT for this board, so remove this incorrect macro. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: de0_nano: Zap VIRTUAL_TARGETMarek Vasut2015-12-20-4/+0
| | | | | | | | | | | | | | | | There is no VT for this board, so remove this incorrect macro. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: Allow DWC2 UDC probing from OFMarek Vasut2015-12-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: socrates: Remove Micrel PHY configurationMarek Vasut2015-12-20-7/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: sockit: Remove Micrel PHY configurationMarek Vasut2015-12-20-7/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: de0_nano: Remove Micrel PHY configurationMarek Vasut2015-12-20-3/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: cyclone5-socdk: Remove Micrel PHY configurationMarek Vasut2015-12-20-7/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: arria5-socdk: Remove Micrel PHY configurationMarek Vasut2015-12-20-7/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* | nios2: Soup up the shell experienceMarek Vasut2015-12-19-0/+4
| | | | | | | | | | | | | | | | Enable command auto completion and enable $version variable. This makes working with U-Boot far more enjoyable. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | nios2: Preconfigure $loadaddr variableMarek Vasut2015-12-19-2/+4
| | | | | | | | | | | | | | | | | | Preset the $loadaddr environment variable to some sane default, let's say half of the RAM. This variable is where the kernel is loaded using all sorts of .*load commands, so it's convenient to have it set. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | nios2: Up the monitor size to 512kiBMarek Vasut2015-12-19-2/+2
| | | | | | | | | | | | | | | | | | The monitor is growing much larger with various additions, like fitImage, command line completion, UBI etc. Make the monitor area larger so these features can be safely added. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | nios2: Calculate the env position from monitor sizeMarek Vasut2015-12-19-26/+26
|/ | | | | | | | | Reorder the 10m50 and 3c120 config files such, that the environment position can be calculated from the monitor size. The environment is placed right after the monitor. This removes one more ad-hoc variable. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-12-18-15/+8
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| * microblaze: Do not handle watchdog and gpio in SPLMichal Simek2015-12-18-2/+4
| | | | | | | | | | | | watchdog and gpio are not validated for SPL that's why do not use them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Remove support for LL_TEMACMichal Simek2015-12-18-5/+1
| | | | | | | | | | | | | | LL_TEMAC is available at big endian MB and it is not properly tested that's why the patch removes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Use malloc setting via KconfigMichal Simek2015-12-18-6/+0
| | | | | | | | | | | | | | Clean board specific file. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * microblaze: Make room for malloc before ELFMichal Simek2015-12-18-1/+2
| | | | | | | | | | | | | | | | Create space below u-boot binary for early malloc. It means memory layout is stack grows down, space for early malloc, u-boot code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Add driver dependencies to PHYLIBMichal Simek2015-12-18-1/+0
| | | | | | | | | | | | | | Clear driver dependecies via Kconfig. Remove PHYLIB dependency from the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm: zynq: Update ZYBO config optionsNathan Rossi2015-12-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | Update the ZYBO device tree and enable config options that relate to the added devices in the device tree. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2015-12-17-123/+35
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| * usb: s3c-otg: Rename usb/s3c_udc.h to usb/dwc2_udc.hMarek Vasut2015-12-17-4/+4
| | | | | | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the global s3c_udc.h header to dwc2_udc.h. The rename is done automatically: $ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \ `git grep "s3c_udc\.h" | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename s3c_udc_probe() functionMarek Vasut2015-12-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch is the second and final to rename global symbol, the s3c_udc_probe() function. The rename is done automatically: $ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \ `git grep s3c_udc_probe | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_plat_otg_dataMarek Vasut2015-12-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch is the first to rename global symbol, the struct s3c_plat_otg_data. The rename is done automatically: $ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \ `git grep s3c_plat_otg_data | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename USB_GADGET_S3C_UDC_OTG* to USB_GADGET_DWC2_OTG*Marek Vasut2015-12-17-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | The s3c-otg IP block is in fact a DWC2 OTG one, so finally rename the config option to make it less misleading. No functional change, just a mechanical change done using the following script: git grep USB_GADGET_S3C_UDC_OTG | cut -d : -f 1 | sort -u | \ while read line ; do sed -i "s/USB_GADGET_S3C_UDC_OTG/USB_GADGET_DWC2_OTG/g" $line ; done Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Tweak the commentsMarek Vasut2015-12-17-1/+1
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. Tweak the comments in the driver to reflect this fact. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Zap useless externsMarek Vasut2015-12-17-1/+1
| | | | | | | | | | | | | | The extern statements are useless, remove them. Also remove the extern ... controller, which is completely useless. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Split private bits from s3c_udc.hMarek Vasut2015-12-17-91/+3
| | | | | | | | | | | | | | | | | | Most of the functions are local to the s3c_udc driver, remove them from the s3c_udc.h header to stop those bits from propagating all over the place. Instead, move all the private stuff into new private s3c_udc_otg_priv.h header. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_udc to dwc2_udcMarek Vasut2015-12-17-5/+5
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_udc to struct dwc2_udc to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2015-12-16-0/+12
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| * rockchip: Add basic support for kylin boardhuang lin2015-12-13-0/+12
| | | | | | | | | | | | | | | | | | kylin board use rk3036 SOC, 512M sdram, 8G emmc. This add some basic files required to allow the board to output serial message and can run command(mmc info etc). Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Revert "include/linux: move typdef for uintptr_t"York Sun2015-12-16-1/+3
| | | | | | | | | | | | | | | | This reverts commit e8f954a756a825130d11b9c8fca70101dd8b3ac5, which causes compiling errors on 32-bit hosts. Acked-by: Aneesh Bansal <aneesh.bansal@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-12-14-14/+193
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| * | armv8: Add sata support on Layerscape ARMv8 boardTang Yuantian2015-12-15-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale ARM-based Layerscape contains a SATA controller which comply with the serial ATA 3.0 specification and the AHCI 1.3 specification. This patch adds SATA feature on ls2080aqds, ls2080ardb and ls1043aqds boards. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/ls1043ardb: add SECURE BOOT target for NORAneesh Bansal2015-12-15-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1043ARDB Secure Boot Target from NOR has been added. - Configs defined to enable esbc_validate. - ESBC Address in header is made 64 bit. - SMMU is re-configured in Bypass mode. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | include/linux: move typdef for uintptr_tAneesh Bansal2015-12-15-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | uintptr_t which is a typdef for unsigned long is needed for creating pointers (32 or 64 bit depending on Core) from 32 bit variables storing the address. If a 32 bit variable (u32) is typecasted to a pointer (void *), compiler gives a warning in case size of pointer on the core is 64 bit. The typdef has been moved from include/compiler.h to include/linux/types.h Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8: fsl-layerscale: Rewrite reserving memory for MC and debug serverYork Sun2015-12-15-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MC and debug server are not board-specific. Move reserving memory to SoC file, using the new board_reserve_ram_top function. Reduce debug server memory by 2MB to make room for secure memory. In the system with MC and debug server, the top of u-boot memory is not the end of memory. PRAM is not used for this reservation. Signed-off-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-12-24 15:39:35 +0000