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* exynos: video: Move struct exynos_platform_mipi_dsim into vidinfoSimon Glass2016-05-25-0/+1
| | | | | | | | | Put the pointer to this structure in struct vidinfo so that we can reference it without it being global. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* exynos: video: Drop static variables in exynos_fimd.cSimon Glass2016-05-25-0/+1
| | | | | | | | Drop these and use parameters instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* exynos: video: Drop dead codeSimon Glass2016-05-25-2/+0
| | | | | | | | | | We always use device tree with video, so can drop these #ifdefs. Some of the hardware addresses are not needed either. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* arm: exynos: add support for Exynos7420 SoCThomas Abraham2016-05-25-0/+147
| | | | | | | | | Add support for Exynos7420 SoC. The Exynos7420 SoC has four Cortex-A57 and four Cortex-A53 CPUs and includes various peripheral controllers. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* clk: exynos: add clock driver for Exynos7420 SocThomas Abraham2016-05-25-0/+207
| | | | | | | | | | | | Add a clock driver for Exynos7420 SoC. There are about 25 clock controller blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks are added in this initial version of the driver. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-05-24-4/+52
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| * armv8: ls1043ardb: enable scsi command and pcie to sata converterPo Liu2016-05-18-0/+21
| | | | | | | | | | | | | | Enable scsi command and pcie to sata chip 88SE9170. Signed-off-by: Po Liu <po.liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043ardb: invert irq pin polarity for AQR105 PHYShaohui Xie2016-05-18-0/+1
| | | | | | | | | | | | | | | | | | To use AQR105 PHY's interrupt, we need to invert the IRQ pin polarity by setting relative bit in SCFG_INTPCR register, because AQR105 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * crypto/fsl: add support for multiple SEC engines initializationAlex Porosanu2016-05-18-2/+4
| | | | | | | | | | | | | | | | | | For SoCs that contain multiple SEC engines, each of them needs to be initialized (by means of initializing among others the random number generator). Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043a: copy kernel from QSPI when booting with QSPI enabledQianyu Gong2016-05-18-0/+5
| | | | | | | | | | | | | | | | | | IFC won't be initialized in U-Boot if QSPI is enabled on LS1043AQDS. So this patch could fix 'sync abort' caused by autoboot that tries to access IFC address. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080a: update eth primePrabhakar Kushwaha2016-05-18-2/+2
| | | | | | | | | | | | | | | | As per new PHY framework, DPNI naming convetion is no more used. Use new naming convention. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080: enable sec_init in U-BootAneesh Bansal2016-05-18-0/+8
| | | | | | | | | | | | | | | | Define CONFIG_FSL_CAAM for LS2080 which would enable call to sec_init() during U-Boot. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add workaround for erratum A-009801Shengzhou Liu2016-05-17-0/+4
| | | | | | | | | | | | | | | | The initial training for the DDRC may provide results that are not optimized. The workaround provides better read timing margins. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers/ddr/fsl: update workaround for erratum A-008511Shengzhou Liu2016-05-17-0/+3
| | | | | | | | | | | | | | | | Per the latest erratum document, update step 4 and step 8, only DEBUG_29[21] is changed, all other bits should not be changed. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/ls1043: Add workaround for DDR erratum A-008850Shengzhou Liu2016-05-17-0/+4
| | | | | | | | | | | | | | | | | | Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-05-24-58/+84
|\ \ | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/zynq_gem.c
| * | net: phy: Add phy_interface_is_sgmii to phy.hDan Murphy2016-05-24-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a helper to phy.h to identify whether the phy is configured for SGMII all variables. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: Move is_rgmii helper to phy.hDan Murphy2016-05-24-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the phy_interface_is_rgmii to the phy.h file for all phy's to be able to use the API. This now aligns with the Linux kernel based on commit e463d88c36d42211aa72ed76d32fb8bf37820ef1 Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: dp83867: Add device tree bindings and documentationDan Murphy2016-05-24-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the device tree bindings and the accompanying documentation for the TI DP83867 Giga bit ethernet phy driver. The original document was from: [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel] Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | drivers: net: cpsw: Add reading of DT phy-handle nodeDan Murphy2016-05-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the ability to read the phy-handle node of the cpsw slave. Upon reading this handle the phy-id can be stored based on the reg node in the DT. The phy-handle also needs to be stored and passed to the phy to access any phy data that is available. Signed-off-by: Dan Murphy <dmurphy@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | drivers: net: cpsw: add support for reading mac address from efuseMugunthan V N2016-05-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Different TI platforms has to read with different combination to get the mac address from efuse. So add support to read mac address based on machine/device compatibles. The code is taken from Linux drivers/net/ethernet/ti/cpsw-common.c done by Tony Lindgren. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | ti_omap5_common: eth: do not define DM_ETH for splMugunthan V N2016-05-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since omap's spl doesn't support DM currently, do not define DM_ETH for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | drivers: core: device: add support to check dt compatible for a device/machineMugunthan V N2016-05-24-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide an api to check whether the given device or machine is compatible with the given compat string which helps in making decisions in drivers based on device or machine compatible. Idea taken from Linux. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: Add PHY driver for mv88e61xx switchesKevin Smith2016-05-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous mv88e61xx driver was a driver for configuring the switch, but did not integrate with the PHY/networking system, so it could not be used as a PHY by U-boot. This is a complete rework to support this device as a PHY. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: Remove unused mv88e61xx switch driverKevin Smith2016-05-24-58/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No boards are using this driver. Remove in preparation for a new driver with integrated PHY support. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-05-24-8/+72
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| * | | image: Add boot_get_fpga() to load fpga with bootmMichal Simek2016-05-24-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add function boot_get_fpga() which find and load bitstream to programmable logic if fpga entry is present. Function is supported on Xilinx devices for full and partial bitstreams in BIN and BIT format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Remove additional blankline in image.h
| * | | mkimage: Report information about fpgaMichal Simek2016-05-24-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add FIT_FPGA_PROP that user can identify an optional entry for fpga. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | ARM64: zynqmp: Add SPL support supportMichal Simek2016-05-24-2/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support RAM and MMC boot mode in SPL also with SPL_FIT images. In MMC boot mode two boot options are available: 1) Boot flow with ATF(EL3) and full U-Boot(EL2): aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000 -d bl31.bin atf.ub cp spl/boot.bin <sdcard fat partition> cp atf.ub <sdcard fat partition> cp u-boot.bin <sdcard fat partition> 2) Boot flow with full U-Boot(EL3): cp spl/boot.bin <sdcard> cp u-boot*.img <sdcard> 3) emmc boot mode dd if=/dev/zero of=sd.img bs=1024 count=1024 parted sd.img mktable msdos parted sd.img mkpart p fat32 0% 100% kpartx -a sd.img mkfs.vfat /dev/mapper/loop0p1 mount /dev/mapper/loop0p1 /mnt/ cp spl/boot.bin /mnt cp u-boot.img /mnt cp u-boot.bin /mnt cp atf.ub /mnt umount /dev/mapper/loop0p1 kpartx -d sd.img cp sd.img /tftpboot/ and program it via u-boot tftpb 10000 sd.img mmcinfo mmc write 10000 0 $filesize mmc rescan mmc part ls mmc 0 psu_init() function contains low level SoC setup generated for every HW design by Xilinx design tools. xil_io.h is only supporting file to fix all dependencies from tools. The same solution was used on Xilinx Zynq. The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which stays at the same location all the time. Bootrom expects starting address to be at 0xfffc0000 that's why this address is SPL_TEXT_BASE. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | tools: zynqmpimage: Add Xilinx ZynqMP boot header generationMichal Simek2016-05-24-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the zynqmpimage to mkimage. Only basic functionality is supported without encryption and register initialization with one partition which is filled by U-Boot SPL. For more detail information look at Xilinx ZynqMP TRM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | ARM64: zynqmp: Enable option to overwrite default variablesMichal Simek2016-05-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Enable overwriting variables out of main config file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | spl: Introduce new function spl_board_prepare_for_bootMichal Simek2016-05-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call this function before passing control from SPL. For fpga case it is necessary to enable for example level shifters when bitstream is programmed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | ARM64: zynqmp: Remove CONFIG_PREBOOTMichal Simek2016-05-24-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_PREBOOT variable is breaking ./test/py framework. Remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM64: zynqmp: Enable eMMC boot partitions commandsMichal Simek2016-05-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable some additional features of the eMMC boot partitions. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM64: zynqmp: Add support for reading MAC from eepromMichal Simek2016-05-24-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for on board eeprom with programmed MAC for using in u-boot to have uniq address for every board. Most of the time uniq MAC address is on a label on the board. If address is not programmed use these command to program it. On zcu102: ZynqMP> mm.b 0 00000000: 00 ? 00 00000001: a0 ? 0a 00000002: 35 ? 35 00000003: 02 ? 02 00000004: 00 ? ef 00000005: 00 ? 67 00000006: 00 ? q i2c dev 5 i2c write 0 54 20 6 i2c md 54 20 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM64: zynqmp: Enable missing distro default optionsMichal Simek2016-05-24-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | Enable all options which distros requires. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | ARM: zynq: load u-boot.img whether CONFIG_OF_SEPARATE is defined or notMasahiro Yamada2016-05-24-5/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Since commit ad1ecd2063da ("fdt: Build a U-Boot binary without device tree"), u-boot-dtb.img is identical to u-boot.img, so SPL can always load u-boot.img whether CONFIG_OF_SEPARATE is defined or not. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-05-24-0/+155
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| * | | board: atmel: add SAMA5D2 PTC Engineering boardWenyou Yang2016-05-24-0/+155
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | The board supports following features: - Boot media support: NAND Flash/SPI Flash - Support ethernet - Support USB mass storage Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-05-23-3/+184
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| * | x86: minnowmax: Adjust U-Boot environment address in SPI flashBin Meng2016-05-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently U-Boot environment address is at offset 0x7fe00 of a 8MB SPI flash. When creating a partial u-boot.rom image without flash descriptor and ME firmware, U-Boot actually occupies the last 1MB of the flash, and reprograming U-Boot causes previous environment settings get lost which is not convenient during testing. Adjust the environment address to 0x6ef000 instead (before the MRC cache data region in the flash). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]Miao Yan2016-05-23-0/+0
| | | | | | | | | | | | | | | | | | | | | Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: qemu: move x86 specific operations out of qfw coreMiao Yan2016-05-23-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original implementation of qfw includes several x86 specific operations, like directly calling outb/inb and using some inline assembly code which prevents it being ported to other architectures. This patch adds callback functions and moves those to arch/x86/ Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | cmd: qfw: make fwcfg_present and fwcfg_dma_present publicMiao Yan2016-05-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | This patch is part of the qfw refactor work. This patch makes qemu_fwcfg_present() and qemu_fwcfg_dma_present() public functions. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | cmd: qfw: remove qemu_fwcfg_free_files()Miao Yan2016-05-23-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is part of the qfw refactor work. The qemu_fwcfg_free_files() function is only used in error handling in ACPI table generation, let's not make this a core function and move it to the right place. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | cmd: qfw: add API to iterate firmware listMiao Yan2016-05-23-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | This patch is part of the refactor work of qfw. It adds 3 APIs to qfw core to iterate firmware list. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: qemu: Move qfw command over to cmd and add Kconfig entryTom Rini2016-05-23-0/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Move the command portion of arch/x86/cpu/qemu/fw_cfg.c into cmd/qemu_fw_cfg.c - Move arch/x86/include/asm/fw_cfg.h to include/qemu_fw_cfg.h - Rename ACPI table portion to arch/x86/cpu/qemu/acpi_table.c Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: Remove acpi=off boot parameter when ACPI is onBin Meng2016-05-23-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the kernel boot parameter acpi=off so that kernel can turn on ACPI support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-23-2/+282
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| * | | mips: ath79: Add support for TPLink WDR4300Marek Vasut2016-05-21-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the TPLink WDR4300 router, which is based on the AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported on this system as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
generated by cgit v1.1 at 2024-12-29 00:21:38 +0000