summaryrefslogtreecommitdiff
path: root/include
Commit message (Collapse)AuthorAgeLines
* powerpc/B4: Merge B4420 and B4860 in config_mpc85xx.hPoonam Aggrwal2013-05-24-1/+0
| | | | | | | | | | | | B4420 is a subset of B4860. Merge them in config_mpc85xx.h to simplify the defines. - Removed #define CONFIG_SYS_FSL_NUM_CLUSTERS as this is used nowhere. - defined CONFIG_SYS_NUM_FM1_10GEC to 0 for B4420 as it does not have 10G. Also move CONFIG_E6500 out of B4860QDSds.h into config_mpc85xx.h. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Enable XAUI interface for B4860QDSSuresh Gupta2013-05-24-1/+5
| | | | | | | | | | | | | - Added SERDES2 PRTCLs = 0x98, 0x9E - Default Phy Addresses for Teranetics PHY on XAUI card The PHY addresses of Teranetics PHY on XAUI riser card are assigned based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1 and slot2 - Configure MDIO for 10Gig Mac Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/p5040: enable PBL tool supportShaohui Xie2013-05-24-0/+2
| | | | | | | | Provided a default RCW for P5040, then it can use PBL to build ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/T4160: Merge T4160 and T4240 in config_mpc85xx.hYork Sun2013-05-24-1/+0
| | | | | | | | T4160 is a subset of T4240. Merge them in config_mpc85xx.h to simplify the defines. Also move CONFIG_E6500 out of t4qds.h into config_mpc85xx.h. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* T4240/ramboot: enable PBL tool for T4240Shaohui Xie2013-05-24-0/+2
| | | | | | | | Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use PBL tool to produce the ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* cfi_flash: Fix unaligned accesses to cfi_qry structureAndrew Gabbasov2013-05-23-7/+11
| | | | | | | | | | | | | | | Packed structure cfi_qry contains unaligned 16- and 32-bits members, accessing which causes problems when cfi_flash driver is compiled with -munaligned-access option: flash initialization hangs, probably due to data error. Since the structure is supposed to replicate the actual data layout in CFI Flash chips, the alignment issue can't be fixed in the structure. So, unaligned fields need using of explicit unaligned access macros. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Stefan Roese <sr@denx.de>
* mmc: update Faraday FTSDC010 for rw performanceKuo-Jung Su2013-05-15-9/+22
| | | | | | | | | | | | | | | | Faraday FTSDC010 is a MMC/SD host controller. Although there is already a driver in current u-boot release, which is modified from eSHDC and contributed by Andes Tech. Its performance is too terrible on Faraday A36x SoC platforms, so I turn to implement this new version of driver which is 10+ times faster than the old one. It's carefully designed to be compatible with Andes chips, so it should be safe to replace it. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxTom Rini2013-05-15-16/+33
|\
| * T4240/net: use QSGMII card PHY address by defaultShaohui Xie2013-05-14-1/+0
| | | | | | | | | | | | | | | | Use QSGMII card PHY address as default SGMII card PHY address, QSGMII card PHY address is variable depends on different slot. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * net/phy: add VSC8574 supportShaohui Xie2013-05-14-0/+2
| | | | | | | | | | | | | | | | | | | | The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes interfaces for quad-port dual media capability. This driver supports SGMII and QSGMII MAC mode. For now SGMII mode is tested. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * t4240qds/eth: fixup ethernet for t4240qdsShengzhou Liu2013-05-14-4/+0
| | | | | | | | | | | | | | | | | | | | | | 1, Implemented board_ft_fman_fixup_port() to fix port for kernel. 2, Implemented fdt_fixup_board_enet() to fix node status of different slots and interfaces. 3, Adding detection of slot present for XGMII interface. 4, There is no PHY for XFI, so removed related phy address settings. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc: Add T4160QDSYork Sun2013-05-14-1/+14
| | | | | | | | | | | | | | | | | | T4160QDS shares the same platform as T4240QDS. T4160 is a low power version of T4240, with eight e6500 cores, two DDR3 controllers, and slightly different SerDes protocols. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/t4240qds: Move SoC define into boards.cfgYork Sun2013-05-14-1/+0
| | | | | | | | | | | | | | | | Separate CONFIG_PPC_T4240 from board config file. Prepare to add more SoC variants supported on the same board. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/t4240qds: Add voltage ID supportYork Sun2013-05-14-2/+10
| | | | | | | | | | | | | | | | T4240 has voltage ID fuse. Read the fuse and configure the voltage correctly. Core voltage has higher tolerance on over side than below. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * Fman/t4240: some fix for 10G XAUIShaohui Xie2013-05-14-2/+2
| | | | | | | | | | | | | | | | | | | | 1. fix 10G mac offset by plus 8; 2. add second 10G port info for FM1 & FM2 when init ethernet info; 3. fix 10G lanes name to match lane protocol table; Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/t4240qds: fix XAUI card PHY addressShaohui Xie2013-05-14-4/+4
| | | | | | | | | | | | Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/t4240qds: Fix SPI flash typeShaohui Xie2013-05-14-1/+1
| | | | | | | | | | | | | | T4240QDS uses a SST instead of SPANSION SPI flash. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Power: remove support for Freescale MPC8220Wolfgang Denk2013-05-15-1691/+1
| | | | | | | | | | | | | | | | | | | | The Freescale MPC8220 Power Architecture processors have long reached EOL; Freescale does not even list these any more on their web site. Remove the code to avoid wasting maitaining efforts on dead stuff. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andy Fleming <afleming@gmail.com>
* | image: Add device tree setup to image librarySimon Glass2013-05-14-13/+62
| | | | | | | | | | | | | | | | | | | | | | This seems to be a common function for several architectures, so create a common function rather than duplicating the code in each arch. Also make an attempt to avoid introducing #ifdefs in the new code, partly by removing useless #ifdefs around function declarations in the image.h header. Signed-off-by: Simon Glass <sjg@chromium.org>
* | image: Add CONFIG_FIT_SPL_PRINT to control FIT image printing in SPLSimon Glass2013-05-14-2/+31
| | | | | | | | | | | | | | | | This code is very large, and in SPL it isn't always useful to print out image information (in fact there might not even be a console active). So disable this feature unless this option is set. Signed-off-by: Simon Glass <sjg@chromium.org>
* | image: Remove remaining #ifdefs in image-fit.cSimon Glass2013-05-14-0/+2
| | | | | | | | | | | | | | There are only two left. One is unnecessary and the other can be moved to the header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: image: Add support for booting images in sandboxSimon Glass2013-05-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Much of the image code uses addresses as ulongs and pointers interchangeably, casting between the two forms as needed. This doesn't work with sandbox, which has a U-Boot RAM buffer which is separate from the host machine's memory. Adjust the cost so that translating from a U-Boot address to a pointer uses map_sysmem(). This allows bootm to work correctly on sandbox. Note that there are no exhaustive tests for this code on sandbox, so it is possible that some dark corners remain. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de> (v1)
* | image: Rename hash printing to fit_image_print_verification_data()Simon Glass2013-05-14-1/+0
| | | | | | | | | | | | | | | | This function will be used to print signatures as well as hashes, so rename it. Also make it static since it is not used outside this file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | image: Rename fit_add_hashes() to fit_add_verification_data()Simon Glass2013-05-14-2/+8
| | | | | | | | | | | | | | | | | | We intend to add signatures to FITs also, so rename this function so that it is not specific to hashing. Also rename fit_image_set_hashes() and make it static since it is not used outside this file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | image: Export fit_conf_get_prop_node()Simon Glass2013-05-14-0/+14
| | | | | | | | | | | | | | This function will be needed by signature checking code, so export it, and also add docs. Signed-off-by: Simon Glass <sjg@chromium.org>
* | image: Move hash checking into its own functionSimon Glass2013-05-14-3/+5
| | | | | | | | | | | | | | | | The existing function is long and most of the code is indented a long way. Before adding yet more code, split this out into its own function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de> (v1)
* | image: Rename fit_image_check_hashes() to fit_image_verify()Simon Glass2013-05-14-2/+2
| | | | | | | | | | | | | | | | | | This is the main entry point to the FIT image verification code. We will be using it to handle image verification with signatures, so rename the function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | image: Convert fit_image_hash_set_value() to static, and renameSimon Glass2013-05-14-2/+0
| | | | | | | | | | | | | | | | | | This function doesn't need to be exported, and with verification we want to use it for setting the 'value' property in any node, so rename it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | image: Move HOSTCC image code to tools/Simon Glass2013-05-14-0/+3
| | | | | | | | | | | | | | | | This code is never compiled into U-Boot, so move it into a separate file in tools/ to avoid the large #ifdef. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | image: Export fit_check_ramdisk()Simon Glass2013-05-14-0/+3
| | | | | | | | | | | | | | | | One we split out the FIT code from image.c we will need this function. Export it in the header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | image: Move timestamp #ifdefs to header fileSimon Glass2013-05-14-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than repeat the line #if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || \ defined(USE_HOSTCC) everywhere, put this in a header file and #define IMAGE_ENABLE_TIMESTAMP to either 1 or 0. Then we can use a plain if() in most code and avoid the #ifdefs. The compiler's dead code elimination ensures that the result is the same. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* | libfdt: Add fdt_next_subnode() to permit easy subnode iterationSimon Glass2013-05-14-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Iterating through subnodes with libfdt is a little painful to write as we need something like this: for (depth = 0, count = 0, offset = fdt_next_node(fdt, parent_offset, &depth); (offset >= 0) && (depth > 0); offset = fdt_next_node(fdt, offset, &depth)) { if (depth == 1) { /* code body */ } } Using fdt_next_subnode() we can instead write this, which is shorter and easier to get right: for (offset = fdt_first_subnode(fdt, parent_offset); offset >= 0; offset = fdt_next_subnode(fdt, offset)) { /* code body */ } Also, it doesn't require two levels of indentation for the loop body. Signed-off-by: Simon Glass <sjg@chromium.org> (Cherry-picked from dtc commit 4e76ec79) Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* | bootstage: Don't build for HOSTCCSimon Glass2013-05-14-2/+3
| | | | | | | | | | | | | | | | We don't measure boot timing on the host, or with SPL, so use both conditions in the bootstage header. This allows us to avoid using conditional compilation around bootstage_...() calls. (#ifdef) Signed-off-by: Simon Glass <sjg@chromium.org>
* | hash: Add a way to calculate a hash for any algortihmSimon Glass2013-05-14-0/+22
| | | | | | | | | | | | | | | | | | | | | | Rather than needing to call one of many hashing algorithms in U-Boot, provide a function hash_block() which handles this, and can support all available hash algorithms. Once we have md5 supported within hashing, we can use this function in the FIT image code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-blackfin into ↵Tom Rini2013-05-14-29/+50
|\ \ | |/ |/| | | powerpc-eldk53-warning-fixes
| * bfin: Move gpio support for bf54x and bf60x into the generic driver folder.Sonic Zhang2013-05-13-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx. A lot of machine macros are used to accomodate both code in one gpio driver. This patch split the old gpio driver and move new gpio2 support to the generic gpio driver folder. - To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's config header file. - The gpio2 driver supports bf54x, bf60x and future ADI processors, while the older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561. - All blackfin specific gpio function names are replaced by the generic gpio APIs. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Move blackfin serial driver out of blackfin arch folder.Sonic Zhang2013-05-13-0/+3
| | | | | | | | | | | | | | | | - Move blackfin serial driver to the generic driver folder. - Move blackfin serial headers to blackfin arch head folder. - Update the include path to blackfin serial header in start up code. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Move blackfin watchdog driver out of the blackfin arch folder.Sonic Zhang2013-05-13-2/+7
| | | | | | | | | | | | | | | | | | | | - Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined. - Move blackfin hw watchdog driver to the generic driver folder. - Call hw_watchdog_init() from blackfin board init code. - Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS - Update README.watchdog accordingly Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Enable early print via the generic serial API.Sonic Zhang2013-05-13-3/+0
| | | | | | | | | | | | | | | | | | | | | | Remove blackfin specific implementation of the generic serial API when early print macro is defined. In BFIN_BOOT_BYPASS mode, don't call generic serial_puts, because early print in bypass mode is running before code binary is relocated to the link address. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: Fit u-boot image size into limited nor flash on blackfin.Sonic Zhang2013-05-13-10/+14
| | | | | | | | | | | | | | | | | | | | - Disable NAND driver on bf537-stamp. - Make MMC_SPI optional. - Disable LCD driver on bf527-ezkit. - Enlarge BF609 nor flash reserved size from 256k to 512k bytes. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
| * blackfin: bf609: add softswitch config commandBob Liu2013-05-13-0/+1
| | | | | | | | | | | | | | Add softswitch_output command for bf609-ezkit to enable softswitches. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: run core1 from L1 code sram start address in uboot init code on core 0Sonic Zhang2013-05-13-0/+10
| | | | | | | | | | | | | | | | Define core 1 L1 code sram start address. Add function to enable core 1 for BF609 and BF561. Add config macro to allow customer to run core 1 in uboot init code on core 0. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * blackfin: reduce size of u-boot.ldr in bf548-ezkit default config.Bob Liu2013-05-13-14/+9
| | | | | | | | | | | | | | Enable VIDEO and NAND supports only when the config options is defined. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | x86: config: Enable LZO for coreboot, remove zlib, gzipSimon Glass2013-05-13-0/+4
| | | | | | | | | | | | We don't use zlib and gzip but do use lzo, so enable this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | bootstage: Allow marking a particular line of codeSimon Glass2013-05-13-0/+23
| | | | | | | | | | | | | | | | Add a function which allows a (file, function, line number) to be marked in bootstage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
* | x86: Enable bootstage for corebootSimon Glass2013-05-13-0/+9
| | | | | | | | | | | | | | This is a convenient way of finding out where boottime is going. Enable it for coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | bootstage: Copy bootstage strings post-relocationDoug Anderson2013-05-13-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Any pointers to name strings that were passed to bootstage_mark_name() pre-relocation should be copied post-relocation so that they don't get trashed as the original location of U-Boot is re-used for other purposes. This change introduces a new API call that should be called from board_init_r() after malloc has been initted on any board that uses bootstage. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | bootstage: Add stubs for new bootstage functionsSimon Glass2013-05-13-0/+16
| | | | | | | | | | | | | | | | | | Some functions don't have a stub for when CONFIG_BOOTSTAGE is not defined. Add one to avoid #ifdefs in the code when this is used in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
* | x86: Re-enable PCAT timer 2 for beepingSimon Glass2013-05-13-0/+1
| | | | | | | | | | | | | | | | While we don't want PCAT timers for timing, we want timer 2 so that we can still make a beep. Re-purpose the PCAT driver for this, and enable it in coreboot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: Add TSC timerSimon Glass2013-05-13-3/+1
|/ | | | | | | | | | | | | | This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-28 01:34:50 +0000