summaryrefslogtreecommitdiff
path: root/include
Commit message (Collapse)AuthorAgeLines
* powerpc: ppc4xx: remove korat board supportMasahiro Yamada2015-03-17-550/+0
| | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Larry Johnson <lrj@acm.org>
* powerpc: mpc5xxx: remove galaxy5200 board supportMasahiro Yamada2015-03-17-431/+0
| | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Eric Millbrandt <emillbrandt@dekaresearch.com>
* powerpc: ppc4xx: remove W7OLMC/W7OLMG board supportMasahiro Yamada2015-03-17-631/+0
| | | | | | | | They have not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Erik Theisen <etheisen@mindspring.com>
* powerpc: mpc5xxx: remove aev, TB5200 board supportMasahiro Yamada2015-03-17-886/+0
| | | | | | | They have not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* powerpc: ppc4xx: remove JSE board supportMasahiro Yamada2015-03-17-276/+0
| | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Stephen Williams <steve@icarus.com>
* powerpc: mpc5xxx: remove BC3450 board supportMasahiro Yamada2015-03-17-541/+0
| | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* board/BuR/common: use SYS_CONSOLE_OVERWRITEHannes Petermaier2015-03-17-0/+2
| | | | | | | We don't want that CONSOLE is redirected to LCD upon init, we rather prefer that console is still on the serial line. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* board/BuR/common: fix compiler warningHannes Petermaier2015-03-16-1/+1
| | | | | Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com> Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2015-03-15-1/+1
|\
| * ARM: UniPhier: adjust device trees for business transferMasahiro Yamada2015-03-15-1/+1
| | | | | | | | | | | | | | Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | config_distro_bootcmd.h: add note on error handlingStephen Warren2015-03-13-0/+16
| | | | | | | | | | | | | | | | | | | | | | This should make it more clear why there appear to be C pre-processor symbols in the file that contain mixed case. They're really error messages. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | beagle_x15: increase phy autoneg timeoutSekhar Nori2015-03-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When Beagle X15 is connected to Gigabit switch, it takes more time to finish auto-negotiation than on a 10/100 switch. The default 4 second limit times-out more often than not. This is observed when testing with a D-Link DGS-1008A desktop switch. Increase the auto-negotiation time-out for Beagle-X15 to handle this case. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: OMAP3: rx51: Enable workaround for ARM errata 454179, 430973, 621766Nishanth Menon2015-03-13-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | RX51 has a secure logic which uses different parameters compared to traditional implementation. So, make the generic secure acr write over-ride-able by board file and refactor rx51 code to use this. While at it, enable the OMAP3 specific errata code for 454179, 430973, 621766. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: OMAP3: Enable workaround for ARM errata 454179, 430973, 621766Nishanth Menon2015-03-13-0/+61
| | | | | | | | | | | | | | | | | | Enable the OMAP3 specific errata code for 454179, 430973, 621766 and while at it, remove legacy non-revision checked errata logic. Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: DRA7 / OMAP5: Add workaround for ARM errata 798870Praveen Rao2015-03-13-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the workaround for ARM errata 798870 for OMAP5 / DRA7 which says "If back-to-back speculative cache line fills (fill A and fill B) are issued from the L1 data cache of a CPU to the L2 cache, the second request (fill B) is then cancelled, and the second request would have detected a hazard against a recent write or eviction (write B) to the same cache line as fill B then the L2 logic might deadlock." An l2auxctlr accessor implementation for OMAP5 and DRA7 is introduced here as well. Signed-off-by: Praveen Rao <prao@ti.com> Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: OMAP3: Rename omap3.h to omap.h to be generic as all SoCsNishanth Menon2015-03-13-19/+19
| | | | | | | | | | | | | | | | This is in preperation of using generic cross OMAP code. Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | am335x_evm_usbspl: Remove other SPL modesTom Rini2015-03-13-0/+6
|/ | | | | | | | The purpose of this build target is to do SPL over USB RNDIS. We remove YMODEM, MMC and NAND (and re-set ENV to be built-in) as when those are needed we can use the other build targets. This brings us well under size limit again. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-03-10-58/+75
|\ | | | | | | | | | | | | Conflicts: README Signed-off-by: Tom Rini <trini@konsulko.com>
| * apalis/colibri_t30: add misc cmds increase buf sizes and max argsMarcel Ziswiler2015-03-04-2/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to work with our downstream U-Boot environment and update scripts add support for the following miscellaneous commands: CONFIG_CMD_SETEXPR CONFIG_FAT_WRITE Increase the console I/O and print as well as argument buffer sizes: CONFIG_SYS_CBSIZE CONFIG_SYS_PBSIZE CONFIG_SYS_BARGSIZE Increase the maximum number of arguments allowed: CONFIG_SYS_MAXARGS Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * apalis_t30: enable gigabit ethernet via pcieMarcel Ziswiler2015-03-04-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | Now with all the Tegra PCIe and Intel E1000 gigabit Ethernet driver updates being merged actually make use of it. While at it get rid of the USB networking support which now does not make much sense any longer. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: move common config defines centrallyStephen Warren2015-03-04-45/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | All boards need CONFIG_BOARD_EARLY_INIT_F, and many actively need CONFIG_BOARD_LATE_INIT. Move both of these into tegra-common.h so that board config headers don't need to repeatedly define them. Later commits will add new code in board_late_init() which applies to all boards, so CONFIG_BOARD_LATE_INIT should be enabled for all Tegra boards. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * edminiv2: drop CONFIG_CFI_LEGACYAlbert ARIBAUD2015-02-25-4/+0
| | | | | | | | | | | | | | | | Nowadays generic CFI code properly detects the ED Mini V2's Macronix MC29LV400CB flash chip, therefore we can drop the CONFIG_FLASH_CFI_LEGACY option and associated settings and code. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * edminiv2: switch to SPLAlbert ARIBAUD2015-02-25-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ED Mini V2 is based on Orion 5x which boots at fixed address 0xFFFF0000 in NOR Flash. Place SPL there, and switch U-Boot from .bin to .img format, stored in NOR Flash at 0xFFF90000. Note: this patch was tested on HW and works, i.e. it boots U-Boot properly, but SPL console output currently does not appear, due to GD being trashed by arch/arm/lib/spl.c. This trashing is soon to be removed, and then ED Mini V2 SPL console output will become visible. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * edminiv2: switch to generic board supportAlbert ARIBAUD2015-02-25-0/+4
| | | | | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2015-02-24-1272/+3357
| |\
| * | configs/ls2085a: Add support for Cortex-A57 erratasBhupesh Sharma2015-01-31-0/+4
| | | | | | | | | | | | | | | | | | | | | This patch adds support for handling 828024 and 826974 erratas for Cortex-A57 cores present on LS2085A SoC. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
* | | sunxi: video: Fix VIDEO_LCD_PANEL_I2C being enabled by defaultHans de Goede2015-03-10-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a typo in board/sunxi/Kconfig which caused VIDEO_LCD_PANEL_I2C to be enabled on all sunxi boards. Also fix a compile error which shows up once VIDEO_LCD_PANEL_I2C is actually disabled on most boards as it should be. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | sunxi: axp221: Add VBUS detection supportChen-Yu Tsai2015-03-10-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the AXP PMICs support VBUS detection, i.e. checking whether VBUS power input is available and usable (supplied by an external source). A few boards use this instead of a separate GPIO to detect VBUS on USB OTG. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | armv8/vexpress64: make multientry conditionalLinus Walleij2015-03-09-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the Freescale ARMv8 board LS2085A will enter U-Boot both on a master and a secondary (slave) CPU, this is not the common behaviour on ARMv8 platforms. The norm is that U-Boot is entered from the master CPU only, while the other CPUs are kept in WFI (wait for interrupt) state. The code determining which CPU we are running on is using the MPIDR register, but the definition of that register varies with platform to some extent, and handling multi-cluster platforms (such as the Juno) will become cumbersome. It is better to only enable the multiple entry code on machines that actually need it and disable it by default. Make the single entry default and add a special ARMV8_MULTIENTRY KConfig option to be used by the platforms that need multientry and set it for the LS2085A. Delete all use of the CPU_RELEASE_ADDR from the Vexpress64 boards as it is just totally unused and misleading, and make it conditional in the generic start.S code. This makes the Juno platform start U-Boot properly. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | tegra-common: increase malloc pool len by dfu mmc file buffer sizePrzemyslaw Marczak2015-03-09-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Warren <twarren.nvidia@gmail.com>
* | | ti-armv7-common: increase malloc pool len by dfu mmc file buffer sizePrzemyslaw Marczak2015-03-09-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Rini <trini@konsulko.com>
* | | zynq-common: increase malloc pool len by dfu mmc file buffer sizePrzemyslaw Marczak2015-03-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Michal Simek <michal.simek@xilinx.com>
* | | exynos: config: enable arch memcpy and arch memsetPrzemyslaw Marczak2015-03-09-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit enables the following configs: - CONFIG_USE_ARCH_MEMCPY - CONFIG_USE_ARCH_MEMSET This increases the performance of memcpy/memset and also reduces the boot time. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~1527ms - before this change (arch memset enabled for .bss clear) - ~1384ms - after this change Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
* | | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-03-05-2/+117
|\ \ \
| * | | arm: socfpga: Add Altera Arria V DK supportMarek Vasut2015-03-04-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Altera Arria V development kit. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Zap board_early_init_f()Marek Vasut2015-03-04-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zap this unused empty function, no point in having it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Zap checkboard()Marek Vasut2015-03-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since all boards now have a DT, instead of hard-coding the board name into the U-Boot binary, read the board name from DT "model" property. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Add USB and UDC support for Cyclone V DKMarek Vasut2015-03-04-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for USB host mode and USB device mode for the Cyclone V development kit and enable support for UMS (to export SD card as USB mass storage). The UMS is activated via 'ums 0 mmc 0' command, the system must be connected to a host PC via HPS USB port and SD card must be installed for this to work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* | | | Merge git://git.denx.de/u-boot-marvellTom Rini2015-03-05-0/+14
|\ \ \ \
| * | | | dreamplug: set CONFIG_BUILD_TARGET to build u-boot.kwbIan Campbell2015-03-05-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Saves having to remember to ask make for it explicitly. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
| * | | | dreamplug: switch to GENERIC_BOARDIan Campbell2015-03-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Built and booted to a Linux prompt with no issues discovered. network and usb access to the external mmc are ok. (my internal mmc is knackered at the h/w level). Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
| * | | | arm: aspenite: convert to generic boardAjay Bhargav2015-03-05-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for Marvell Aspenite. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Luka Perkov <luka.perkov@sartura.hr>
| * | | | arm: gplugd: convert to generic boardAjay Bhargav2015-03-05-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for Marvell gplugD. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Luka Perkov <luka.perkov@sartura.hr>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-03-05-1/+483
|\ \ \ \ \
| * | | | | SECURE BOOT: Add command for validation of imagesgaurav rana2015-03-05-0/+327
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. esbc_validate command is meant for validating header and signature of images (Boot Script and ESBC uboot client). SHA-256 and RSA operations are performed using SEC block in HW. This command works on both PBL based and Non PBL based Freescale platforms. Command usage: esbc_validate img_hdr_addr [pub_key_hash] 2. ESBC uboot client can be linux. Additionally, rootfs and device tree blob can also be signed. 3. In the event of header or signature failure in validation, ITS and ITF bits determine further course of action. 4. In case of soft failure, appropriate error is dumped on console. 5. In case of hard failure, SoC is issued RESET REQUEST after dumping error on the console. 6. KEY REVOCATION Feature: QorIQ platforms like B4/T4 have support of srk key table and key revocation in ISBC code in Silicon. The srk key table allows the user to have a key table with multiple keys and revoke any key in case of particular key gets compromised. In case the ISBC code uses the key revocation and srk key table to verify the u-boot code, the subsequent chain of trust should also use the same. 6. ISBC KEY EXTENSION Feature: This feature allows large number of keys to be used for esbc validation of images. A set of public keys is being signed and validated by ISBC which can be further used for esbc validation of images. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | | fsl_sec_mon: Add driver for Security Monitor block of Freescalegaurav rana2015-03-05-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Security Monitor is the SOC’s central reporting point for security-relevant events such as the success or failure of boot software validation and the detection of potential security compromises. The API's for transition of Security states have been added which will be used in case of SECURE BOOT. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | | fsl_sfp : Move ccsr_sfp_regs definition to common includegaurav rana2015-03-05-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale sfp has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the CCSR defintion of sfp_regs to common include. This patch also defines ccsr_sfp_regs definition for newer versions of SFP. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | | mpc85xx/t104xrdb : remove raw timing parametervijay rai2015-03-05-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board uses DDR DIMM. Reading SPD provides more flexibility. Raw timing parameter code should be removed after debugging. Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | | powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCsShaveta Leekha2015-03-04-0/+13
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code provides framework for heterogeneous multicore chips based on StarCore and Power Architecture which are chasis-2 compliant, like B4860 and B4420 It will make u-boot recognize all non-ppc cores and peripherals like SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs. Example boot logs of B4860QDS: U-Boot 2015.01-00232-geef6e36-dirty (Jan 19 2015 - 11:58:45) CPU0: B4860E, Version: 2.2, (0x86880022) Core: e6500, Version: 2.0, (0x80400120) Clock Configuration: CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz, DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz, DSP CPU4:1200 MHz, DSP CPU5:1200 MHz, CCB:666.667 MHz, DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz CPRI:600 MHz MAPLE:600 MHz, MAPLE-ULB:800 MHz, MAPLE-eTVPE:1000 MHz FMAN1: 666.667 MHz QMAN: 333.333 MHz Top level changes include: (1) Top level CONFIG to identify HETEROGENUOUS clusters (2) CONFIGS for SC3900/DSP components (3) Global structures like "cpu_type" and "MPC85xx_SYS_INFO" updated for dsp cores and other components (3) APIs to get DSP num cores and their Mask like: cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC (5) Code to fetch and print SC cores and other heterogenous device's frequencies (6) README added for the same Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | | stdio: extend "name" to 32 symbolsAlexey Brodkin2015-03-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With limit of 16 symbols very simple device names derived drom device tree description could not be displayed correctly. For example "serial0@0xc0fc1000" will be truncated to sensless "serial0@0xc0fc10" - note dropped tariling zeros. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-12-28 10:31:12 +0000