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* Merge branch 'master' of git://www.denx.de/git/u-boot-shWolfgang Denk2008-04-08-11/+1181
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| * sh: Add support stat structure and stat.hNobuhiro Iwamatsu2008-03-28-2/+2
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support Renesas Solutions R2D plus boardNobuhiro Iwamatsu2008-03-28-0/+150
| | | | | | | | | | | | | | | | R2D plus is SH reference board used with SH7751R. This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface, one PCI bus, VGA, and two Ethernet controller. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support SH4 cache controlNobuhiro Iwamatsu2008-03-28-0/+35
| | | | | | | | | | | | Add support SH4 cache control and flash_cache function Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support PCI host driver for SH7751/SH7751RNobuhiro Iwamatsu2008-03-28-3/+4
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Move SuperH PCI driver from cpu/sh4 to drivers/pciNobuhiro Iwamatsu2008-03-28-0/+1
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support SuperH SH7751/SH7751RNobuhiro Iwamatsu2008-03-28-7/+8
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Added support for SH7720 based board MPR2.Mark Jonas2008-03-28-1/+116
| | | | | | | | | | Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support Renesas Solutions R7780MPYusuke Goda2008-03-28-0/+164
| | | | | | | | | | | | | | | | | | | | | | Renesas Solutions R7780MP is a reference board on SH7780. This board has serial, 10/100 base Ethernet deivice, CF slot and VGA devices. This board can set extension board. Extension board has 10/100/1000 base Ethernet device, PCI slot, S-ATA, iDVR slot. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support PCI of SuperH and SH7780Yusuke Goda2008-03-28-57/+103
| | | | | | | | | | | | | | This patch add support PCI of SuperH base code and SH7780 specific code. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support SH7780Yusuke Goda2008-03-28-2/+508
| | | | | | | | | | | | | | | | | | | | | | | | SH7780 is CPU of Renesas Technology. This CPU has - CPU clock 400MHz - PCI support - DDR-SDRAM controller - etc ... Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support Renesas Solutions Migo-R boardgoda.yusuke2008-03-28-0/+151
| | | | | | | | | | | | | | | | Migo-R is a board based on SH7722 and has may devices. In this patch, supported SCIF, NOR flash and Ethernet. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-04-07-70/+114
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: lib_ppc/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | mpc8323erdb: fix EEPROM page size and get MAC from EEPROMMichael Barkowski2008-03-28-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes eeprom page size so that you can now write more than 64 bytes at a time. It also makes the board take MAC addresses, if found, from EEPROM. User should place up to 4 addresses at offset 0x7f00, for eth{,1,2,3}addr. Any unused addresses should be zero. This group of four six-byte values should have it's CRC at the end. crc32 and eeprom commands can be used to accomplish this. If CRC fails, MAC addresses come from the environment. If CRC succeeds, the environment is overwritten at startup. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGEMichael Barkowski2008-03-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB controller on the PCI bus in Linux on the MPC8323ERDB. This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's config file. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) codeKim Phillips2008-03-28-65/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6, 85xx's "Update SVR numbers to expand support", simplify SPRIDR processing and processor ID display. Add REVID_{MAJ,MIN}OR macros to make REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR convenience macros. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: unreinvent mem_clkKim Phillips2008-03-28-2/+1
| | | | | | | | | | | | | | | | | | | | | delete ddr_clk and use mem_clk instead. Rename other ddr_*_clk to mem_*_clk for consistency's sake. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boardsKim Phillips2008-03-28-0/+46
| | | | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: enable the SATA interface on mpc837xemds boardDave Liu2008-03-28-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | Enable the first two SATA interfaces on MPC837xEMDS board, The two SATA ports are on LYNX1. (SATA0/1 on J4/5) Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: initialize serdes for MPC837xEMDS boardsDave Liu2008-03-28-0/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is stolen from Anton Vorontsov's patch for mpc837xerdb boards. The reference clk and xcorevdd voltage of serdes1/2 is same between mpc837xemds and mpc837xerdb. 8377E: LYNX1- 2 SATA LYNX2- 2 PCIE 8378E: LYNX1- 2 SGMII LYNX2- 2 PCIE 8379E: LYNX1- 2 SATA LYNX2- 2 SATA Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-04-07-50/+193
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| * ppc4xx: Small whitespace fix of esd patchesStefan Roese2008-03-31-1/+1
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Minor updates for DU440 boardsMatthias Fuchs2008-03-31-10/+6
| | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * ppc4xx: Canyonlands: Print SATA/PCIe configuration and board revisionStefan Roese2008-03-28-0/+1
| | | | | | | | | | | | | | | | | | Canyonlands (460EX) shares the first PCIe interface with the SoC SATA interface. This usage can be configured with the jumper J6. This patch displays the current configuration upon bootup and changes the PCIe init loop, to only initialize the availabel PCIe slots. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Enable ECC on LWMON5Stefan Roese2008-03-27-5/+1
| | | | | | | | | | | | | | | | | | | | | | Since all ECC related problems seem to be resolved on LWMON5, this patch now enables ECC support. We have to write the ECC bytes by zeroing and flushing in smaller steps, since the whole 256MByte takes too long for the external watchdog. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Updates to Korat-specific codeLarry Johnson2008-03-27-22/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains updates for changes for the Korat PPC440EPx board. These changes include: (1) Support for "permanent" and "upgradable" copies of U-Boot, as described in the new "doc/README.korat" file; (2) a new memory map for the registers in the board's CPLD; (3) a revised format for manufacturer's data in serial EEPROM; and (4) changes to track updates to U-Boot for the Sequoia board. Signed-off-by: Larry Johnson <lrj@acm.org>
| * ppc4xx: Add fdt support to Prodrive alprStefan Roese2008-03-27-1/+12
| | | | | | | | | | | | | | | | Since this board will probably be ported to arch/powerpc in the near future, we add device tree support now. This way we are "ready" for arch/powerpc from now on. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Enable cache support on the ALPR boardPieter Voorthuijsen2008-03-27-0/+1
| | | | | | | | Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
| * ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched"Stefan Roese2008-03-27-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CFG_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of ram and won't get "touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel should gets passed the now "corrected" memory size and won't touch it either. This should work for arch/ppc and arch/powerpc. Only Linux board ports in arch/powerpc with bootwrapper support, which recalculate the memory size from the SDRAM controller setup, will have to get fixed in Linux additionally. This patch enables this config option on some PPC440EPx boards as a workaround for the CHIP 11 errata. Here the description from the AMCC documentation: CHIP_11: End of memory range area restricted access. Category: 3 Overview: The 440EPx DDR controller does not acknowledge any transaction which is determined to be crossing over the end-of-memory-range boundary, even if the starting address is within valid memory space. Any such transaction from any PLB4 master will result in a PLB time-out on PLB4 bus. Impact: In case of such misaligned bursts, PLB4 masters will not retrieve any data at all, just the available data up to the end of memory, especially the 440 CPU. For example, if a CPU instruction required an operand located in memory within the last 7 words of memory, the DCU master would burst read 8 words to update the data cache and cross over the end-of-memory-range boundary. Such a DCU read would not be answered by the DDR controller, resulting in a PLB4 time-out and ultimately in a Machine Check interrupt. The data would be inaccessible to the CPU. Workaround: Forbid any application to access the last 256 bytes of DDR memory. For example, make your operating system believe that the last 256 bytes of DDR memory are absent. AMCC has a patch that does this, available for Linux. This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards: lwmon5, korat, sequoia The other remaining 440EPx board were intentionally not included since it is not clear to me, if they use the end of ram for some other purpose. This is unclear, since these boards have CONFIG_PRAM defined and even comments like this: PMC440.h: /* esd expects pram at end of physical memory. * So no logbuffer at the moment. */ It is strongly recommended to not use the last 256 bytes on those boards too. Patches from the board maintainers are welcome. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Add AMCC Glacier 406GT eval board supportStefan Roese2008-03-27-11/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the AMCC Glacier 460GT eval board. The main difference to the Canyonlands board are listed here: - 4 ethernet ports instead of 2 - no SATA port - no USB port Currently EMAC2+3 are not working. This will be fixed in a later release. Signed-off-by: Stefan Roese <sr@denx.de>
* | Fix host tool build breakage, take twoBartlomiej Sieka2008-03-27-7/+4
| | | | | | | | | | | | | | Revert commit 87c8431f and fix build breakage so that the build continues to work on FC systems. Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
* | new-image: Fix host tool build breakageHaavard Skinnemoen2008-03-27-0/+4
|/ | | | Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2008-03-27-18/+119
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| * 85xx: Update multicore boot mechanism to ePAPR v0.81 specKumar Gala2008-03-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The following changes are needed to be inline with ePAPR v0.81: * r4, r5 and now always set to 0 on boot release * r7 is used to pass the size of the initial map area (IMA) * EPAPR_MAGIC value changed for book-e processors * changes in the spin table layout * spin table supports a 64-bit physical release address Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * FSL: Clean up board/freescale/common/MakefileJon Loeliger2008-03-26-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each file that can be built here now follows some CONFIG_ option so that they are appropriately built or not, as needed. And CONFIG_ defines were added to various board config files to make sure that happens. The other board/freescale/*/Makefiles no longer need to reach up and over into ../common to build their individually needed files any more. Boards that are CDS specific were renamed with cds_ prefix. Signed-off-by: Jon Loeliger <jdl@freescale.com>
| * 85xx: Expand CCSR space with more DDR controller registers.James Yang2008-03-26-4/+21
| | | | | | | | | | | | Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Speed up get_ddr_freq() and get_bus_freq()James Yang2008-03-26-2/+0
| | | | | | | | | | | | | | | | | | | | get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were called. However, get_sys_info() recalculates extraneous information when called each time. Have get_ddr_freq() and get_bus_freq() return memoized values from global_data instead. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Update SVR numbers to expand supportAndy Fleming2008-03-26-12/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | FSL has taken to using SVR[16:23] as an SOC sub-version field. This is used to distinguish certain variants within an SOC family. To account for this, we add the SVR_SOC_VER() macro, and update the SVR_* constants to reflect the larger value. We also add SVR numbers for all of the current variants. Finally, to make things neater, rather than use an enormous switch statement to print out the CPU type, we create and array of SVR/name pairs (using a macro), and print out the CPU name that matches the SVR SOC version. Signed-off-by: Andy Fleming <afleming@freescale.com>
| * Add the Freescale PCI device IDsAndy Fleming2008-03-26-0/+23
| | | | | | | | Signed-off-by: Andy Fleming <afleming@freescale.com>
| * 85xx: Added support for multicore boot mechanismKumar Gala2008-03-26-0/+11
| | | | | | | | | | | | | | | | | | Added the cpu command that provides a generic mechanism to get status, reset, and release secondary cores in multicore processors. Added support for using the ePAPR defined spin-table mechanism on 85xx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Add the concept of CFG_CCSRBAR_PHYSKumar Gala2008-03-26-0/+17
| | | | | | | | | | | | | | | | | | When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Fix compilation error in cmd_usb.cAnatolij Gustschin2008-03-27-1/+1
| | | | | | | | | | | | | | | | This patch fixes compilation error cmd_usb.c: In function 'do_usb': cmd_usb.c:552: error: void value not ignored as it ought to be Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Coding style cleanup, update CHANGELOGWolfgang Denk2008-03-27-11/+11
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ata: add the fis struct for SATADave Liu2008-03-26-0/+156
| | | | | | | | Signed-off-by: Dave Liu <daveliu@freescale.com>
* | ata: add the libata supportDave Liu2008-03-26-0/+205
| | | | | | | | | | | | add simple libata support in u-boot Signed-off-by: Dave Liu <daveliu@freescale.com>
* | ata: make the ata_piix driver using new SATA frameworkDave Liu2008-03-26-24/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | original ata_piix driver is using IDE framework, not real SATA framework. For now, the ata_piix driver is only used by x86 sc520_cdp board. This patch makes the ata_piix driver use the new SATA framework, so - remove the duplicated command stuff - remove the CONFIG_CMD_IDE define in the sc520_cdp.h - add the CONFIG_CMD_SATA define to sc520_cdp.h Signed-off-by: Dave Liu <daveliu@freescale.com>
* | ata: add the support for SATA frameworkDave Liu2008-03-26-0/+9
| | | | | | | | | | | | | | - add the SATA framework - add the SATA command line Signed-off-by: Dave Liu <daveliu@freescale.com>
* | ata: merge the header of ata_piix driverDave Liu2008-03-26-92/+0
| | | | | | | | | | | | move the sata.h from include/ to drivers/block/ata_piix.h Signed-off-by: Dave Liu <daveliu@freescale.com>
* | ata: merge the ata_piix driverDave Liu2008-03-26-17/+0
|/ | | | | | | | move the cmd_sata.c from common/ to drivers/ata_piix.c, the cmd_sata.c have some part of ata_piix controller drivers. consolidate the driver to have better framework. Signed-off-by: Dave Liu <daveliu@freescale.com>
* Cleanup coding style, update CHANGELOGWolfgang Denk2008-03-26-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
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