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* sandbox: Increase memory size to 32MBSimon Glass2014-03-17-1/+1
| | | | | | | The current 4MB size is a little small for some tests, so increase it. Reviewed-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* kirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIGMasahiro Yamada2014-03-12-14/+9
| | | | | | | | | | | | | | | | | | Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG and push it into the top Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Michael Walle <michael@walle.cc> Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Dave Purdy <david.c.purdy@gmail.com> Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Cc: Luka Perkov <luka@openwrt.org> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Jason Cooper <u-boot@lakedaemon.net> Cc: Siddarth Gore <gores@marvell.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Eric Cooper <ecc@cmu.edu> Cc: Suriyan Ramasami <suriyan.r@gmail.com>
* freescale: pblimage: refactor CONFIG_SYS_FSL_PBL_{PBI, RCW}Masahiro Yamada2014-03-12-25/+20
| | | | | | | | | | Pull out "$(SRCTREE)/" from CONFIG_SYS_FSL_PBL_PBI and CONFIG_SYS_FSL_PBL_RCW and push it into the top Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: York Sun <yorksun@freescale.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
* at91: enable USB ethernet for taskit stamp9g20Gerhard Sittig2014-03-12-1/+4
| | | | | | | | | | | enabling CONFIG_MACB makes other locations in the stamp config file enable network related commands (actually prevents disabling them) enable USB ethernet support by activating generic support as well as Asix and Moschip ethernet adapters Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Andreas Bießman <andreas.devel@googlemail.com>
* tegra: imx: omap: enable Moschip USB ethernet support for several boardsGerhard Sittig2014-03-12-0/+5
| | | | | | | | | | enable support for the Moschip USB ethernet adapter for those boards which previously had support for "all other" USB ethernet adapters (that's Asix _and_ SMSC) enabled -- which applies to harmony, m53evk, mx53loco, nitrogen6x, omap3_beagle Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* tegra: omap: alpha-sort USB ethernet items for Asix and SMSCGerhard Sittig2014-03-12-2/+2
| | | | | | | | | adjust the harmony and omap3_beagle board configs to make their CONFIG_USB_ETHER_* items appear in alphabetical order Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* usb: net: introduce support for Moschip USB ethernetGerhard Sittig2014-03-12-0/+6
| | | | | | | | | | | | | | | introduce an 'mcs7830' driver for Moschip MCS7830 based (7730/7830/7832) USB 2.0 Ethernet Devices see "MCS7830 -- USB 2.0 to 10/100M Fast Ethernet Controller" at http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=109;74;109 the driver was implemented based on the U-Boot Asix driver with additional information gathered from the Moschip Linux driver, development was done on "Delock 61147" and "Logilink UA0025C" dongles Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* usb: net: don't ifdef routine declarations in usb_ether.hGerhard Sittig2014-03-12-6/+2
| | | | | | | | | | | | while compilation of implemented routines and references from calling sites may be optional, declarations in header files should not be unconditionally declare the Asix and SMSC related public USB ethernet driver routines in the usb_ether.h header file Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-03-10-58/+346
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| * arm: atmel: sama5d3: add nand spl boot supportBo Shen2014-03-09-0/+12
| | | | | | | | | | | | | | Add NAND SPL boot support with hardware PMECC. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * mtd: nand: atmel: prepare for nand spl boot supportBo Shen2014-03-09-0/+6
| | | | | | | | | | | | | | | | | | Prepare for nand spl boot support. It supports nand software ECC and hardware PMECC. This patch is take <drivers/mtd/nand/nand_spl_simple.c> as reference. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: sama5d3: add spi spl boot supportBo Shen2014-03-09-0/+11
| | | | | | | | | | | | | | Add SPI SPL boot support for sama5d3xek board. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * ARM: atmel: add sama5d3 Xplained board supportBo Shen2014-03-09-0/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC. Now it supports boot from NAND flash and SD/MMC card. Features support: - NAND flash - SD/MMC card - Two USB hosts - Ethernet (one GMAC, one EMAC) Signed-off-by: Bo Shen <voice.shen@atmel.com> [reorder boards.cfg] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * at91sam9263ek: add mmc supportAndreas Henriksson2014-03-09-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for using the Atmel MCI driver on at91sam9263ek. This change is modeled after the existing at91sam9260ek support. Please note that this hooks up slot1 (MCI1) for SD. Not both. Tested with at91bootstrap and u-boot on dataflash in slot 0 and fat-formatted 8GB SDHC in slot 1 on first revision at91sam9263ek (which must use dataflash in slot0 to boot). CONFIG_ATMEL_MCI_PORTB not tested. Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se> [remove empty line] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-07-46/+67
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| | * ARM: tegra: implement bootcmd_pxeStephen Warren2014-03-05-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | This retrieves a PXE config file over the network, and executes it. This allows an extlinux config file to be retrieved over the network and executed, whereas the existing bootcmd_dhcp retrieves a U-Boot script. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: rework boot scriptsStephen Warren2014-03-05-9/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the common Tegra boot scripts in the default environment to a) Make use of the new "test -e" shell command to avoid some error messages. b) Allow booting using the sysboot command and extlinux.conf. This allows easy creation of boot menus, and provides a simple interface for distros to parameterize/configure the boot process. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: convert tegra to use distro defaultsStephen Warren2014-03-05-16/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Modify all Tegra boards to include the "distro defaults" header, so that all the config options distros expect are enabled. Remove any #defines that enable the same options from the Tegra files. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: set CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTSStephen Warren2014-03-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra's EHCI controllers only have a single PORTSC register. Configure U-Boot to know this. This prevents e.g. ehci_shutdown() from touching non-existent registers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: move CONFIG_TEGRAnnStephen Warren2014-03-05-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize some definitions, since some modules moved between generations. Move the definition of CONFIG_TEGRAnn to a header that's included earlier, so that it's set by the time tegra.h needs to use it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | OMAP3: igep00x0: Enable required clocks for GPIO that are used.Enric Balletbo i Serra2014-03-06-0/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable required clocks for GPIO to fix a boot issue introduced by commit f33b9bd3984fb11e1d8566a866adc5957b1e1c9d (arm: omap3: Enable clocks for peripherals only if they are used). Without this patch the u-boot freezes after the following messages OMAP36XX/37XX-GP ES1.2, CPU-OPP2, L3-200MHz, Max CPU Clock 1 Ghz IGEPv2 + LPDDR/NAND I2C: ready DRAM: 512 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 Diving into the issue, the sequence that produces the u-boot freezes is setup_net_chip |--> gpio_direction_out |--> _set_gpio_dataout |--> __raw_writel To avoid this we just need enable the clocks for GPIOs that are used, but it would be interesting implement a mechanism to protect these situations and make sure that the clock is enabled when we request a GPIO. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
| * arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootupStefan Roese2014-03-04-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Since the switch may be re-configured for VLAN usage in Linux (or any other OS), lets reset the switch to its default register values upon power-up. Otherwise network might not be available in U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Roger Meier <r.meier@siemens.com> Cc: Lukas Stockmann <lukas.stockmann@siemens.com> Cc: Tom Rini <trini@ti.com>
| * ARM: AM43xx: Add Ethernet boot support to SPLMugunthan V N2014-03-04-2/+8
| | | | | | | | | | | | | | Add Ethernet Boot support to SPL Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * ARM: AM335x: add support for reading cpsw 2nd mac address from efuseMugunthan V N2014-03-04-0/+1
| | | | | | | | | | | | | | | | | | Adding support for reading cpsw 2nd mac address from efuse and pass it to kernel via dtb which will be used in dual emac mode of cpsw. Also adding mii command support to am335x common config. Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * ARM: AM43xx: Add CPSW support to AM43xx EPOS and GP EVMMugunthan V N2014-03-04-0/+20
| | | | | | | | | | | | | | | | Adding support for CPSW to AM43xx EPOS nad GP EVM which is connected to RMII and RGMII phy respectively and enable cpsw in config. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * drivers: net: cpsw: add support to have phy address from cpsw platform dataMugunthan V N2014-03-04-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | Some platforms like AM437x have different EVMs with different phy addresses, so this patch adds support for passing phy address via cpsw plaform data. Also renamed phy_id to phy_addr so better understanding of the code. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn boards] Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-03-10-0/+129
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| * | usb: create common header virtual root hub descriptorsStephen Warren2014-03-10-0/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many USB host controller drivers contain almost identical copies of the same virtual root hub descriptors. Put these into a common file to avoid duplication. Note that there were some very minor differences between the descriptors in the various files, such as: - USB 1.0 vs. USB 1.1 - Manufacturer/Device ID - Max packet size - String content I assume these aren't relevant. Cc: Thomas Lange <thomas@corelatus.se> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Eric Millbrandt <emillbrandt@coldhaus.com> Cc: Pierre Aubert <p.aubert@staubli.com> Cc: Stefan Roese <sr@denx.de> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Denis Peter <d.peter@mpl.ch> Cc: Rodolfo Giometti <giometti@linux.it> Cc: Zhang Wei <wei.zhang@freescale.com> Cc: Mateusz Zalega <m.zalega@samsung.com> Cc: Remy Bohmer <linux@bohmer.net> Cc: Markus Klotzbuecher <mk@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: C Nauman <cnauman@diagraph.com> Cc: David Müller <d.mueller@elsoft.ch> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Thomas Abraham <t-abraham@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Andrew Murray <amurray@embedded-bits.co.uk> Cc: Matej Frančeškin <matej.franceskin@comtrade.com> Cc: Cliff Cai <cliff.cai@analog.com> Cc: Bryan Wu <cooloney@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | | m68k: Remove M5271EVB and idmr board supportMasahiro Yamada2014-03-10-474/+0
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it as 1000000 and idmr.h defines it as (50000000 / 64). When compiling these two boards, a warning message is displayed: time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000 and should not be defined by platforms" [-Wcpp] There are no board maintainers for them so this commit just deletes them. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Jason Jin <Jason.jin@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-03-07-6/+829
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| * | powerpc/t104xrdb: Update DDR initialization related settingsPriyanka Jain2014-03-07-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update following DDR related settings for T1040RDB, T1042RDB_PI -Correct number of chip selects to two as t1040 supports two Chip selects. -Update board_specific_parameters udimm structure with settings derived via calibration. -Update ddr_raw_timing sructure corresponding to DIMM. -Set ODT to off. Typically on FSL board, ODT is set to 75 ohm, but on T104xRDB, on setting this , DDR instability is observed. Board-level debugging is in progress. Verified the updated settings to be working fine with dual-ranked Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * | powerpc/t1040qds: Add Video - HDMI supportPriyanka Jain2014-03-07-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040 has internal display interface unit (DIU) for driving video. T1040QDS supports video mode via -LCD using TI enconder -HDMI type interface via HDMI encoder Chrontel, CH7301C encoder which is I2C programmable is used as HDMI connector on T1040QDS. This patch add support to -enable Video interface for T1040QDS -route qixis multiplexing to enable DIU-HDMI interface on board -program DIU pixel clock gerenartor for T1040 -program HDMI encoder via I2C on board Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/t2080rdb: Add T2080PCIe-RDB board supportShengzhou Liu2014-03-07-0/+779
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC. It works in two mode: standalone mode and PCIe endpoint mode. T2080PCIe-RDB Feature Overview ------------------------------ Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz DDR Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP devices - 72bit 4GB DDR3-LP SODIMM in slot Ethernet interfaces: - Two 10M/100M/1G RGMII ports on-board - Two 10Gbps SFP+ ports on-board - Two 10Gbps Base-T ports on-board Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes 16 lanes configuration: - SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10) - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2) - SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3) - SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2) - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2) - SerDes-2 Lane G-H: to SATA1 & SATA2 IFC/Local Bus: - NOR: 128MB 16-bit NOR flash - NAND: 512MB 8-bit NAND flash - CPLD: for system controlling with programable header on-board eSPI: - 64MB N25Q512 SPI flash USB: - Two USB2.0 ports with internal PHY (both Type-A) PCIe: - One PCIe x4 gold-finger - One PCIe x4 connector - One PCIe x2 end-point device (C293 Crypto co-processor) SATA: - Two SATA 2.0 ports on-board SDHC: - support a TF-card on-board I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/t208xqds: fixup for t208xqdsShengzhou Liu2014-03-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Change QIXIS timing parameter CONFIG_SYS_CS3_FTIM2 to 8 from 0. Fix EMI2 for t2080qds, which was caused by adding t2081qds. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | powerpc/usb: Workaround for erratum-A006261Suresh Gupta2014-03-07-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB spec says that the minimum disconnect threshold should be over 525 mV. However, internal USB PHY threshold value is below this specified value. Due to this some devices disconnect at run-time. Hence, phy settings are tweaked to increased disconnect threshold to be above 525mV by using this workaround. Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | powerpc: mpc8260: consolidate CONFIG_MPC8260 and CONFIG_8260Masahiro Yamada2014-03-07-34/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, CONFIG_MPC8260 and CONFIG_8260 were used mixed-up. All boards with mpc8260 cpu defined both of them: - CONFIG_MPC8260 was defined in board config headers and include/common.h - CONFIG_8260 was defined arch/powerpc/cpu/mpc8260/config.mk We do not need to have both of them. This commit keeps only CONFIG_MPC8260. This commit does: - Delete CONFIG_8260 and CONFIG_MPC8260 definition in config headers and include/common.h - Rename CONFIG_8260 to CONFIG_MPC8260 in arch/powerpc/cpu/mpc8260/config.mk. - Rename #ifdef CONFIG_8260 to #ifdef CONFIG_MPC8260 Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de>
* | | mips: move CONFIG_MIPS{32, 64} definition to config.mkMasahiro Yamada2014-03-07-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All mips32 boards define CONFIG_MIPS32 in config headers except malta boards which define it in boards.cfg. We can consolidate them by defining it in arch/mips/cpu/mips32/config.mk. CONFIG_MIPS64 definition can be moved to arch/mips/cpu/mips64/config.mk as well. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | | kbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCCMasahiro Yamada2014-03-07-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, USE_PRIVATE_LIBGCC was defined in arch-specific config.mk and referenced in arch/$(ARCH)/lib/Makefile. We are not happy about parsing config.mk again and again. We have to keep the same behavior with a different way. By adding "CONFIG_" prefix, this macro appears in include/autoconf.mk, include/spl-autoconf.mk. (And treating USE_PRIVATE_LIBGCC as CONFIG macro is reasonable enough.) Tegra SoC family defined USE_PRIVATE_LIBGCC as "yes" in arch/arm/cpu/arm720t/tegra*/config.mk, whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk. It means Tegra enables PRIVATE_LIBGCC only for SPL. We can describe the same behavior by adding #ifdef CONFIG_SPL_BUILD # define CONFIG_USE_PRIVATE_LIBGCC #endif to include/configs/tegra-common.h. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
* | | kbuild, blackfin: Add CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEEDMasahiro Yamada2014-03-07-16/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many (but not all) of Blackfin boards give -O2 option to compile under lib/ directory. That means lib/ should be speed-optimized, whereas other parts should be size-optimized. We want to keep the same behavior, but do not want to parse board/*/config.mk again and again. We've got no choice but to invent a new method. CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED, if it is enabled, gives -O2 flag only for building under lib/ directory. Dirty codes which I had marked as "FIX ME" in board/${BOARD}/config.mk have been deleted. Instead, CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED has been defined in include/configs/${BOARD}.h. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Sonic Zhang <sonic.zhang@analog.com>
* | | Cosmetic: Typo fixesVasili Galka2014-03-07-3/+3
| | | | | | | | | | | | Signed-off-by: Vasili Galka <vasili@visionmap.com>
* | | ppc4xx: Remove 4xx NAND booting supportStefan Roese2014-03-07-483/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As ppc4xx currently only supports the deprecated nand_spl infrastructure and nobody seems to have time / resources to port this over to the newer SPL infrastructure, lets remove NAND booting completely. This should not affect the "normal", non NAND-booting ppc4xx platforms that are currently supported. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Tirumala Marri <tmarri@apm.com> Cc: Matthias Fuchs <matthias.fuchs@esd.eu> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | unit-test: make "test -e" test independent of $CWDStephen Warren2014-03-07-0/+8
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | The unit-test for hush's "test -e" currently relies upon being run in the U-Boot build directory, because it tests for the existence of a file that exists in that directory. Fix this by explicitly creating the file we use for the existence test, and deleting it afterwards so that multiple successive unit-test invocations succeed. This required adding an os.c function to erase files. Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2014-03-04-26/+161
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| * | mtd: nand: omap: move omap_elm.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | omap_elm.h is a generic header used by OMAP ELM driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | mtd: nand: omap: remove unused #defines from common omap_gpmc.hpekon gupta2014-03-04-26/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI params or nand_id[] table. And based on that it defines ECC layout. This patch 1) removes following board configs used for defining NAND ECC layout - GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND) - GPMC_NAND_ECC_LP_x8_LAYOUT (for large page x8 NAND) - GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND) - GPMC_NAND_ECC_SP_x8_LAYOUT (for small page x8 NAND) 2) removes unused #defines in common omap_gpmc.h depending on above configs Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
* | Add 64-bit data support for memory commandsYork Sun2014-03-04-0/+4
| | | | | | | | | | | | | | | | | | | | Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new size ".q " is introduced. For 64-bit architecture, 64-bit data is enabled by default, by detecting compiler __LP64__. It is optional for other architectures. Signed-off-by: York Sun <yorksun@freescale.com>
* | sandbox: Convert GPIOs to use driver modelSimon Glass2014-03-04-0/+1
| | | | | | | | | | | | Convert sandbox over to use driver model GPIOs. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Add GPIO support and testsSimon Glass2014-03-04-0/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver model support for GPIOs. Since existing GPIO drivers do not use driver model, this feature must be enabled by CONFIG_DM_GPIO. After all GPO drivers are converted over we can perhaps remove this config. Tests are provided for the sandbox implementation, and are a sufficient sanity check for basic operation. The GPIO uclass understands the concept of named banks of GPIOs, with each GPIO device providing a single bank. Within each bank the GPIOs are numbered using an offset from 0 to n-1. For example a bank named 'b' with 20 offsets will provide GPIOs named b0 to b19. Anonymous GPIO banks are also supported, and are just numbered without any prefix. Each time a GPIO driver is added to the uclass, the GPIOs are renumbered accordinging, so there is always a global GPIO numbering order. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com> Signed-off-by: Viktor Křivák <viktor.krivak@gmail.com> Signed-off-by: Tomas Hlavacek <tmshlvck@gmail.com>
* | dm: Add a demonstration/example driverSimon Glass2014-03-04-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As an example of how to write a uclass and a driver, provide a demo version of each, accessible through the 'demo' command. To use these with driver model, define CONFIG_CMD_DEMO and CONFIG_DM_DEMO. The two demo drivers are enabled with CONFIG_DM_DEMO_SIMPLE and CONFIG_DM_DEMO_SHAPE. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com> Signed-off-by: Viktor Křivák <viktor.krivak@gmail.com> Signed-off-by: Tomas Hlavacek <tmshlvck@gmail.com>
generated by cgit v1.1 at 2024-12-22 19:06:33 +0000