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* Enable dual DDR controllers and interleaving.Jon Loeliger2006-05-19-1/+11
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* Update 86xx address map and LAWBARs.Jon Loeliger2006-05-19-22/+34
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* Get MPC8641HPCN flash images working.Jon Loeliger2006-05-09-16/+14
| | | | | | | | Enable the CFI driver. Remove bogus LAWBAR7 cruft. Use correct TEXT_BASE, Fixup load script. Enable SPD EEPROM during DDR setup. Use generic RFC 1918 IP addresses by default.
* Cleanup whitespaces and style issues.Jon Loeliger2006-04-27-122/+87
| | | | | | | Removed //-style comments. Use 80-column lines. Remove trailing whitespace. Remove dead code and debug cruft.
* Initial support for MPC8641 HPCN board.Jon Loeliger2006-04-26-6/+2160
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* Add support for BC3450 boarddzu@denx.de2006-04-21-0/+568
| | | | Signed-off-by: dzu@denx.de <dzu@denx.de>
* Update for NC650 board. Add NC650 based CP850 configuration.dzu@denx.de2006-04-19-18/+48
| | | | Signed-off-by: dzu@denx.de <dzu@denx.de>
* Some code cleanupWolfgang Denk2006-04-16-133/+134
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* Merge with /home/hs/U-Boot/u-boot-devWolfgang Denk2006-04-16-4/+3
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| * * Fix dbau1x00 BoardHeiko Schocher2006-04-11-4/+3
| | | | | | | | | | | | | | | | - Fix dbau1x00 boards broken by dbau1550 patch PLL:s were not set for boards other than 1550. Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. Default boot is now bootp for cards other than 1550. Patch by Thomas Lange Aug 10 2005
* | Fix Quad UART mapping on MCC200 board due to new HW revisionWolfgang Denk2006-04-13-1/+1
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* | Merge with /home/m8/git/u-bootWolfgang Denk2006-04-12-14/+84
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| * Fix JFFS2 support for legacy NAND driver.Marian Balakowicz2006-04-08-14/+19
| | | | | | | | Some more NAND cleanup and small fixes.
| * Remove dependencies between DoC code and old legacy NAND driver.Marian Balakowicz2006-04-05-0/+65
| | | | | | | | | | | | Necessary defines and data structures were copied to DoC specific files so that legacy NAND code could be entirely removed from u-boot tree in the near future.
* | Fix Lite500B support: Merge with /home/raj/git/u-boot.l5200b_pciWolfgang Denk2006-04-06-3/+6
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| * | Set SDelay register in the DDR controller for the MPC5200B chip.Rafal Jaworowski2006-03-29-3/+6
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* | | Merge with /home/sr/git/u-boot/cfi-flashWolfgang Denk2006-04-06-1/+3
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| * | | * Changes/fixes for drivers/cfi_flash.c:Stefan Roese2006-04-01-0/+5
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add Intel legacy lock/unlock support to common CFI driver On some Intel flash's (e.g. Intel J3) legacy unlocking is supported, meaning that unlocking of one sector will unlock all sectors of this bank. Using this feature, unlocking of all sectors upon startup (via env var "unlock=yes") will get much faster. - Fixed problem with multiple reads of envronment variable "unlock" as pointed out by Reinhard Arlt & Anders Larsen. - Removed unwanted linefeeds from "protect" command when CFG_FLASH_PROTECTION is enabled. - Changed p3p400 board to use CFG_FLASH_PROTECTION Patch by Stefan Roese, 01 Apr 2006 * Changes/fixes for drivers/cfi_flash.c: - Correctly handle the cases where CFG_HZ != 1000 (several XScale-based boards) - Fix the timeout calculation of buffered writes (off by a factor of 1000) Patch by Anders Larsen, 31 Mar 2006
* | | Merge with /home/sr/git/u-boot/4xx-sdramWolfgang Denk2006-04-05-4/+18
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| * | | Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)Stefan Roese2006-03-31-4/+18
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 405 SDRAM: - The SDRAM parameters can now be defined in the board config file and the 405 SDRAM controller values will be calculated upon bootup (see PPChameleonEVB). When those settings are not defined in the board config file, the register setup will be as it is now, so this implementation should not break any current design using this code. Thanks to Andrea Marson from DAVE for this patch. 440 DDR: - Added function sdram_tr1_set to auto calculate the TR1 value for the DDR. - Added ECC support (see p3p440). Patch by Stefan Roese, 17 Mar 2006
* | | delta board: one more DA9030 fix.Markus Klotzbuecher2006-03-30-0/+1
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* | | Add support for ymodem protocol (loady command).Markus Klotzbuecher2006-03-30-0/+213
| | | | | | | | | | | | Patch by Stefano Babic, 29 Mar 2006
* | | Change delta board memory map to start at 0x80000000.Markus Klotzbuecher2006-03-29-7/+7
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* | | delta board: minor update to DA9030 code.Markus Klotzbuecher2006-03-29-1/+1
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* | | delta board: fix DA9030 reset procedure.Markus Klotzbuecher2006-03-27-3/+2
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* | | Merge with http://www.denx.de/git/u-boot.gitMarkus Klotzbuecher2006-03-24-191/+9094
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| * | Enable Quad UART om MCC200 board.Wolfgang Denk2006-03-23-0/+5
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| * | Cleanup MCC200 board configuration; omit non-existent stuff.Wolfgang Denk2006-03-21-22/+3
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| * Merge with port of MPC8349EMDS boardWolfgang Denk2006-03-17-3/+857
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| | * Support for DDR with 32-data path. Addotional notes on injectingRafal Jaworowski2006-03-16-15/+34
| | | | | | | | | | | | multiple-bit errors.
| | * Add command for handling DDR ECC registers on MPC8349EE MDS board.Marian Balakowicz2006-03-16-0/+1
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| | * Fix DDR ECC bit definitions for MPC83xx.Marian Balakowicz2006-03-16-2/+2
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| | * Add initial support for MPC8349E MDS board.Marian Balakowicz2006-03-14-0/+696
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| | * Add DMA support for MPC83xx.Marian Balakowicz2006-03-14-1/+86
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| | * Add bit definitions for MPC83xx DDR controller registers.Marian Balakowicz2006-03-14-0/+52
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| | * Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx.Marian Balakowicz2006-03-14-1/+2
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| * | Add support for Lite5200B board.Wolfgang Denk2006-03-17-30/+77
| |/ | | | | | | Patch by Patch by Jose Maria (Txema) Lopez, 16 Jan 2006
| * Add support for EmbeddedPlanet EP88x boardsWolfgang Denk2006-03-12-0/+205
| | | | | | | | Patch by Yuli Barcohen, 13 Jul 2005
| * Add (some) definitions for the MPC85xx local bus controllerWolfgang Denk2006-03-12-0/+35
| | | | | | | | Patch by Murray Jensen, 08 Jul 2005
| * Add CPM2 I/O pin functions for MPC85xx processorsWolfgang Denk2006-03-12-0/+146
| | | | | | | | Patch by Murray Jensen, 08 Jul 2005
| * Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#mpc8349adsWolfgang Denk2006-03-12-9/+16
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| | * Added PCI support for MPC8349ADS boardKumar Gala2006-01-12-9/+16
| | | | | | | | | | | | Patch by Kumar Gala 11 Jan 2006
| * | Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#mpc83xxWolfgang Denk2006-03-12-4/+114
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| | * | Enable address translation on MPC83xxKumar Gala2006-02-10-2/+104
| | | | | | | | | | | | | | | | Patch by Kumar Gala, 10 Feb 2006
| | * | Fixed defines for MPC83xx SICRL register to match current specsKumar Gala2006-01-23-2/+2
| | | | | | | | | | | | | | | | Patch by Kumar Gala, 23 Jan 2006
| | * | Make System IO Config Registers board configurable on MPC83xxKumar Gala2006-01-11-0/+8
| | |/ | | | | | | | | | Patch by Kumar Gala, 11 Jan 2006
| * | Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#pciWolfgang Denk2006-03-12-1/+3
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| | * | Added support for PCI prefetchable region and BARsKumar Gala2006-01-11-1/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a host controller sets up a region as prefetchable and a device's BAR denotes it as prefetchable, allocate the BAR into the prefetch region. If a BAR is prefetchable and no prefetchable region has been setup by the controller we fall back to allocating the BAR into the normally memory region. Patch by Kumar Gala 11 Jan 2006
| * | Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#ft_infrWolfgang Denk2006-03-12-1/+5
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| | * | Add support for passing initrd information via flat device treeKumar Gala2006-01-11-1/+1
| | | | | | | | | | | | | | | | Patch by Kumar Gala 11 Jan 2006
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