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* Revert "am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should ↵Tom Rini2013-10-08-1/+0
| | | | | | | | | | | | | | | | | | mmcroot." Upon further inspection and review and chatting with kernel folks, what happens here is that what mmcblk# a device gets is based on probe order. So a system with an SD card inserted with place eMMC on mmcblk1, but without an SD card, it will be on mmcblk0. So U-boot can only provide a best guess. In this case, if no SD card is present, we would want to pass mmcblk0p2 still. If an SD card is present, it woudl be able to provide a uEnv.txt that would be loaded (even if the kernel is NOT there) which can still update mmcroot variable. This reverts commit 827512fb1154c05c6eb1e2259e936df55c98a535. Cc: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-10-08-188/+12
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| * socfpga: Adding System Manager driverChin Liang See2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding System Manager driver which will configure the pin mux for real hardware Cyclone V development kit (not Virtual Platform) Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * omap1510inn: arm925t: remove supportAlbert ARIBAUD2013-10-07-177/+0
| | | | | | | | | | | | | | | | | | omap1510inn is orphan and has been for years now. Reove it and, as it was the only arm925t target, also remove arm925t support. Update doc/README.scrapyard accordingly. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * am335x_evm: Switch to zImage as default rather than uImageTom Rini2013-10-07-11/+11
| | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-10-08-111/+118
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| * | exynos: Export timer_get_us() to get microsecond timerRajeshwari Shinde2013-10-08-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function, if implemented by the board, provides a microsecond timer. The granularity may be larger than 1us if hardware does not support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | sf: Minor cleanupsJagannadha Sutradharudu Teki2013-10-07-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add spaces, tabs - Commenting. - Rearrange code. - Add static qualifier for missing func. - Remove memory_map from ramtron.c - Ramtron: spi_flash_internal.h -> sf_internal.h Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | dra7xx_evm: add SPL API, QSPI, and serial flash supportMatt Porter2013-10-07-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enables support for SPI SPL, QSPI and Spansion serial flash device on the EVM. Configures pin muxes for QSPI mode. Signed-off-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | sf: Add memory mapped read supportPoddar, Sourav2013-10-07-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qspi controller can have a memory mapped port which can be used for data read. Added support to enable memory mapped port read. This patch enables the following: - It enables exchange of memory map address between mtd and qspi through the introduction of "memory_map" flag. - Add support to communicate to the driver that memory mapped transfer is to be started through introduction of new flags like "SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END". This will enable the spi controller to do memory mapped configurations if required. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | spi: spi cleanupsJagannadha Sutradharudu Teki2013-10-07-43/+44
| | | | | | | | | | | | | | | | | | | | | | | | - Rearranged multi-line comment style. - Add tabs. - Add spaces. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: spi_flash cleanupsJagannadha Sutradharudu Teki2013-10-07-13/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | More cleanups on spi_flash side: - Removed unneeded comments. - Rearranged macros in proper location. - Rearranged func declerations - Renamed few function names. - Added License headers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Remove spi_flash_do_alloc referencesJagannadha Sutradharudu Teki2013-10-07-38/+0
| | | | | | | | | | | | | | | | | | | | | Added a support for common probe, hence removed removed spi_flash_do_alloc reference. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: ramtron: Add support for separate flash driverJagannadha Sutradharudu Teki2013-10-07-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Compared to other spi flashes, ramtron has a different probing and implementation on flash ops, hence moved ramtron probe code into ramtron driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Add proper comment style on spi_flash structureJagannadha Sutradharudu Teki2013-10-07-28/+39
| | | | | | | | | | | | | | | | | | | | | Added proper comment style on spi_flash structure to make more readable. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: probe: Add support for flag status pollingJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | From Micron, 512MB onwards, flash requires to poll flag status instead of read status- hence added E_FSR flag on spectific flash parts. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: probe: Add support for erase sector selection flagJagannadha Sutradharudu Teki2013-10-07-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | SECT_4K, SECT_32K and SECT_64K opeartions are performed to to specific flash by adding a SECT* flag on respective spi_flash_params.flag param. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: probe: Add support for SST_WPJagannadha Sutradharudu Teki2013-10-07-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the SST flashes needs to write up using SST_WP, AAI Word Program, so added a flag param on spi_flash_params table. SST flashes, which supports SST_WP need to use a WP write sst_write_wp instead of common flash write. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | | Fix number base handling of "load" commandWolfgang Denk2013-10-07-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As documented, almost all U-Boot commands expect numbers to be entered in hexadecimal input format. (Exception: for historical reasons, the "sleep" command takes its argument in decimal input format.) This rule was broken for the "load" command; for details please see especially commits 045fa1e "fs: add filesystem switch libary, implement ls and fsload commands" and 3f83c87 "fs: fix number base behaviour change in fatload/ext*load". In the result, the load command would always require an explicit "0x" prefix for regular (i. e. base 16 formatted) input. Change this to use the standard notation of base 16 input format. While strictly speaking this is a change of the user interface, we hope that it will not cause trouble. Stephen Warren comments (see [1]): I suppose you can change the behaviour if you want; anyone writing "0x..." for their values presumably won't be affected, and if people really do assume all values in U-Boot are in hex, presumably nobody currently relies upon using non-prefixed values with the generic load command, since it doesn't work like that right now. [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/171172 Acked-by: Tom Rini <trini@ti.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | include/linux/fb.h: Add a missing include for 'list.h'Otavio Salvador2013-10-07-0/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The modelist data uses the list definition but the 'list.h' header were not being included. The build failure is bellow: ,---- | In file included from yyyy.c:16:0: | .../u-boot/include/linux/fb.h:503:19: error: field 'modelist' has incomplete type | struct list_head modelist; /* mode list */ | ^ | make[1]: *** [yyyy.o] Error 1 | make[1]: Leaving directory `.../u-boot/board/xxx/yyyy' | make: *** [board/xxx/yyyy/libyyyy.o] Error 2 `---- Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-10-04-1/+6
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| * ARM: VExpress: enable ARMv7 virt support for VExpress A15Andre Przywara2013-10-03-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable hypervisors utilizing the ARMv7 virtualization extension on the Versatile Express board with the A15 core tile, we add the required configuration variable. Also we define the board specific smp_set_cpu_boot_addr() function to set the start address for secondary cores in the VExpress specific manner. There is no need to provide a custom smp_waitloop() function here. This also serves as an example for what to do when adding support for new boards. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
| * ARM: add SMP support for non-secure switchAndre Przywara2013-10-03-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the non-secure switch is only done for the boot processor. To enable full SMP support, we have to switch all secondary cores into non-secure state also. So we add an entry point for secondary CPUs coming out of low-power state and make sure we put them into WFI again after having switched to non-secure state. For this we acknowledge and EOI the wake-up IPI, then go into WFI. Once being kicked out of it later, we sanity check that the start address has actually been changed (since another attempt to switch to non-secure would block the core) and jump to the new address. The actual CPU kick is done by sending an inter-processor interrupt via the GIC to all CPU interfaces except the requesting processor. The secondary cores will then setup their respective GIC CPU interface. While this approach is pretty universal across several ARMv7 boards, we make this function weak in case someone needs to tweak this for a specific board. The way of setting the secondary's start address is board specific, but mostly different only in the actual SMP pen address, so we also provide a weak default implementation and just depend on the proper address to be set in the config file. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
| * ARM: add assembly routine to switch to non-secure stateAndre Przywara2013-10-03-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While actually switching to non-secure state is one thing, another part of this process is to make sure that we still have full access to the interrupt controller (GIC). The GIC is fully aware of secure vs. non-secure state, some registers are banked, others may be configured to be accessible from secure state only. To be as generic as possible, we get the GIC memory mapped address based on the PERIPHBASE value in the CBAR register. Since this register is not architecturally defined, we check the MIDR before to be from an A15 or A7. For CPUs not having the CBAR or boards with wrong information herein we allow providing the base address as a configuration variable. Now that we know the GIC address, we: a) allow private interrupts to be delivered to the core (GICD_IGROUPR0 = 0xFFFFFFFF) b) enable the CPU interface (GICC_CTLR[0] = 1) c) set the priority filter to allow non-secure interrupts (GICC_PMR = 0xFF) Also we allow access to all coprocessor interfaces from non-secure state by writing the appropriate bits in the NSACR register. The generic timer base frequency register is only accessible from secure state, so we have to program it now. Actually this should be done from primary firmware before, but some boards seems to omit this, so if needed we do this here with a board specific value. The Versatile Express board does not need this, so we remove the frequency from the configuration file here. After having switched to non-secure state, we also enable the non-secure GIC CPU interface, since this register is banked. Since we need to call this routine also directly from the smp_pen later (where we don't have any stack), we can only use caller saved registers r0-r3 and r12 to not mess with the compiler. Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-10-02-6/+721
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| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-10-02-4/+546
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| | * mx6sabresd: Fix the fdt file for the mx6dl versionFabio Estevam2013-09-20-0/+4
| | | | | | | | | | | | | | | | | | | | | We need to load 'imx6dl-sabresd.dtb' in the mx6dl version. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| | * mx6slevk: Add Ethernet supportFabio Estevam2013-09-20-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | mx6slevk has a SMSC8720 connected in RMII mode. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * mx35pdk: Remove CONFIG_SYS_CACHELINE_SIZEFabio Estevam2013-09-20-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In arch/arm/cpu/arm1136/cpu.c we have: #ifndef CONFIG_SYS_CACHELINE_SIZE #define CONFIG_SYS_CACHELINE_SIZE 32 #endif ,so there is no need to define 'CONFIG_SYS_CACHELINE_SIZE' with the default size in the board config file. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * wandboard: Use imx6dl-wandboard.dtb for the solo versionFabio Estevam2013-09-20-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | The wandboard solo version should boot the 'imx6dl-wandboard.dtb' file, since dual-lite and solo variants are the same SoC with only the number of cores being different. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2013-09-13-30/+331
| | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS boards.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | apf27: add FPGA support for the apf27 boardtrem2013-09-11-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr> Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | apf27: add support for the armadeus APF27 boardtrem2013-09-11-0/+374
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr> Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org> Signed-off-by: Nicolas Colombain <nicolas.colombain@armadeus.com>
| | * | ARM: mxs: Add SanDisk Sansa Fuze+ boardMarek Vasut2013-09-10-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add STMP3780-based Sansa Fuze+ board. This board is a small PMP device sporting a CPU which was later rebranded to i.MX233 . Currently supported is USB gadget mode and MMC . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * | ARM: mxs: Add Creative ZEN XFi3 boardMarek Vasut2013-09-10-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add STMP3780-based XFi3 board. This board is a small PMP device sporting a CPU which was later rebranded to i.MX233 . Currently supported is USB gadget mode and both external SD and internal Phison SD-NAND bridge . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| * | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-10-02-1/+174
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| | * | | am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot.Robert P. J. Day2013-09-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If, in CONFIG_BOOTCOMMAND, the environment switches both the mmcdev and bootpart variables to refer to MMC device 1, it would make sense that the mmcroot env variable should switch to that device as well. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
| | * | | ARM: DRA7: Enable saveenv commandLokesh Vutla2013-09-20-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dra7xx_evm has eMMC and the default environment can be stored in it. So enabling saveenv command and the configs to store environment in eMMC. Tested on DRA752 ES1.0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| | * | | am335x:Handle worst case scenario for Errata 1.0.24Steve Kipisz2013-09-20-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In Errata 1.0.24, if the board is running at OPP50 and has a warm reset, the boot ROM sets the frequencies for OPP100. This patch attempts to drop the frequencies back to OPP50 as soon as possible in the SPL. Then later the voltages and frequencies up set higher. Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> [trini: Adapt to current framework] Signed-off-by: Tom Rini <trini@ti.com>
| | * | | am335x_evm: am33xx_spl_board_init function and scale core frequencyTom Rini2013-09-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a am33xx_spl_board_init (and enable the PMICs) that we may see, depending on the board we are running on. In all cases, we see if we can rely on the efuse_sma register to tell us the maximum speed. In the case of Beaglebone White, we need to make sure we are on AC power, and are on later than rev A1, and then we can ramp up to the PG1.0 maximum of 720Mhz. In the case of Beaglebone Black, we are either on PG2.0 that supports 1GHz or PG2.1. As PG2.0 may or may not have efuse_sma set, we cannot rely on this probe. In the case of the GP EVM, EVM SK and IDK we need to rely on the efuse_sma if we are on PG2.1, and the defaults for PG1.0/2.0. Signed-off-by: Tom Rini <trini@ti.com>
| | * | | drivers/power/pmic: Add tps65910 driverPhilip, Avinash2013-09-20-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver for the TPS65910 PMIC that is found in the AM335x GP EVM, AM335x EVM SK and others. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> [trini: Split and rework Avinash's changes into new drivers/power framework] Signed-off-by: Tom Rini <trini@ti.com>
| | * | | drivers/power/pmic: Add tps65217 driverGreg Guyotte2013-09-20-0/+82
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver for the TPS65217 PMIC that is found in the Beaglebone family of boards. Signed-off-by: Greg Guyotte <gguyotte@ti.com> [trini: Split and rework Greg's changes into new drivers/power framework] Signed-off-by: Tom Rini <trini@ti.com>
| * | | arm: atmel: cpux9k2: increase malloc space to fix crash on start u-bootJens Scharsig (BuS Elektronik)2013-09-19-1/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Since UBIFS is enabled for cpux9k2, more malloc space is needed. For the current uboot 2013.10-rcX the size is to small, this will fix the startup problems by increasing the malloc space to 4MiB. Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | usb:g_dnl:dfu: Download gadget and DFU function code clean upLukasz Majewski2013-09-24-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The download gadget code and DFU function lacks of proper declarations for the case when a target board wants to use only one of available usb functions. Moreover the relevant declarations have been moved to consistent localization (like <dfu.h>). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | | usb:gadget:Remove redundant #includes for USB composite gadget and its functionsLukasz Majewski2013-09-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only the <linux/usb/gadget.h> requires error.h include. Hence, several includes of error.h at USB gadget functions are not needed. Moreover unnecessary malloc.h includes were also removed. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | | usb:g_dnl:ums: Conditional compilation for mass storage function ↵Lukasz Majewski2013-09-24-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (f_mass_storage) The mass storage composite function is now compiled in only when CONFIG_USB_GADGET_MASS_STORAGE is defined. Such change provides binary size reduction for boards which use USB download gadget (like am335x_evm) with DFU, but don't use UMS. For example at am335x_evm board reduction is more than 2KiB for text and around 120B for data. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | | am335x_evm: enable DFU RAMAfzal Mohammed2013-09-24-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable DFU for RAM, provide example dfu_alt_info Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | | dfu: ram supportAfzal Mohammed2013-09-24-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DFU spec mentions it as a method to upgrade firmware (software stored in writable non-volatile memory). It also says other potential uses of DFU is beyond scope of the spec. Here such a beyond the scope use is being attempted - directly pumping binary images from host via USB to RAM. This facility is a developer centric one in that it gives advantage over upgrading non-volatile memory for testing new images every time during development and/or testing. Directly putting image onto RAM would speed up upgrade process. This and convenience was the initial thoughts that led to doing this, speed improvement over MMC was only 1 second though - 6 sec on RAM as opposed to 7 sec on MMC in beagle bone, perhaps enabling cache and/or optimizing DFU framework to avoid multiple copy for ram (if worth) may help, and on other platforms and other boot media like NAND maybe improvement would be higher. And for a platform that doesn't yet have proper DFU suppport for non-volatile media's, DFU to RAM can be used. Another minor advantage would be to increase life of mmc/nand as it would be less used during development/testing. usage: <image name> ram <start address> <size> eg. kernel ram 0x81000000 0x1000000 Downloading images to RAM using DFU is not something new, this is acheived in openmoko also. DFU on RAM can be used for extracting RAM contents to host using dfu upload. Perhaps this can be extended to io for squeezing out register dump through usb, if it is worth. Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Gerhard Sittig <gsi@denx.de> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Heiko Schocher <hs@denx.de>
* | | dfu: unify mmc/nand read/write ops enumAfzal Mohammed2013-09-24-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMC and NAND independently defines same enumerators for read/write. Unify them by defining enum in dfu header. RAM support that is being added newly also can make use of it. Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* | | dfu: Extract common DFU code to handle "dfu_alt_info" environment variableLukasz Majewski2013-09-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New dfu_init_env_entities() function has been extracted from cmd_dfu.c and stored at dfu core. This is a dfu centric code, so it shall be processed in the core. Change-Id: I756c5de922fa31399d8804eaadc004ee98844ec2 Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Heiko Schocher <hs@denx.de>
generated by cgit v1.1 at 2024-12-29 19:45:32 +0000