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* video, cfb_console: make background and foreground color configurableHeiko Schocher2013-10-30-0/+5
| | | | | | | | make CONSOLE_BG_COL/CONSOLE_FG_COL configurable through board config file. Clear video screen in video_init(). Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Anatolij Gustschin <agust@denx.de>
* arm: rmobile: armadillo-800eva: Change clock definition of SCIF and TMUNobuhiro Iwamatsu2013-10-22-0/+2
| | | | | | | | | | This changes clock definition of SCIF from CONFIG_SYS_CLK_FREQ to CONFIG_SH_SCIF_CLK_FREQ, and clock definition of TMU from CONFIG_SYS_CLK_FREQ to CONFIG_SH_TMU_CLK_FREQ, Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
* arm: rmobile: kzm9g: Change clock definition of SCIF from ↵Nobuhiro Iwamatsu2013-10-22-0/+1
| | | | | | | | CONFIG_SYS_CLK_FREQ to CONFIG_SH_SCIF_CLK_FREQ Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
* Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2013-10-22-1/+41
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| * sh: boards: Change clock definition of SCIF and TMUNobuhiro Iwamatsu2013-10-17-0/+40
| | | | | | | | | | | | | | | | | | | | This changes clock definition of SCIF from CONFIG_SYS_CLK_FREQ to CONFIG_SH_SCIF_CLK_FREQ, and clock definition of TMU from CONFIG_SYS_CLK_FREQ to CONFIG_SH_TMU_CLK_FREQ for boards. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
| * sh: timer: Change definition of clock of TMUNobuhiro Iwamatsu2013-10-17-1/+1
| | | | | | | | | | | | | | | | | | | | The former SH/TMU driver had calculated timer based on CONFIG_SYS_CLK_FREQ. The newest SH/TMU newly needs calculation of the clock for TMU. This patch defines clock CONFIG_SH_TMU_CLK_FREQ for TMU and changes it to CONFIG_SH_TMU_CLK_FREQ from CONFIG_SYS_CLK_FREQ. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2013-10-21-278/+538
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| * | usb: udc: add udc.h include fileTroy Kisky2013-10-20-139/+61
| | | | | | | | | | | | | | | | | | | | | Move common definitions to udc.h This allows musb_udc.h to be removed as well. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * | usb: gadget: mv_udc: split mv_udc.h fileTroy Kisky2013-10-20-118/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move defines only needed by mv_udc.c to a file in the same directory. This allows usbtty to compile for mv_udc, but it still doesn't link. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * | usb: ehci-mx6: add support for otg portTroy Kisky2013-10-20-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, only host1 was supported using an index of 0. Now, otg has index 0, host1 is 1, host2 is 2, host3 is 3. Since OTG requires usbmode to be set after reset, I added CONFIG_EHCI_HCD_INIT_AFTER_RESET to nitrogen6x.h and mx6qsabreauto.h. I also added a weak function board_ehci_power to handle turning power on/off for otg. Type is type of device connected (USB stick vs Host.) Init is type of device desired. Only power up port if type == init == USB_INIT_HOST. Only return error if type != init. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * | usb: add enum usb_init_type parameter to usb_lowlevel_initTroy Kisky2013-10-20-1/+1
| | | | | | | | | | | | | | | | | | This parameter will later be used to verify OTG ports. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * | usb: rename board_usb_init_type to usb_init_typeTroy Kisky2013-10-20-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will be used by usb_lowlevel_init so it will no longer be used by only board specific functions. Move definition of enum usb_init_type higher in file so that it will be available for usb_low_level_init. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * | usb: am437x: Add support for am437x xhci USB hostDan Murphy2013-10-20-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the support for the am437x xhci usb host. The xHCI host on AM437 is connected to a usb2 phy so need to add support to enable those clocks. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * | usb: dra7xx: Add support for dra7xx xhci USB hostDan Murphy2013-10-20-3/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the support for the dra7xx xhci usb host. dra7xx does not contain an EHCI controller so the headers can be removed from the board file. The xHCI host on dra7xx is connected to a usb2 phy so need to add support to enable those clocks. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * | usb: omap: Move the usb phy code to the usb/phy directoryDan Murphy2013-10-20-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moving the usb/phy code from xhci-omap to the usb/phy directory and moving the associated phy code over to the new file. Newer TI processors adding xHCI support will have different PHY configurations so therefore abstracting this code away will prevent messing around with the xhci-omap file itself. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * | usb: omap: Move the xhci-omap header file to common locationDan Murphy2013-10-20-0/+124
| | | | | | | | | | | | | | | | | | | | | Moving the xhci-omap header to a more global location so that other code can reference this code. Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * | trats: Update TRATS config to support TIZEN downloadLukasz Majewski2013-10-20-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A set of environment variables needs to be updated to provide support for TIZEN download command (tizendown). Since DFU is used as a flashing backend, it is also necessary to extent malloc pool size for DFU buffer allocation. Moreover, for compatibility reasons (Win vs. Lin) new USB idProduct number for download gadget had to be added. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * | usb:g_dnl:f_thor: USB download function to support TIZEN's THOR protocolLukasz Majewski2013-10-20-0/+27
| | | | | | | | | | | | | | | | | | | | | Implementation of USB download function which supports THOR protocol. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * | usb:g_dnl: Add name parameter to g_dnl_bind_fixup functionLukasz Majewski2013-10-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | New parameter, namely *name has been added to g_dnl_bind_fixup(). It is necessary (for compatibility reasons) to assign new USB idProduct and idVendor for different usb functions. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * | dfu:core: Export dfu_{get|free}_buf functionsLukasz Majewski2013-10-20-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Define the dfu_get_buf() and dfu_free_buf() as global functions. They are necessary for zero copy buffer management, when DFU backend is used for storing data. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
| * | dfu:core: Find DFU alt setting number by passing its nameLukasz Majewski2013-10-20-0/+1
| | | | | | | | | | | | | | | | | | | | | New function - dfu_get_alt() - has been added to dfu core. If present, it returns alt setting's number corresponding to passed name. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
| * | usb: new board-specific USB init interfaceMateusz Zalega2013-10-20-12/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit unifies board-specific USB initialization implementations under one symbol (usb_board_init), declaration of which is available in usb.h. New API allows selective initialization of USB controllers whenever needed. Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * | nitrogen6x: add CONFIG_MV_UDCTroy Kisky2013-10-20-0/+6
| | | | | | | | | | | | | | | | | | Also, add other USB related config items. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * | ARM: OMAP5: Power: Add new function to turn on SMPS10Dan Murphy2013-10-20-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Add new functionality to turn on SMPS10 regulator. This supplies the VBUS to devices connected to the USB host ports Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * | temp: config: exynos5250: Enable xHCI support for Exynos5Vivek Gautam2013-10-20-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables support for xHCI host controller on Exynos5 and further disables EHCI support, to make sure only one host controller is enabled at a time, since right now using two controllers at a time is not possible with current usb core infrastructure. Anyone who wants to enable EHCI support again needs to enable CONFIG_USB_EHCI, CONFIG_USB_EHCI_EXYNOS once again in exynos5-dt config. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
| * | config: arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZEVivek Gautam2013-10-20-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XHCI stack driver needs this to align buffers to CacheLine boundary. So define the same to be '64' Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
| * | exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCIVivek Gautam2013-10-20-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
| * | USB: XHCI: Add xHCI host controller support for Exynos5Vivek Gautam2013-10-20-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds driver layer for xHCI controller in Samsung's exynos5 soc. This interacts with xHCI host controller stack. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
| * | USB: xHCI: Add stack support for xHCIVivek Gautam2013-10-20-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds stack layer for eXtensible Host Controller Interface which facilitates use of USB 3.0 in host mode. Adapting xHCI host controller driver in linux-kernel by Sarah Sharp to needs in u-boot. Initial porting from Linux kernel version 3.4, with following top commit history of drivers/usb/host/xhci* : cf84055 xHCI: Cleanup isoc transfer ring when TD length mismatch found This adds the basic xHCI host controller driver with bare minimum features: - Control/Bulk transfer support has been added with required infrastructure for necessary xHC data structures. - Stream protocol hasn't been supported yet. - No support for quirky devices has been added. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
| * | usb: Move 'bmRequestType' USB device request macros from EHCI headerVivek Gautam2013-10-20-0/+19
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | Macros defining bmRequestType field of USB device request, given in table 9.2 USB 2.0 spec, are rather generic macros which can be further used by other Host controller stacks. So moving them to usb_defs header. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-10-17-56/+48
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| * | i2c: Zynq: Support for TI PCA9548 bus multiplexerMichael Burr2013-10-17-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | (Interface is not quite the same as Phillips PCA9547.) Signed-off-by: Michael Burr <michael.burr@logicpd.com> Cc: Heiko Schocher <hs@denx.de> Cc: Michal Simek <monstr@monstr.eu>
| * | i2c: update config using mxc driver to new subsystemtrem2013-10-17-56/+46
| |/ | | | | | | Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
* | PCIe:change the method to get the address of a requested capability in ↵Zhao Qiang2013-10-16-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | configuration space. Previously, the address of a requested capability is define like that "#define PCI_DCR 0x78" But, the addresses of capabilities is different with regard to PCIe revs. So this method is not flexible. Now a function to get the address of a requested capability is added and used. It can get the address dynamically by capability ID. The step of this function: 1. Read Status register in PCIe configuration space to confirm that Capabilities List is valid. 2. Find the address of Capabilities Pointer Register. 3. Find the address of requested capability from the first capability. Signed-off-by: Zhao Qiang <B45475@freescale.com>
* | powerpc/p1010rdb: add p1010rdb-pb support with updating p1010rdb-paShengzhou Liu2013-10-16-14/+87
| | | | | | | | | | | | | | | | | | | | | | | | - Rename old P1010RDB board as P1010RDB-PA. - Add support for new P1010RDB-PB board. - Some optimization. For more details, see board/freescale/p1010rdb/README. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [York Sun: fix conflicts in boards.cfg] Acked-by: York Sun <yorksun@freescale.com>
* | board/p1010rdb: add pin mux and sdhc support in any bootShengzhou Liu2013-10-16-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since pins multiplexing, SDHC shares signals with IFC, with this patch: To enable SDHC in case of NOR/NAND/SPI boot a) For temporary use case in runtime without reboot system run 'mux sdhc' in u-boot to validate SDHC with invalidating IFC. b) For long-term use case set 'esdhc' in hwconfig and save it. To enable IFC in case of SD boot a) For temporary use case in runtime without reboot system run 'mux ifc' in u-boot to validate IFC with invalidating SDHC. b) For long-term use case set 'ifc' in hwconfig and save it. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
* | powerpc/t1040qds: Add T1040QDS boardPrabhakar Kushwaha2013-10-16-0/+761
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040QDS is a high-performance computing evaluation, development and test platform supporting the T1040 QorIQ Power Architecture™ processor. T1040QDS board Overview ----------------------- - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration - RegEx Pattern Matching Acceleration - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Integrated 8-port Gigabit Ethernet switch - Four 1 Gbps Ethernet controllers - SERDES Connections, 8 lanes supporting: — PCI Express: supporting Gen 1 and Gen 2; — SGMII — QSGMII — SATA 2.0 — Aurora debug with dedicated connectors - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and Interleaving -IFC/Local Bus - NAND flash: 8-bit, async, up to 2GB. - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB - GASIC: Simple (minimal) target within Qixis FPGA - PromJET rapid memory download support - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - QIXIS System Logic FPGA - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - Video - DIU supports video at up to 1280x1024x32bpp - USB - Supports two USB 2.0 ports with integrated PHYs — Two type A ports with 5V@1.5A per port. — Second port can be converted to OTG mini-AB - SDHC - SDHC port connects directly to an adapter card slot, featuring: - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC — Supporting eMMC memory devices - SPI - On-board support of 3 different devices and sizes - Other IO - Two Serial ports - ProfiBus port - Four I2C ports Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: fix conflict in boards.cfg] Acked-by-by: York Sun <yorksun@freescale.com>
* | powerpc: Fix CamelCase warnings in DDR related codePriyanka Jain2013-10-16-24/+24
| | | | | | | | | | | | | | | | | | | | | | Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h has various parameters with embedded acronyms capitalized that trigger the CamelCase warning in checkpatch.pl Convert those variable names to smallcase naming convention and modify all files which are using these structures with modified structures. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
* | powerpc/B4860: enable PBL tool for B4860Shaohui Xie2013-10-16-0/+2
| | | | | | | | | | | | | | | | Use a default RCW of protocol 0x2A_0x98, and a PBI configure file which uses CPC1 as 512KB SRAM, then PBL tool can be used on B4860 to build a pbl boot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
* | powerpc/usb: Mention usb1 before usb2 inside default hwconfig stringramneek mehresh2013-10-16-2/+2
| | | | | | | | | | | | | | | | For USB device-tree fix-up to work properly, its necessary to mention USB1 options before that of USB2 inside default hwconfig string Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
* | board/bsc9131rdb: Update IFC timings for NAND flashPrabhakar Kushwaha2013-10-16-8/+8
| | | | | | | | | | | | | | | | | | Current IFC timings for NAND flash are not able to support existing K9F1G08U0B and new K9F1G08U0D flash. so Update the timings to support both. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* | powerpc: p1_p2_rdb_pc: add TPL for p1_p2_rdb_pc nand bootYing Zhang2013-10-16-26/+57
| | | | | | | | | | | | Enable TPL for p1_p2_rdb_pc nand boot. Signed-off-by: Ying Zhang <b40530@freescale.com>
* | powerpc : p1_p2_rdb_pc : Enable p1_p2_rdb_pc to start from eSPI with SPLYing Zhang2013-10-16-7/+29
| | | | | | | | | | | | Enable p1_p2_rdb_pc to start from eSPI with SPL. Signed-off-by: Ying Zhang <b40530@freescale.com>
* | powerpc: p1_p2_rdb_pc: Enable p1_p2_rdb_pc to boot from SD Card with SPLYing Zhang2013-10-16-14/+45
| | | | | | | | | | | | Enable p1_p2_rdb_pc to start from eSDHC with SPL. Signed-off-by: Ying Zhang <b40530@freescale.com>
* | SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII modeZhao Qiang2013-10-16-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix PHY addresses for QSGMII Riser Card working in SGMII mode on board P3041/P5020/P4080/P5040/B4860. QSGMII Riser Card can work in SGMII mode, but having the different PHY addresses. So the following steps should be done: 1. Confirm whether QSGMII Riser Card is used. 2. If yes, set the proper PHY address. Generally, the function is_qsgmii_riser_card() is for step 1, and set_sgmii_phy() for step 2. However, there are still some special situations, take P5040 and B4860 as examples, the PHY addresses need to be changed when serdes protocol is changed, so it is necessary to confirm the protocol before setting PHY addresses. Signed-off-by: Zhao Qiang <B45475@freescale.com>
* | powerpc:c29xpcie: make ifc timing parameter flexiblePo Liu2013-10-16-3/+5
| | | | | | | | | | | | | | | | | | This patch re-config the NOR flash timing parameters which could make the ifc timing more flexible for NOR flash. The new parameters could fix the problem of hanging at "Flash:" occasionally when booting the board. Signed-off-by: Po Liu <Po.Liu@freescale.com>
* | powerpc: add CONFIG_SECURE_BOOT condition into fsl_secure_boot.hPo Liu2013-10-16-10/+0
|/ | | | | | | This patch is for board config file not to add CONFIG_SECURE_BOOT condition for include the asm/fsl_secure_boot.h. Signed-off-by: Po Liu <Po.Liu@freescale.com>
* sf: Minor cleanups.Jagannadha Sutradharudu Teki2013-10-16-7/+7
| | | | | | | | | - Add comments. - Renamed few macros. - Add tabs. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Bo Shen <voice.shen@atmel.com>
* Coding Style cleanup: drop some excessive empty linesWolfgang Denk2013-10-14-4/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding Style cleanup: replace leading SPACEs by TABsWolfgang Denk2013-10-14-33/+33
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Drop changes for PEP 4 following python tools] Signed-off-by: Tom Rini <trini@ti.com>
generated by cgit v1.1 at 2025-01-02 15:58:58 +0000