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* Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-06-11-3715/+2038
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| * ppc4xx: Unify AMCC's board config files (part 3/3)Stefan Roese2008-06-06-999/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch series unifies the AMCC eval board ports by introducing a common include header for all AMCC eval boards: include/configs/amcc-common.h This header now includes all common configuration options/defines which are removed from the board specific headers. The reason for this is ease of maintenance and unified look and feel of all AMCC boards. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Unify AMCC's board config files (part 2/3)Stefan Roese2008-06-06-1298/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch series unifies the AMCC eval board ports by introducing a common include header for all AMCC eval boards: include/configs/amcc-common.h This header now includes all common configuration options/defines which are removed from the board specific headers. The reason for this is ease of maintenance and unified look and feel of all AMCC boards. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Unify AMCC's board config files (part 1/3)Stefan Roese2008-06-06-0/+259
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch series unifies the AMCC eval board ports by introducing a common include header for all AMCC eval boards: include/configs/amcc-common.h This header now includes all common configuration options/defines which are removed from the board specific headers. The reason for this is ease of maintenance and unified look and feel of all AMCC boards. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Cleanup CPCI405 variant's config fileMatthias Fuchs2008-06-03-93/+0
| | | | | | | | | | | | | | | | This patch removes some dead code from CPCI405 board's config files. JFFS2 support is also removed. It's not used and CPCI4052 does not build anymore without some size reduction. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * ppc4xx: Remove implementations of testdram()Stefan Roese2008-06-03-8/+0
| | | | | | | | | | | | | | This patch removes the used testdram() implementations of the board that are maintained by myself. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Change Kilauea to use the common DDR2 init functionStefan Roese2008-06-03-4/+4
| | | | | | | | | | | | | | | | | | | | | | This patch changes the kilauea and kilauea_nand (for NAND booting) board port to not use a board specific DDR2 init routine anymore. Now the common code from cpu/ppc4xx is used. Thanks to Grant Erickson for all his basic work on this 405EX early bootup. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2Stefan Roese2008-06-03-0/+1156
| | | | | | | | | | | | | | This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all ppc4xx related SDRAM/DDR/DDR2 controller defines. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1Stefan Roese2008-06-03-1310/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes all SDRAM related defines from the PPC4xx headers ppc405.h and ppc440.h. This is needed since now some 405 PPC's use the same SDRAM controller as 440 systems do (like 405EX and 440SP). It also introduces new defines for the equipped SDRAM controller based on which PPC variant is used. There new defines are: used on 405GR/CR/EP and some Xilinx Virtex boards. used on 440GP/GX/EP/GR. used on 440EPx/GRx. used on 405EX/r/440SP/SPe/460EX/GT. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Enable Primordial Stack for 40x and Unify ECC HandlingGrant Erickson2008-06-03-27/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch (Part 2 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Enable Primordial Stack for 40x and Unify ECC HandlingGrant Erickson2008-06-03-15/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch (Part 1 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-06-03-6240/+6702
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* | \ Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2008-06-11-109/+432
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: include/asm-ppc/fsl_lbc.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | | FSL LAW: Add new interface to use the last free LAWKumar Gala2008-06-11-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LAWs have the concept of priority so its useful to be able to allocate the lowest (highest number) priority. We will end up using this with the new DDR code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | FSL LAW: Keep track of LAW allocationsKumar Gala2008-06-11-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make it so we keep track of which LAWs have allocated and provide a function (set_next_law) which can allocate a LAW for us if one is free. In the future we will move to doing more "dynamic" LAW allocation since the majority of users dont really care about what LAW number they are at. Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | 85xx: remove dummy board_early_init_fKumar Gala2008-06-11-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | MPC8544DS: Update config.hKumar Gala2008-06-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * Enable flash progress * remove CLEAR_LAW0 since we dont really use it Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | 85xx: Remove unused and unconfigured memory test code.Kumar Gala2008-06-11-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | Socrates: NAND support added. Changed the U-Boot base address andSergei Poselenov2008-06-11-1/+7
| | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | NAND: Added support for 128-bit OOB, adaptedSergei Poselenov2008-06-11-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | Socrates: Added FPGA mapping. LAWs and TLBs cleanup.Sergei Poselenov2008-06-11-5/+4
| | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | Added the upmconfig() function for 85xx.Sergei Poselenov2008-06-11-0/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | Socrates: config file cleanup.Sergei Poselenov2008-06-11-9/+3
| | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | TQM85xx: Change memory map to support Flash memory > 128 MiBWolfgang Grandegger2008-06-11-7/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash memory. The current memory map only supports up to 128 MiB Flash. This patch adds the configuration option CONFIG_TQM_BIGFLASH. If set, up to 1 GiB flash is supported. To achieve this, the memory map has to be adjusted in great parts (for example the CCSRBAR is moved from 0xE0000000 to 0xA0000000). If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new memory map also has to be considered in the kernel (changed CCSRBAR address, changed PCI IO base address, ...). Please use an appropriate Flat Device Tree blob (tqm8548.dtb). Signed-off-by: Martin Krause <martin.krause@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | TQM85xx: NAND support via local bus UPMBWolfgang Grandegger2008-06-11-3/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for NAND FLASH on the TQM8548. It is disabled by default and can be enabled for the TQM8548 modules. It is now based on the re-written FSL NAND UPM driver. A patch has been posted earlier today with the subject: "NAND FSL UPM: driver re-write using the hwcontrol callback" Note that the R/B pin is not supported by that module requiring to use the specified maximum delay time. Note: With NAND support enabled the size of the U-Boot image exceeds 256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk, doubling the image size :-(. Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | TQM8548: PCI express supportWolfgang Grandegger2008-06-11-1/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for PCI express cards. The board support now uses common FSL PCI init code, for both, PCI and PCIe on all TQM85xx modules. Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | TQM8548: Basic support for the TQM8548 modulesWolfgang Grandegger2008-06-11-8/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the TQM8548 module from TQ-Components (http://www.tqc.de/) including DDR2 SDRAM initialisation and support for eTSEC 3 and 4 Furthermore Flash buffer write has been enabled to speed up output to the Flash by approx. a factor of 10. Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | TQM85xx: Support for Flat Device TreeWolfgang Grandegger2008-06-11-11/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Linux kernels using the Flat Device Tree. It also re-defines the default environment settings for booting Linux with the FDT blob. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | TQM85xx: Support for Intel 82527 compatible CAN controllerWolfgang Grandegger2008-06-10-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds initialization of the UPMC RAM to support up to two Intel 82527 compatible CAN controller on the TQM85xx modules. Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | TQM85xx: Support for Spansion 'N' type flashes addedWolfgang Grandegger2008-06-10-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'N' type Spansion flashes (S29GLxxxN series) have bigger sectors, than the formerly used 'M' types (S29GLxxxM series), so the flash layout needs to be changed -> new start address of the environment. The macro definition CONFIG_TQM_FLASH_N_TYPE is undefined by default and must be defined for boards with 'N' type flashes. Signed-off-by: Martin Krause <martin.krause@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | TQM85xx: Various coding style fixesWolfgang Grandegger2008-06-10-46/+42
| | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | NAND FSL UPM: driver re-write using the hwcontrol callbackWolfgang Grandegger2008-06-10-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a re-write of the NAND FSL UPM driver using the more universal hwcontrol callback (instead of the cmdfunc callback). Here is a brief list of furher modifications: - For the time being, the UPM setup writing the UPM array has been removed from the driver and must now be done by the board specific code. - The bus width definition in "struct fsl_upm_nand" is now in bits to comply with the corresponding Linux driver and 8, 16 and 32 bit accesses are supported. - chip->dev_read is only set if fun->dev_ready != NULL, which is required for boards not connecting the R/B pin. - A few issue have been fixed with MxMR bit manipulation like in the corresponding Linux driver. Note: I think the "io_addr" field of "struct fsl_upm" could be removed as well, because the address is already determined by "nand->IO_ADDR_[RW]", but I'm not 100% sure. This patch has been tested on a TQM8548 modules with the NAND chip Micron MT29F8G08FABWP. This patch is based on the following patches posted to this list a few minutes ago: PPC: add accessor macros to clear and set bits in one shot 83xx/85xx/86xx: add more MxMR local bus definitions Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
| * | | PPC: add accessor macros to clear and set bits in one shotWolfgang Grandegger2008-06-10-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PPC: add accessor macros to clear and set bits in one shot This patch adds macros from linux/include/asm-powerpc/io.h to clear and set bits in one shot using the in_be32, out_be32, etc. accessor functions. They are very handy to manipulate bits it I/O registers. This patch is required for my forthcoming FSL NAND UPM driver re-write and the support for the TQM8548 module. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | 83xx/85xx/86xx: add more MxMR local bus definitionsWolfgang Grandegger2008-06-10-5/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 83xx/85xx/86xx: add more MxMR local bus definitions This patch adds more macro definitions for the UPM Machine Mode Registers They are copied from "include/mpc82xx.h" to simplify the merge of all 8xxx common local bus definitions into include/asm-ppc/fsl_lbc.h. They are required for my forthcoming FSL NAND UPM driver re-write and the support for the TQM8548 module. This patch is based on the following two patches from Anton Vorontsov: http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06511.html http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06587.html I leave coding style violation fixes, code beautification and name corrections to somebody else ;-(. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
| * | | 83xx/85xx: further localbus cleanupsAnton Vorontsov2008-06-10-45/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge mpc85xx.h's LBC defines to fsl_lbc.h. Also, adopt ACS names from mpc85xx.h, so ACS_0b10 renamed to ACS_DIV4, ACS_0b11 to ACS_DIV2. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
| * | | 83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.hAnton Vorontsov2008-06-10-233/+256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves Freescale Localbus defines out of mpc83xx.h, so we could use it on MPC85xx and MPC86xx processors. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
| * | | 85xx: expose cpu identificationKumar Gala2008-06-10-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current cpu identification code is used just to return the name of the processor at boot. There are some other locations that the name is useful (device tree setup). Expose the functionality to other bits of code. Also, drop the 'E' suffix and add it on by looking at the SVR version when we print this out. This is mainly to allow the most flexible use of the name. The device tree code tends to not care about the 'E' suffix. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-06-11-276/+757
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| * | | | mpc83xx: MVBLM7: minor build fixupsKim Phillips2008-06-10-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | add MPC8343 based board mvBlueLYNX-M7 (doc+config)Andre Schwarz2008-06-10-0/+479
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MPC8343 based board mvBlueLYNX-M7. It's a single board stereo camera system. Please read doc/README.mvblm7 for details. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | 83xx/85xx: further localbus cleanupsAnton Vorontsov2008-06-10-45/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move the BRx_* and ORx_* left behind in mpc85xx.h The same is needed for mpc8xx.h and mpc8260.h (defines are almost the same, just few differences which needs some attention though). But the bad news for mpc8xx and mpc8260 is that there are a lot of users of these defines. So this cleanup I'll leave for the "better times". Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | 83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.hAnton Vorontsov2008-06-10-233/+256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves Freescale Localbus defines out of mpc83xx.h, so we could use it on MPC85xx and MPC86xx processors. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | Add missing CSCONFIG_BANK_BIT_3 define to mpc83xx.hTor Krill2008-06-10-0/+1
| |/ / / | | | | | | | | | | | | | | | | Signed-off-by: Tor Krill <tor@excito.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | | Merge commit 'wd/master'Jon Loeliger2008-06-06-6892/+10562
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| * | | Socrates: Fix PCI bus frequency reportWolfgang Denk2008-06-03-1/+2
| | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | Add size #defines for Altera Cyclone-II EP2C8 and EP2C20.Andre Schwarz2008-06-03-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
| * | | SPI Flash subsystemHaavard Skinnemoen2008-06-03-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a new SPI flash subsystem. Currently, only AT45 DataFlash in non-power-of-two mode is supported, but some preliminary support for other flash types is in place as well. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | | atmel_spi: Driver for the Atmel SPI controllerHans-Christian Egtvedt2008-06-03-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a driver for the SPI controller found on most AT91 and AVR32 chips, implementing the new SPI API. Changed in v4: - Update to new API - Handle zero-length transfers appropriately. The user may send a zero-length SPI transfer with SPI_XFER_END set in order to deactivate the chip select after a series of transfers with chip select active. This is useful e.g. when polling the status register of DataFlash. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * | | SPI API improvementsHaavard Skinnemoen2008-06-03-25/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de>
| * | | Move definition of container_of() to common.hHaavard Skinnemoen2008-06-03-22/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AVR32 and AT91SAM9 both have their own identical definitions of container_of() taken from the Linux kernel. Move it to common.h so that all architectures can use it. container_of() is already used by some drivers, and will be used extensively by the new and improved SPI API. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
generated by cgit v1.1 at 2024-12-15 02:26:59 +0000