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* efi_loader: Move to normal debug infrastructureAlexander Graf2016-06-06-9/+1
| | | | | | | | | | | | We introduced special "DEBUG_EFI" defines when the efi loader support was new. After giving it a bit of thought, turns out we really didn't have to - the normal #define DEBUG infrastructure works well enough for efi loader as well. So this patch switches to the common debug() and #define DEBUG way of printing debug information. Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: Add exit supportAlexander Graf2016-06-06-0/+10
| | | | | | | | | | | Some times you may want to exit an EFI payload again, for example to default boot into a PXE installation and decide that you would rather want to boot from the local disk instead. This patch adds exit functionality to the EFI implementation, allowing EFI payloads to exit. Signed-off-by: Alexander Graf <agraf@suse.de>
* strider: Support cpu-dp flavorDirk Eibach2016-06-06-1/+9
| | | | | | | There is new strider cpu flavor with DisplayPort video. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Tom Rini <trini@konsulko.com>
* strider: Support con-dp flavorDirk Eibach2016-06-06-6/+63
| | | | | | | | There is a new strider console flavor with DisplayPort video. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-06-06-39/+2
|\ | | | | | | | | | | | | | | | | | | | | | | Modified: configs/ls1012afrdm_qspi_defconfig configs/ls1012aqds_qspi_defconfig configs/ls1012ardb_qspi_defconfig include/configs/ls1012afrdm.h include/configs/ls1012aqds.h include/configs/ls1012ardb.h Signed-off-by: Tom Rini <trini@konsulko.com>
| * usb: move CONFIG_USB_XHCI_DWC3 to KconfigMasahiro Yamada2016-06-04-13/+0
| | | | | | | | | | | | | | Create an entry for "config USB_XHCI_DWC3" in Kconfig and switch over to it for all boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * usb: move CONFIG_USB_XHCI to Kconfig with renamingMasahiro Yamada2016-06-04-16/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_USB_XHCI to defconfig files for all boards, renaming it into CONFIG_USB_XHCI_HCD. As commented in the help of "config USB_XHCI" entry, this has been a TODO for a long time; now CONFIG_USB_XHCI_HCD and CONFIG_USB_XHCI have been unified in favor of the former. Note: Some boards define CONFIG_USB_XHCI in their headers without CONFIG_USB, which does not meet the "depends on" in Kconfig. I added CONFIG_USB=y for those boards when converting. Otherwise, they would fail to build. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * configs: blackfin: move CONFIG_USB to defconfigMasahiro Yamada2016-06-04-3/+0
| | | | | | | | | | | | | | These Blackfin boards are the last ones that define CONFIG_USB in their headers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * usb: dwc3: Correct datatype of base to unsigned longSiva Durga Prasad Paladugu2016-06-04-1/+1
| | | | | | | | | | | | | | | | | | Correct type of varibale base to unsigned long as keeping it as int causes usb failures if MSB of the base address is set. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-06-06-54/+66
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| * | ARM64: zynqmp: Add support for standard distro boot commandsMichal Simek2016-06-06-57/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nand and QSPI are not defined now but this will be extended. Based on selected bootmode boot_targets are rewritten. Patch also contains detection if variables are saved. If yes don't rewrite boot_targets variable. Also move variable setup to the end of file because SCSI needs to be defined before others macros are using it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
| * | ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIPAlexander Graf2016-06-06-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the CONFIG_BOOTP_SERVERIP option is set, we ignore all dhcp values for the tftp server and use our own serverip and file name instead. This is usually not what we want and I doubt it's set for a good reason on ZynqMP. It definitely hurts if we want to support uEFI PXE boot on it. So just remove the option for now. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM64: zynqmp: Enable AHCI when CONFIG_SATA_CEVA is definedMichal Simek2016-06-06-2/+2
| | | | | | | | | | | | | | | | | | | | | Simplify zcu102 board file by moving CONFIG_AHCI enabling to common file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | env: Setup GD_FLG_ENV_DEFAULT flag when default environment are usedMichal Simek2016-06-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Setup flag when default environment are used to be able to rewrite default distro boot variables based on SoC boot mode. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
| * | ARM64: zynqmp: Add support for zc1751-dc4Michal Simek2016-06-06-0/+24
| | | | | | | | | | | | | | | | | | zc1751-dc4 contains four GEMs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM64: zynqmp: Enable Vitesse and RealTek ethernet physMichal Simek2016-06-06-0/+2
| | | | | | | | | | | | | | | | | | Phys are available on zc1751-dc4 that's why enable them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM64: zynqmp: Enable CMD_NAND via KconfigMichal Simek2016-06-06-1/+0
| |/ | | | | | | | | | | Simplify board file by enabling CMD_NAND via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-06-04-0/+34
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| * | dm: gpio: Add methods for open drain settingmario.six@gdsys.cc2016-06-03-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain GPIO devices have the capability to switch their GPIOs into open-drain mode, that is, instead of actively driving the output (Push-pull output), the pin is connected to the collector (for a NPN transistor) or the drain (for a MOSFET) of a transistor, respectively. The pin then either forms an open circuit or a connection to ground, depending on the state of the transistor. This patch adds functions to the GPIO uclass to switch GPIOs to open-drain mode on devices that support it. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* | | Merge git://git.denx.de/u-boot-nand-flashTom Rini2016-06-04-186/+96
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| * | | mtd: nand: Sync with Linux v4.6Scott Wood2016-06-03-31/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates the NAND code to match Linux v4.6. The previous sync was from Linux v4.1 in commit d3963721d93fafa. Note that none of the individual NAND drivers tracked Linux closely enough to be synced themselves, other than manually applying a few cross-tree changes. Signed-off-by: Scott Wood <oss@buserror.net> Tested-by: Heiko Schocher <hs@denx.de>
| * | | mtd: nand: Add page argument to write_page() etc.Scott Wood2016-06-03-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is part of the Linux 4.6 sync. It is being done before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
| * | | mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_dataScott Wood2016-06-03-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are part of the Linux 4.6 sync. They are being added before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
| * | | nand: Embed mtd_info in struct nand_chipScott Wood2016-06-03-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_info[] is now an array of pointers, with the actual mtd_info instance embedded in struct nand_chip. This is in preparation for syncing the NAND code with Linux 4.6, which makes the same change to struct nand_chip. It's in a separate commit due to the large amount of changes required to accommodate the change to nand_info[]. Signed-off-by: Scott Wood <oss@buserror.net>
| * | | mtd: nand: Remove nand_info_t typedefScott Wood2016-06-03-19/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This typedef serves no purpose other than causing confusion with struct nand_chip. Signed-off-by: Scott Wood <oss@buserror.net>
| * | | mtd: nand: Remove docg4 driver and palmtreo680 flashing toolScott Wood2016-06-03-132/+0
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | Commit ad4f54ea86b ("arm: Remove palmtreo680 board") removed the only user of the docg4 driver and the palmtreo680 image flashing tool. This patch removes them. Signed-off-by: Scott Wood <oss@buserror.net> Cc: Mike Dunn <mikedunn@newsguy.com> Cc: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-06-04-1/+652
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| * | | armv8: ls1012a: Add support of ls1012afrdm boardPrabhakar Kushwaha2016-06-03-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance development platform, with a complete debugging environment. The LS1012AFRDM board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | armv8: ls1012a: Add support of ls1012ardb boardPrabhakar Kushwaha2016-06-03-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | armv8: ls1012a: Add support of ls1012aqds boardPrabhakar Kushwaha2016-06-03-0/+336
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QorIQ LS1012A Development System (LS1012AQDS) is a high-performance development platform, with a complete debugging environment. The LS1012AQDS board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | armv8: fsl-layerscape: Add support of QorIQ LS1012A SoCPrabhakar Kushwaha2016-06-03-1/+165
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QorIQ LS1012A processor, optimized for battery-backed or USB-powered, integrates a single ARM Cortex-A53 core with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance. This patch add support of LS1012A SoC along with - Update platform & DDR clock read logic as per SVR - Define MMDC controller register set. - Update LUT base address for PCIe - Avoid L3 platform cache compilation - Update USB address, errata - SerDes table - Added CSU IDs for SDHC2, SAI-1 to SAI-4 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Makarand Pawagi <makarand.pawagi@mindspeed.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-06-03-35/+199
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| * | ARM: tegra: add p2771-0000 board supportStephen Warren2016-05-31-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P2771-0000 is a P3310 CPU board married to a P2597 I/O board. The combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, Ethernet, USB3 host port, SATA, PCIe, and two GPIO expansion headers. Currently, due to U-Boot's level of support for Tegra186, the only features supported by U-Boot are the console UART and the on-board eMMC. Additional features will be added over time. U-Boot has so far been tested by replacing the kernel image on the device with a U-Boot binary. It is anticipated that U-Boot will eventually replace the CCPLEX bootloader binary, as on previous chips. This hasn't yet been tested. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add core Tegra186 supportStephen Warren2016-05-31-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the bare minimum code to support Tegra186, with UART and eMMC working. The empty gpio.h is required because <asm/gpio.h> includes it. A future cleanup round may be able to solve this for all Tegra generations at once. mach-tegra/Makefile is adjusted not to compile anything for Tegra186, but instead to defer everything to mach-tegra/tegra186/Makefile. This allows the SoC code to pick-and-choose which of the C files in the "common" mach-tegra/ directory to compile in based on the SoC's needs. Most of the code is not valid for Tegra186, and this approach removes the need for mach-tegra/Makefile to contain many SoC-specific ifdefs. This approach may be applied to all other Tegra SoCs in a future cleanup round. board186.c is introduced to replace board.c and board2.c. These files currently contain a slew of SoC- and board-specific code that is not valid for Tegra186. This approach avoids adding yet more ifdefs to those files. A future cleanup round may refactor most of board*.c into board-/ SoC-specific functions files thus allowing the top-level functions like board_init_early_f to be shared again. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: add basic Tegra186 supportStephen Warren2016-05-31-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | gpio: add Tegra186 GPIO driverStephen Warren2016-05-31-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186's GPIO controller register layout is significantly different from previous chips, so add a new driver for it. In fact, there are two different GPIO controllers in Tegra186 that share a similar register layout, but very different port mapping. This driver covers both. The DT binding is already present in the Linux kernel (in linux-next via the Tegra tree so far). Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> # v1 Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: convert CONFIG_TEGRA_GPIO to KconfigStephen Warren2016-05-31-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Future chips will contain different GPIO HW. This change will enable future SoC support to select the appropriate GPIO driver for their HW, in a future-looking fashion, using Kconfig. TEGRA_GPIO is not simply selected by TEGRA_COMMON (even though all current Tegra chips used this GPIO HW) to simplify the later addition of support for Tegra SoCs that use different GPIO HW. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: fix naming in GPIO DT binding headerStephen Warren2016-05-31-34/+34
| |/ | | | | | | | | | | | | | | | | | | | | | | According to the Tegra TRM, GPIOs are aggregated into /ports/ of 8 GPIOs, not into /banks/. Fix <dt-bindings/gpio/tegra-gpio.h> to correctly reflect this naming convention. While this seems like silly churn, it will become slightly more important once we introduce the GPIO binding for upcoming Tegra chips. This mirrors an identical commit in the Linux kernel. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-06-02-7/+235
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| * | arm: socfpga: improve raw MMC SPL bootSylvain Lesne2016-06-01-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this patch, when booting from MMC (no filesystem), the SPL loaded U-Boot from a fixed offset. It will now load U-Boot from an offset of 256kB (which is 4 times the padded SPL image) in the third partition. This behaviour is similar to what the vendor SPL (based on U-Boot 2013.01) does, and allows to directly 'dd' the u-boot-with-spl.sfp file to the A2 partition. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
| * | arm: socfpga: Add missing ',' in CONFIG_BOOTARGSStefan Roese2016-06-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Somehow the sr1500 is missing this comma in the CONFIG_BOOTARGS definition. This patch adds it to. Signed-off-by: Stefan Roese <sr@denx.de> Reported-by: Pavel Machek <pavel@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de>
| * | arm: socfpga: Enable tiny printf and simple malloc in SPLMarek Vasut2016-06-01-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable both features to reduce the SPL size by 6 kiB. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de>
| * | arm: socfpga: Add samtec VIN|ING boardMarek Vasut2016-06-01-0/+231
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for board based on the popular Altera Cyclone V SoC. This board has the following properties: - 1 GiB of DRAM - 1 Gigabit ethernet - 1 USB gadget port - 1 USB host port with an on-board hub - 2 QSPI NORs connected to the Cadence QSPI core - Multiple I2C EEPROMs and one I2C temperature sensor Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> --- V2: Update the defconfig as per Tom's request
* | mips: wdr4300: Move the CONFIG_USE_PRIVATE_LIBGCC to KconfigMarek Vasut2016-06-02-2/+0
|/ | | | | | | | | | This fixes the last remaining libgcc warning, where the symbol was defined twice. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-31-60/+18
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| * mips: ath79: Use 8MB flash profile for mtd partition by defaultWills Wang2016-05-31-5/+5
| | | | | | | | | | | | Change bootm flash address and mtd partition table for 8MB flash profile. Signed-off-by: Wills Wang <wills.wang@live.com>
| * MIPS: Split I & D cache line size configPaul Burton2016-05-31-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: Move cache sizes to KconfigPaul Burton2016-05-31-49/+0
| | | | | | | | | | | | | | | | | | | | | | | | Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: Allow MIPS64 buildsPaul Burton2016-05-31-5/+13
| | | | | | | | | | | | | | | | Both real Malta boards & emulators that mimic Malta (eg. QEMU) can support MIPS64 CPUs. Allow MIPS64 builds of U-Boot for such boards, which enables the user to make use of the whole 64 bit address space. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-05-31-0/+2
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